| 5b24c396 | 12-Oct-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Use correct interrupts for Tegra234 TKE
[ Upstream commit c0b80988eb78d6423249ab530bfbc6b238790a26 ]
The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
shared inte
arm64: tegra: Use correct interrupts for Tegra234 TKE
[ Upstream commit c0b80988eb78d6423249ab530bfbc6b238790a26 ]
The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
shared interrupts 10-15 are mapped to 256-261. Correct the mapping for
the final 6 interrupts. This prevents the TKE from requesting the RTC
interrupt (along with several GTE and watchdog interrupts).
Reported-by: Shubhi Garg <shgarg@nvidia.com>
Fixes: 28d860ed02c2 ("arm64: tegra: Enable native timers on Tegra234")
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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| 78d42ed5 | 26-Jun-2023 |
Brad Griffis <bgriffis@nvidia.com> |
arm64: tegra: Fix P3767 QSPI speed
[ Upstream commit 57ea99ba176913c325fc8324a24a1b5e8a6cf520 ]
The QSPI device used on Jetson Orin NX and Nano modules (p3767) is
the same as Jetson AGX Orin (p3701
arm64: tegra: Fix P3767 QSPI speed
[ Upstream commit 57ea99ba176913c325fc8324a24a1b5e8a6cf520 ]
The QSPI device used on Jetson Orin NX and Nano modules (p3767) is
the same as Jetson AGX Orin (p3701) and should have a maximum speed of
102 MHz.
Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX")
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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| 6e752d4a | 26-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove {clock,reset}-names from VIC powergate
According to the device tree bindings, the powergate definition nodes
don't contain clock-names and reset-names properties, so remove them
arm64: tegra: Remove {clock,reset}-names from VIC powergate
According to the device tree bindings, the powergate definition nodes
don't contain clock-names and reset-names properties, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| ee561fc4 | 25-Jul-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: tegra: Drop incorrect maxim,disable-etr on Smaug
There is no "maxim,disable-etr" property (but there is
maxim,enable-etr), neither in the bindings nor in the Linux driver:
tegra210-smaug.d
arm64: tegra: Drop incorrect maxim,disable-etr on Smaug
There is no "maxim,disable-etr" property (but there is
maxim,enable-etr), neither in the bindings nor in the Linux driver:
tegra210-smaug.dtb: regulator@1c: Unevaluated properties are not allowed ('maxim,disable-etr' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| bb9667d8 | 21-Jul-2023 |
Gautham Srinivasan <gauthams@nvidia.com> |
arm64: tegra: Add SPI device tree nodes for Tegra234
Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers
found on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
arm64: tegra: Add SPI device tree nodes for Tegra234
Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers
found on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 96ff27ce | 21-Jul-2023 |
Gautham Srinivasan <gauthams@nvidia.com> |
arm64: tegra: Enable UARTA and UARTE for Orin Nano
Activate UARTA and UARTE functionalities for Orin Nano.
- UARTA is accessible via the 40-pin header with pin 8 and 10 (TX/RX)
- UARTE utilizes the
arm64: tegra: Enable UARTA and UARTE for Orin Nano
Activate UARTA and UARTE functionalities for Orin Nano.
- UARTA is accessible via the 40-pin header with pin 8 and 10 (TX/RX)
- UARTE utilizes the M2.E connector
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 940acdac | 21-Jul-2023 |
Gautham Srinivasan <gauthams@nvidia.com> |
arm64: tegra: Add UARTE device tree node on Tegra234
This commit adds the device tree node for UARTE on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Redi
arm64: tegra: Add UARTE device tree node on Tegra234
This commit adds the device tree node for UARTE on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 29bae9dc | 19-May-2023 |
Artur Weber <aweber.kernel@gmail.com> |
arm64: tegra: Adapt to LP855X bindings changes
Change underscores in ROM node names to dashes, and remove deprecated
pwm-period property.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Review
arm64: tegra: Adapt to LP855X bindings changes
Change underscores in ROM node names to dashes, and remove deprecated
pwm-period property.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| 677e0e3a | 17-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add missing reset-names for Tegra HS UART
The device tree bindings for the Tegra high-speed UART require the
reset-names property, so add it whenever the compatible string for the
seri
arm64: tegra: Add missing reset-names for Tegra HS UART
The device tree bindings for the Tegra high-speed UART require the
reset-names property, so add it whenever the compatible string for the
serial port is overwritten.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 938745c5 | 17-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: smaug: Remove reg-shift for high-speed UART
The device tree bindings for the high-speed UART don't define a
reg-shift property, so delete it.
Signed-off-by: Thierry Reding <treding@nv
arm64: tegra: smaug: Remove reg-shift for high-speed UART
The device tree bindings for the high-speed UART don't define a
reg-shift property, so delete it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 9304f699 | 17-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add 35°C trip point for Jetson Orin NX/Nano
It turns out that these devices can get quite hot to the touch with the
standard cooling configuration, so add another trip point at 35°C al
arm64: tegra: Add 35°C trip point for Jetson Orin NX/Nano
It turns out that these devices can get quite hot to the touch with the
standard cooling configuration, so add another trip point at 35°C along
with a cooling map to help keep the system reasonably cool at very low
system load.
Reviewed-by: Yi-Wei Wang <yiweiw@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 61652426 | 20-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove duplicate PCI nodes
The PCI nodes for Jetson Orin NX are already defined at the carrier
board level, so the duplicates can be dropped at the platform level.
Signed-off-by: Thie
arm64: tegra: Remove duplicate PCI nodes
The PCI nodes for Jetson Orin NX are already defined at the carrier
board level, so the duplicates can be dropped at the platform level.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 20515700 | 13-Jul-2023 |
Sumit Gupta <sumitg@nvidia.com> |
arm64: tegra: Update CPU OPP tables
Update the CPU OPP table to include all frequencies supported by
Tegra234. Different platforms can choose to keep all or few entries
based on their power and perf
arm64: tegra: Update CPU OPP tables
Update the CPU OPP table to include all frequencies supported by
Tegra234. Different platforms can choose to keep all or few entries
based on their power and performance tunings.
Signed-off-by: Shao-Chun Kao <shaochunk@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 590bfe51 | 14-Jul-2023 |
Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> |
arm64: tegra: Fix HSUART for Smaug
After commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") was applied, the HSUART failed to probe and the following
error is seen:
seri
arm64: tegra: Fix HSUART for Smaug
After commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") was applied, the HSUART failed to probe and the following
error is seen:
serial-tegra 70006300.serial: Couldn't get the reset
serial-tegra: probe of 70006300.serial failed with error -2
Commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") is correct because the "reset-names" property is not
needed for 8250 UARTs. However, the "reset-names" is required for the
HSUART and should have been populated as part of commit a63c0cd83720c
("arm64: dts: tegra: smaug: Add Bluetooth node") that enabled the HSUART
for the Pixel C. Fix this by populating the "reset-names" property for
the HSUART on the Pixel C.
Fixes: a63c0cd83720 ("arm64: dts: tegra: smaug: Add Bluetooth node")
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| 861dbb2b | 03-Jul-2023 |
Jon Hunter <jonathanh@nvidia.com> |
arm64: tegra: Fix HSUART for Jetson AGX Orin
After commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") was applied, the HSUART failed to probe and the following
error is se
arm64: tegra: Fix HSUART for Jetson AGX Orin
After commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") was applied, the HSUART failed to probe and the following
error is seen:
serial-tegra 3100000.serial: Couldn't get the reset
serial-tegra: probe of 3100000.serial failed with error -2
Commit 71de0a054d0e ("arm64: tegra: Drop serial clock-names and
reset-names") is correct because the "reset-names" property is not
needed for 8250 UARTs. However, the "reset-names" is required for the
HSUART and should have been populated as part of commit ff578db7b693
("arm64: tegra: Enable UART instance on 40-pin header") that
enabled the HSUART for Jetson AGX Orin. Fix this by populating the
"reset-names" property for the HSUART on Jetson AGX Orin.
Fixes: ff578db7b693 ("arm64: tegra: Enable UART instance on 40-pin header")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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| d97966df | 03-Jul-2023 |
Jon Hunter <jonathanh@nvidia.com> |
arm64: tegra: Add missing alias for NVIDIA IGX Orin
The following error is seen on boot for the NVIDIA IGX Orin platform ...
serial-tegra 3100000.serial: failed to get alias id, errno -19
Fix thi
arm64: tegra: Add missing alias for NVIDIA IGX Orin
The following error is seen on boot for the NVIDIA IGX Orin platform ...
serial-tegra 3100000.serial: failed to get alias id, errno -19
Fix this by populating the necessary alias for the serial device.
Fixes: c95711d7dbc4 ("arm64: tegra: Add support for IGX Orin")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
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