1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/acpi.h> 30 #include <linux/platform_device.h> 31 #include <linux/regulator/consumer.h> 32 #include <linux/serdev.h> 33 #include <linux/mutex.h> 34 #include <asm/unaligned.h> 35 36 #include <net/bluetooth/bluetooth.h> 37 #include <net/bluetooth/hci_core.h> 38 39 #include "hci_uart.h" 40 #include "btqca.h" 41 42 /* HCI_IBS protocol messages */ 43 #define HCI_IBS_SLEEP_IND 0xFE 44 #define HCI_IBS_WAKE_IND 0xFD 45 #define HCI_IBS_WAKE_ACK 0xFC 46 #define HCI_MAX_IBS_SIZE 10 47 48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 51 #define CMD_TRANS_TIMEOUT_MS 100 52 #define MEMDUMP_TIMEOUT_MS 8000 53 #define IBS_DISABLE_SSR_TIMEOUT_MS \ 54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 55 #define FW_DOWNLOAD_TIMEOUT_MS 3000 56 57 /* susclk rate */ 58 #define SUSCLK_RATE_32KHZ 32768 59 60 /* Controller debug log header */ 61 #define QCA_DEBUG_HANDLE 0x2EDC 62 63 /* max retry count when init fails */ 64 #define MAX_INIT_RETRIES 3 65 66 /* Controller dump header */ 67 #define QCA_SSR_DUMP_HANDLE 0x0108 68 #define QCA_DUMP_PACKET_SIZE 255 69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 70 #define QCA_CRASHBYTE_PACKET_LEN 1096 71 #define QCA_MEMDUMP_BYTE 0xFB 72 73 enum qca_flags { 74 QCA_IBS_DISABLED, 75 QCA_DROP_VENDOR_EVENT, 76 QCA_SUSPENDING, 77 QCA_MEMDUMP_COLLECTION, 78 QCA_HW_ERROR_EVENT, 79 QCA_SSR_TRIGGERED, 80 QCA_BT_OFF, 81 QCA_ROM_FW, 82 QCA_DEBUGFS_CREATED, 83 }; 84 85 enum qca_capabilities { 86 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 87 QCA_CAP_VALID_LE_STATES = BIT(1), 88 }; 89 90 /* HCI_IBS transmit side sleep protocol states */ 91 enum tx_ibs_states { 92 HCI_IBS_TX_ASLEEP, 93 HCI_IBS_TX_WAKING, 94 HCI_IBS_TX_AWAKE, 95 }; 96 97 /* HCI_IBS receive side sleep protocol states */ 98 enum rx_states { 99 HCI_IBS_RX_ASLEEP, 100 HCI_IBS_RX_AWAKE, 101 }; 102 103 /* HCI_IBS transmit and receive side clock state vote */ 104 enum hci_ibs_clock_state_vote { 105 HCI_IBS_VOTE_STATS_UPDATE, 106 HCI_IBS_TX_VOTE_CLOCK_ON, 107 HCI_IBS_TX_VOTE_CLOCK_OFF, 108 HCI_IBS_RX_VOTE_CLOCK_ON, 109 HCI_IBS_RX_VOTE_CLOCK_OFF, 110 }; 111 112 /* Controller memory dump states */ 113 enum qca_memdump_states { 114 QCA_MEMDUMP_IDLE, 115 QCA_MEMDUMP_COLLECTING, 116 QCA_MEMDUMP_COLLECTED, 117 QCA_MEMDUMP_TIMEOUT, 118 }; 119 120 struct qca_memdump_info { 121 u32 current_seq_no; 122 u32 received_dump; 123 u32 ram_dump_size; 124 }; 125 126 struct qca_memdump_event_hdr { 127 __u8 evt; 128 __u8 plen; 129 __u16 opcode; 130 __le16 seq_no; 131 __u8 reserved; 132 } __packed; 133 134 135 struct qca_dump_size { 136 __le32 dump_size; 137 } __packed; 138 139 struct qca_data { 140 struct hci_uart *hu; 141 struct sk_buff *rx_skb; 142 struct sk_buff_head txq; 143 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 144 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 145 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 146 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 147 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 148 bool tx_vote; /* Clock must be on for TX */ 149 bool rx_vote; /* Clock must be on for RX */ 150 struct timer_list tx_idle_timer; 151 u32 tx_idle_delay; 152 struct timer_list wake_retrans_timer; 153 u32 wake_retrans; 154 struct workqueue_struct *workqueue; 155 struct work_struct ws_awake_rx; 156 struct work_struct ws_awake_device; 157 struct work_struct ws_rx_vote_off; 158 struct work_struct ws_tx_vote_off; 159 struct work_struct ctrl_memdump_evt; 160 struct delayed_work ctrl_memdump_timeout; 161 struct qca_memdump_info *qca_memdump; 162 unsigned long flags; 163 struct completion drop_ev_comp; 164 wait_queue_head_t suspend_wait_q; 165 enum qca_memdump_states memdump_state; 166 struct mutex hci_memdump_lock; 167 168 u16 fw_version; 169 u16 controller_id; 170 /* For debugging purpose */ 171 u64 ibs_sent_wacks; 172 u64 ibs_sent_slps; 173 u64 ibs_sent_wakes; 174 u64 ibs_recv_wacks; 175 u64 ibs_recv_slps; 176 u64 ibs_recv_wakes; 177 u64 vote_last_jif; 178 u32 vote_on_ms; 179 u32 vote_off_ms; 180 u64 tx_votes_on; 181 u64 rx_votes_on; 182 u64 tx_votes_off; 183 u64 rx_votes_off; 184 u64 votes_on; 185 u64 votes_off; 186 }; 187 188 enum qca_speed_type { 189 QCA_INIT_SPEED = 1, 190 QCA_OPER_SPEED 191 }; 192 193 /* 194 * Voltage regulator information required for configuring the 195 * QCA Bluetooth chipset 196 */ 197 struct qca_vreg { 198 const char *name; 199 unsigned int load_uA; 200 }; 201 202 struct qca_device_data { 203 enum qca_btsoc_type soc_type; 204 struct qca_vreg *vregs; 205 size_t num_vregs; 206 uint32_t capabilities; 207 }; 208 209 /* 210 * Platform data for the QCA Bluetooth power driver. 211 */ 212 struct qca_power { 213 struct device *dev; 214 struct regulator_bulk_data *vreg_bulk; 215 int num_vregs; 216 bool vregs_on; 217 }; 218 219 struct qca_serdev { 220 struct hci_uart serdev_hu; 221 struct gpio_desc *bt_en; 222 struct gpio_desc *sw_ctrl; 223 struct clk *susclk; 224 enum qca_btsoc_type btsoc_type; 225 struct qca_power *bt_power; 226 u32 init_speed; 227 u32 oper_speed; 228 bool bdaddr_property_broken; 229 const char *firmware_name; 230 }; 231 232 static int qca_regulator_enable(struct qca_serdev *qcadev); 233 static void qca_regulator_disable(struct qca_serdev *qcadev); 234 static void qca_power_shutdown(struct hci_uart *hu); 235 static int qca_power_off(struct hci_dev *hdev); 236 static void qca_controller_memdump(struct work_struct *work); 237 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 238 239 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 240 { 241 enum qca_btsoc_type soc_type; 242 243 if (hu->serdev) { 244 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 245 246 soc_type = qsd->btsoc_type; 247 } else { 248 soc_type = QCA_ROME; 249 } 250 251 return soc_type; 252 } 253 254 static const char *qca_get_firmware_name(struct hci_uart *hu) 255 { 256 if (hu->serdev) { 257 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 258 259 return qsd->firmware_name; 260 } else { 261 return NULL; 262 } 263 } 264 265 static void __serial_clock_on(struct tty_struct *tty) 266 { 267 /* TODO: Some chipset requires to enable UART clock on client 268 * side to save power consumption or manual work is required. 269 * Please put your code to control UART clock here if needed 270 */ 271 } 272 273 static void __serial_clock_off(struct tty_struct *tty) 274 { 275 /* TODO: Some chipset requires to disable UART clock on client 276 * side to save power consumption or manual work is required. 277 * Please put your code to control UART clock off here if needed 278 */ 279 } 280 281 /* serial_clock_vote needs to be called with the ibs lock held */ 282 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 283 { 284 struct qca_data *qca = hu->priv; 285 unsigned int diff; 286 287 bool old_vote = (qca->tx_vote | qca->rx_vote); 288 bool new_vote; 289 290 switch (vote) { 291 case HCI_IBS_VOTE_STATS_UPDATE: 292 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 293 294 if (old_vote) 295 qca->vote_off_ms += diff; 296 else 297 qca->vote_on_ms += diff; 298 return; 299 300 case HCI_IBS_TX_VOTE_CLOCK_ON: 301 qca->tx_vote = true; 302 qca->tx_votes_on++; 303 break; 304 305 case HCI_IBS_RX_VOTE_CLOCK_ON: 306 qca->rx_vote = true; 307 qca->rx_votes_on++; 308 break; 309 310 case HCI_IBS_TX_VOTE_CLOCK_OFF: 311 qca->tx_vote = false; 312 qca->tx_votes_off++; 313 break; 314 315 case HCI_IBS_RX_VOTE_CLOCK_OFF: 316 qca->rx_vote = false; 317 qca->rx_votes_off++; 318 break; 319 320 default: 321 BT_ERR("Voting irregularity"); 322 return; 323 } 324 325 new_vote = qca->rx_vote | qca->tx_vote; 326 327 if (new_vote != old_vote) { 328 if (new_vote) 329 __serial_clock_on(hu->tty); 330 else 331 __serial_clock_off(hu->tty); 332 333 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", 334 vote ? "true" : "false"); 335 336 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 337 338 if (new_vote) { 339 qca->votes_on++; 340 qca->vote_off_ms += diff; 341 } else { 342 qca->votes_off++; 343 qca->vote_on_ms += diff; 344 } 345 qca->vote_last_jif = jiffies; 346 } 347 } 348 349 /* Builds and sends an HCI_IBS command packet. 350 * These are very simple packets with only 1 cmd byte. 351 */ 352 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 353 { 354 int err = 0; 355 struct sk_buff *skb = NULL; 356 struct qca_data *qca = hu->priv; 357 358 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 359 360 skb = bt_skb_alloc(1, GFP_ATOMIC); 361 if (!skb) { 362 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 363 return -ENOMEM; 364 } 365 366 /* Assign HCI_IBS type */ 367 skb_put_u8(skb, cmd); 368 369 skb_queue_tail(&qca->txq, skb); 370 371 return err; 372 } 373 374 static void qca_wq_awake_device(struct work_struct *work) 375 { 376 struct qca_data *qca = container_of(work, struct qca_data, 377 ws_awake_device); 378 struct hci_uart *hu = qca->hu; 379 unsigned long retrans_delay; 380 unsigned long flags; 381 382 BT_DBG("hu %p wq awake device", hu); 383 384 /* Vote for serial clock */ 385 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 386 387 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 388 389 /* Send wake indication to device */ 390 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 391 BT_ERR("Failed to send WAKE to device"); 392 393 qca->ibs_sent_wakes++; 394 395 /* Start retransmit timer */ 396 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 397 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 398 399 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 400 401 /* Actually send the packets */ 402 hci_uart_tx_wakeup(hu); 403 } 404 405 static void qca_wq_awake_rx(struct work_struct *work) 406 { 407 struct qca_data *qca = container_of(work, struct qca_data, 408 ws_awake_rx); 409 struct hci_uart *hu = qca->hu; 410 unsigned long flags; 411 412 BT_DBG("hu %p wq awake rx", hu); 413 414 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 415 416 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 417 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 418 419 /* Always acknowledge device wake up, 420 * sending IBS message doesn't count as TX ON. 421 */ 422 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 423 BT_ERR("Failed to acknowledge device wake up"); 424 425 qca->ibs_sent_wacks++; 426 427 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 428 429 /* Actually send the packets */ 430 hci_uart_tx_wakeup(hu); 431 } 432 433 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 434 { 435 struct qca_data *qca = container_of(work, struct qca_data, 436 ws_rx_vote_off); 437 struct hci_uart *hu = qca->hu; 438 439 BT_DBG("hu %p rx clock vote off", hu); 440 441 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 442 } 443 444 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 445 { 446 struct qca_data *qca = container_of(work, struct qca_data, 447 ws_tx_vote_off); 448 struct hci_uart *hu = qca->hu; 449 450 BT_DBG("hu %p tx clock vote off", hu); 451 452 /* Run HCI tx handling unlocked */ 453 hci_uart_tx_wakeup(hu); 454 455 /* Now that message queued to tty driver, vote for tty clocks off. 456 * It is up to the tty driver to pend the clocks off until tx done. 457 */ 458 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 459 } 460 461 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 462 { 463 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 464 struct hci_uart *hu = qca->hu; 465 unsigned long flags; 466 467 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 468 469 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 470 flags, SINGLE_DEPTH_NESTING); 471 472 switch (qca->tx_ibs_state) { 473 case HCI_IBS_TX_AWAKE: 474 /* TX_IDLE, go to SLEEP */ 475 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 476 BT_ERR("Failed to send SLEEP to device"); 477 break; 478 } 479 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 480 qca->ibs_sent_slps++; 481 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 482 break; 483 484 case HCI_IBS_TX_ASLEEP: 485 case HCI_IBS_TX_WAKING: 486 default: 487 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 488 break; 489 } 490 491 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 492 } 493 494 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 495 { 496 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 497 struct hci_uart *hu = qca->hu; 498 unsigned long flags, retrans_delay; 499 bool retransmit = false; 500 501 BT_DBG("hu %p wake retransmit timeout in %d state", 502 hu, qca->tx_ibs_state); 503 504 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 505 flags, SINGLE_DEPTH_NESTING); 506 507 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 508 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 509 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 510 return; 511 } 512 513 switch (qca->tx_ibs_state) { 514 case HCI_IBS_TX_WAKING: 515 /* No WAKE_ACK, retransmit WAKE */ 516 retransmit = true; 517 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 518 BT_ERR("Failed to acknowledge device wake up"); 519 break; 520 } 521 qca->ibs_sent_wakes++; 522 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 523 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 524 break; 525 526 case HCI_IBS_TX_ASLEEP: 527 case HCI_IBS_TX_AWAKE: 528 default: 529 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 530 break; 531 } 532 533 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 534 535 if (retransmit) 536 hci_uart_tx_wakeup(hu); 537 } 538 539 540 static void qca_controller_memdump_timeout(struct work_struct *work) 541 { 542 struct qca_data *qca = container_of(work, struct qca_data, 543 ctrl_memdump_timeout.work); 544 struct hci_uart *hu = qca->hu; 545 546 mutex_lock(&qca->hci_memdump_lock); 547 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 548 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 549 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 550 /* Inject hw error event to reset the device 551 * and driver. 552 */ 553 hci_reset_dev(hu->hdev); 554 } 555 } 556 557 mutex_unlock(&qca->hci_memdump_lock); 558 } 559 560 561 /* Initialize protocol */ 562 static int qca_open(struct hci_uart *hu) 563 { 564 struct qca_serdev *qcadev; 565 struct qca_data *qca; 566 567 BT_DBG("hu %p qca_open", hu); 568 569 if (!hci_uart_has_flow_control(hu)) 570 return -EOPNOTSUPP; 571 572 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); 573 if (!qca) 574 return -ENOMEM; 575 576 skb_queue_head_init(&qca->txq); 577 skb_queue_head_init(&qca->tx_wait_q); 578 skb_queue_head_init(&qca->rx_memdump_q); 579 spin_lock_init(&qca->hci_ibs_lock); 580 mutex_init(&qca->hci_memdump_lock); 581 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 582 if (!qca->workqueue) { 583 BT_ERR("QCA Workqueue not initialized properly"); 584 kfree(qca); 585 return -ENOMEM; 586 } 587 588 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 589 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 590 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 591 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 592 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 593 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 594 qca_controller_memdump_timeout); 595 init_waitqueue_head(&qca->suspend_wait_q); 596 597 qca->hu = hu; 598 init_completion(&qca->drop_ev_comp); 599 600 /* Assume we start with both sides asleep -- extra wakes OK */ 601 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 602 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 603 604 qca->vote_last_jif = jiffies; 605 606 hu->priv = qca; 607 608 if (hu->serdev) { 609 qcadev = serdev_device_get_drvdata(hu->serdev); 610 611 switch (qcadev->btsoc_type) { 612 case QCA_WCN3988: 613 case QCA_WCN3990: 614 case QCA_WCN3991: 615 case QCA_WCN3998: 616 case QCA_WCN6750: 617 hu->init_speed = qcadev->init_speed; 618 break; 619 620 default: 621 break; 622 } 623 624 if (qcadev->oper_speed) 625 hu->oper_speed = qcadev->oper_speed; 626 } 627 628 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 629 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 630 631 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 632 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 633 634 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 635 qca->tx_idle_delay, qca->wake_retrans); 636 637 return 0; 638 } 639 640 static void qca_debugfs_init(struct hci_dev *hdev) 641 { 642 struct hci_uart *hu = hci_get_drvdata(hdev); 643 struct qca_data *qca = hu->priv; 644 struct dentry *ibs_dir; 645 umode_t mode; 646 647 if (!hdev->debugfs) 648 return; 649 650 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 651 return; 652 653 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 654 655 /* read only */ 656 mode = 0444; 657 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 658 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 659 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 660 &qca->ibs_sent_slps); 661 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 662 &qca->ibs_sent_wakes); 663 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 664 &qca->ibs_sent_wacks); 665 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 666 &qca->ibs_recv_slps); 667 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 668 &qca->ibs_recv_wakes); 669 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 670 &qca->ibs_recv_wacks); 671 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 672 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 673 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 674 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 675 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 676 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 677 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 678 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 679 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 680 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 681 682 /* read/write */ 683 mode = 0644; 684 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 685 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 686 &qca->tx_idle_delay); 687 } 688 689 /* Flush protocol data */ 690 static int qca_flush(struct hci_uart *hu) 691 { 692 struct qca_data *qca = hu->priv; 693 694 BT_DBG("hu %p qca flush", hu); 695 696 skb_queue_purge(&qca->tx_wait_q); 697 skb_queue_purge(&qca->txq); 698 699 return 0; 700 } 701 702 /* Close protocol */ 703 static int qca_close(struct hci_uart *hu) 704 { 705 struct qca_data *qca = hu->priv; 706 707 BT_DBG("hu %p qca close", hu); 708 709 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 710 711 skb_queue_purge(&qca->tx_wait_q); 712 skb_queue_purge(&qca->txq); 713 skb_queue_purge(&qca->rx_memdump_q); 714 /* 715 * Shut the timers down so they can't be rearmed when 716 * destroy_workqueue() drains pending work which in turn might try 717 * to arm a timer. After shutdown rearm attempts are silently 718 * ignored by the timer core code. 719 */ 720 timer_shutdown_sync(&qca->tx_idle_timer); 721 timer_shutdown_sync(&qca->wake_retrans_timer); 722 destroy_workqueue(qca->workqueue); 723 qca->hu = NULL; 724 725 kfree_skb(qca->rx_skb); 726 727 hu->priv = NULL; 728 729 kfree(qca); 730 731 return 0; 732 } 733 734 /* Called upon a wake-up-indication from the device. 735 */ 736 static void device_want_to_wakeup(struct hci_uart *hu) 737 { 738 unsigned long flags; 739 struct qca_data *qca = hu->priv; 740 741 BT_DBG("hu %p want to wake up", hu); 742 743 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 744 745 qca->ibs_recv_wakes++; 746 747 /* Don't wake the rx up when suspending. */ 748 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 749 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 750 return; 751 } 752 753 switch (qca->rx_ibs_state) { 754 case HCI_IBS_RX_ASLEEP: 755 /* Make sure clock is on - we may have turned clock off since 756 * receiving the wake up indicator awake rx clock. 757 */ 758 queue_work(qca->workqueue, &qca->ws_awake_rx); 759 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 760 return; 761 762 case HCI_IBS_RX_AWAKE: 763 /* Always acknowledge device wake up, 764 * sending IBS message doesn't count as TX ON. 765 */ 766 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 767 BT_ERR("Failed to acknowledge device wake up"); 768 break; 769 } 770 qca->ibs_sent_wacks++; 771 break; 772 773 default: 774 /* Any other state is illegal */ 775 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 776 qca->rx_ibs_state); 777 break; 778 } 779 780 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 781 782 /* Actually send the packets */ 783 hci_uart_tx_wakeup(hu); 784 } 785 786 /* Called upon a sleep-indication from the device. 787 */ 788 static void device_want_to_sleep(struct hci_uart *hu) 789 { 790 unsigned long flags; 791 struct qca_data *qca = hu->priv; 792 793 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 794 795 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 796 797 qca->ibs_recv_slps++; 798 799 switch (qca->rx_ibs_state) { 800 case HCI_IBS_RX_AWAKE: 801 /* Update state */ 802 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 803 /* Vote off rx clock under workqueue */ 804 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 805 break; 806 807 case HCI_IBS_RX_ASLEEP: 808 break; 809 810 default: 811 /* Any other state is illegal */ 812 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 813 qca->rx_ibs_state); 814 break; 815 } 816 817 wake_up_interruptible(&qca->suspend_wait_q); 818 819 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 820 } 821 822 /* Called upon wake-up-acknowledgement from the device 823 */ 824 static void device_woke_up(struct hci_uart *hu) 825 { 826 unsigned long flags, idle_delay; 827 struct qca_data *qca = hu->priv; 828 struct sk_buff *skb = NULL; 829 830 BT_DBG("hu %p woke up", hu); 831 832 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 833 834 qca->ibs_recv_wacks++; 835 836 /* Don't react to the wake-up-acknowledgment when suspending. */ 837 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 838 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 839 return; 840 } 841 842 switch (qca->tx_ibs_state) { 843 case HCI_IBS_TX_AWAKE: 844 /* Expect one if we send 2 WAKEs */ 845 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 846 qca->tx_ibs_state); 847 break; 848 849 case HCI_IBS_TX_WAKING: 850 /* Send pending packets */ 851 while ((skb = skb_dequeue(&qca->tx_wait_q))) 852 skb_queue_tail(&qca->txq, skb); 853 854 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 855 del_timer(&qca->wake_retrans_timer); 856 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 857 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 858 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 859 break; 860 861 case HCI_IBS_TX_ASLEEP: 862 default: 863 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 864 qca->tx_ibs_state); 865 break; 866 } 867 868 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 869 870 /* Actually send the packets */ 871 hci_uart_tx_wakeup(hu); 872 } 873 874 /* Enqueue frame for transmittion (padding, crc, etc) may be called from 875 * two simultaneous tasklets. 876 */ 877 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 878 { 879 unsigned long flags = 0, idle_delay; 880 struct qca_data *qca = hu->priv; 881 882 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 883 qca->tx_ibs_state); 884 885 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 886 /* As SSR is in progress, ignore the packets */ 887 bt_dev_dbg(hu->hdev, "SSR is in progress"); 888 kfree_skb(skb); 889 return 0; 890 } 891 892 /* Prepend skb with frame type */ 893 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 894 895 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 896 897 /* Don't go to sleep in middle of patch download or 898 * Out-Of-Band(GPIOs control) sleep is selected. 899 * Don't wake the device up when suspending. 900 */ 901 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 902 test_bit(QCA_SUSPENDING, &qca->flags)) { 903 skb_queue_tail(&qca->txq, skb); 904 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 905 return 0; 906 } 907 908 /* Act according to current state */ 909 switch (qca->tx_ibs_state) { 910 case HCI_IBS_TX_AWAKE: 911 BT_DBG("Device awake, sending normally"); 912 skb_queue_tail(&qca->txq, skb); 913 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 914 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 915 break; 916 917 case HCI_IBS_TX_ASLEEP: 918 BT_DBG("Device asleep, waking up and queueing packet"); 919 /* Save packet for later */ 920 skb_queue_tail(&qca->tx_wait_q, skb); 921 922 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 923 /* Schedule a work queue to wake up device */ 924 queue_work(qca->workqueue, &qca->ws_awake_device); 925 break; 926 927 case HCI_IBS_TX_WAKING: 928 BT_DBG("Device waking up, queueing packet"); 929 /* Transient state; just keep packet for later */ 930 skb_queue_tail(&qca->tx_wait_q, skb); 931 break; 932 933 default: 934 BT_ERR("Illegal tx state: %d (losing packet)", 935 qca->tx_ibs_state); 936 dev_kfree_skb_irq(skb); 937 break; 938 } 939 940 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 941 942 return 0; 943 } 944 945 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 946 { 947 struct hci_uart *hu = hci_get_drvdata(hdev); 948 949 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 950 951 device_want_to_sleep(hu); 952 953 kfree_skb(skb); 954 return 0; 955 } 956 957 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 958 { 959 struct hci_uart *hu = hci_get_drvdata(hdev); 960 961 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 962 963 device_want_to_wakeup(hu); 964 965 kfree_skb(skb); 966 return 0; 967 } 968 969 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 970 { 971 struct hci_uart *hu = hci_get_drvdata(hdev); 972 973 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 974 975 device_woke_up(hu); 976 977 kfree_skb(skb); 978 return 0; 979 } 980 981 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 982 { 983 /* We receive debug logs from chip as an ACL packets. 984 * Instead of sending the data to ACL to decode the 985 * received data, we are pushing them to the above layers 986 * as a diagnostic packet. 987 */ 988 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 989 return hci_recv_diag(hdev, skb); 990 991 return hci_recv_frame(hdev, skb); 992 } 993 994 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 995 { 996 struct hci_uart *hu = hci_get_drvdata(hdev); 997 struct qca_data *qca = hu->priv; 998 char buf[80]; 999 1000 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1001 qca->controller_id); 1002 skb_put_data(skb, buf, strlen(buf)); 1003 1004 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1005 qca->fw_version); 1006 skb_put_data(skb, buf, strlen(buf)); 1007 1008 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1009 skb_put_data(skb, buf, strlen(buf)); 1010 1011 snprintf(buf, sizeof(buf), "Driver: %s\n", 1012 hu->serdev->dev.driver->name); 1013 skb_put_data(skb, buf, strlen(buf)); 1014 } 1015 1016 static void qca_controller_memdump(struct work_struct *work) 1017 { 1018 struct qca_data *qca = container_of(work, struct qca_data, 1019 ctrl_memdump_evt); 1020 struct hci_uart *hu = qca->hu; 1021 struct sk_buff *skb; 1022 struct qca_memdump_event_hdr *cmd_hdr; 1023 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1024 struct qca_dump_size *dump; 1025 u16 seq_no; 1026 u32 rx_size; 1027 int ret = 0; 1028 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1029 1030 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1031 1032 mutex_lock(&qca->hci_memdump_lock); 1033 /* Skip processing the received packets if timeout detected 1034 * or memdump collection completed. 1035 */ 1036 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1037 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1038 mutex_unlock(&qca->hci_memdump_lock); 1039 return; 1040 } 1041 1042 if (!qca_memdump) { 1043 qca_memdump = kzalloc(sizeof(struct qca_memdump_info), 1044 GFP_ATOMIC); 1045 if (!qca_memdump) { 1046 mutex_unlock(&qca->hci_memdump_lock); 1047 return; 1048 } 1049 1050 qca->qca_memdump = qca_memdump; 1051 } 1052 1053 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1054 cmd_hdr = (void *) skb->data; 1055 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1056 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1057 1058 if (!seq_no) { 1059 1060 /* This is the first frame of memdump packet from 1061 * the controller, Disable IBS to recevie dump 1062 * with out any interruption, ideally time required for 1063 * the controller to send the dump is 8 seconds. let us 1064 * start timer to handle this asynchronous activity. 1065 */ 1066 set_bit(QCA_IBS_DISABLED, &qca->flags); 1067 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1068 dump = (void *) skb->data; 1069 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1070 if (!(qca_memdump->ram_dump_size)) { 1071 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1072 kfree(qca_memdump); 1073 kfree_skb(skb); 1074 mutex_unlock(&qca->hci_memdump_lock); 1075 return; 1076 } 1077 1078 queue_delayed_work(qca->workqueue, 1079 &qca->ctrl_memdump_timeout, 1080 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1081 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1082 qca_memdump->current_seq_no = 0; 1083 qca_memdump->received_dump = 0; 1084 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1085 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1086 ret); 1087 if (ret < 0) { 1088 kfree(qca->qca_memdump); 1089 qca->qca_memdump = NULL; 1090 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1091 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1092 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1093 mutex_unlock(&qca->hci_memdump_lock); 1094 return; 1095 } 1096 1097 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1098 qca_memdump->ram_dump_size); 1099 1100 } 1101 1102 /* If sequence no 0 is missed then there is no point in 1103 * accepting the other sequences. 1104 */ 1105 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1106 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1107 kfree(qca_memdump); 1108 kfree_skb(skb); 1109 mutex_unlock(&qca->hci_memdump_lock); 1110 return; 1111 } 1112 /* There could be chance of missing some packets from 1113 * the controller. In such cases let us store the dummy 1114 * packets in the buffer. 1115 */ 1116 /* For QCA6390, controller does not lost packets but 1117 * sequence number field of packet sometimes has error 1118 * bits, so skip this checking for missing packet. 1119 */ 1120 while ((seq_no > qca_memdump->current_seq_no + 1) && 1121 (soc_type != QCA_QCA6390) && 1122 seq_no != QCA_LAST_SEQUENCE_NUM) { 1123 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1124 qca_memdump->current_seq_no); 1125 rx_size = qca_memdump->received_dump; 1126 rx_size += QCA_DUMP_PACKET_SIZE; 1127 if (rx_size > qca_memdump->ram_dump_size) { 1128 bt_dev_err(hu->hdev, 1129 "QCA memdump received %d, no space for missed packet", 1130 qca_memdump->received_dump); 1131 break; 1132 } 1133 hci_devcd_append_pattern(hu->hdev, 0x00, 1134 QCA_DUMP_PACKET_SIZE); 1135 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1136 qca_memdump->current_seq_no++; 1137 } 1138 1139 rx_size = qca_memdump->received_dump + skb->len; 1140 if (rx_size <= qca_memdump->ram_dump_size) { 1141 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1142 (seq_no != qca_memdump->current_seq_no)) { 1143 bt_dev_err(hu->hdev, 1144 "QCA memdump unexpected packet %d", 1145 seq_no); 1146 } 1147 bt_dev_dbg(hu->hdev, 1148 "QCA memdump packet %d with length %d", 1149 seq_no, skb->len); 1150 hci_devcd_append(hu->hdev, skb); 1151 qca_memdump->current_seq_no += 1; 1152 qca_memdump->received_dump = rx_size; 1153 } else { 1154 bt_dev_err(hu->hdev, 1155 "QCA memdump received no space for packet %d", 1156 qca_memdump->current_seq_no); 1157 } 1158 1159 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1160 bt_dev_info(hu->hdev, 1161 "QCA memdump Done, received %d, total %d", 1162 qca_memdump->received_dump, 1163 qca_memdump->ram_dump_size); 1164 hci_devcd_complete(hu->hdev); 1165 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1166 kfree(qca->qca_memdump); 1167 qca->qca_memdump = NULL; 1168 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1169 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1170 } 1171 1172 mutex_unlock(&qca->hci_memdump_lock); 1173 } 1174 1175 } 1176 1177 static int qca_controller_memdump_event(struct hci_dev *hdev, 1178 struct sk_buff *skb) 1179 { 1180 struct hci_uart *hu = hci_get_drvdata(hdev); 1181 struct qca_data *qca = hu->priv; 1182 1183 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1184 skb_queue_tail(&qca->rx_memdump_q, skb); 1185 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1186 1187 return 0; 1188 } 1189 1190 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1191 { 1192 struct hci_uart *hu = hci_get_drvdata(hdev); 1193 struct qca_data *qca = hu->priv; 1194 1195 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1196 struct hci_event_hdr *hdr = (void *)skb->data; 1197 1198 /* For the WCN3990 the vendor command for a baudrate change 1199 * isn't sent as synchronous HCI command, because the 1200 * controller sends the corresponding vendor event with the 1201 * new baudrate. The event is received and properly decoded 1202 * after changing the baudrate of the host port. It needs to 1203 * be dropped, otherwise it can be misinterpreted as 1204 * response to a later firmware download command (also a 1205 * vendor command). 1206 */ 1207 1208 if (hdr->evt == HCI_EV_VENDOR) 1209 complete(&qca->drop_ev_comp); 1210 1211 kfree_skb(skb); 1212 1213 return 0; 1214 } 1215 /* We receive chip memory dump as an event packet, With a dedicated 1216 * handler followed by a hardware error event. When this event is 1217 * received we store dump into a file before closing hci. This 1218 * dump will help in triaging the issues. 1219 */ 1220 if ((skb->data[0] == HCI_VENDOR_PKT) && 1221 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1222 return qca_controller_memdump_event(hdev, skb); 1223 1224 return hci_recv_frame(hdev, skb); 1225 } 1226 1227 #define QCA_IBS_SLEEP_IND_EVENT \ 1228 .type = HCI_IBS_SLEEP_IND, \ 1229 .hlen = 0, \ 1230 .loff = 0, \ 1231 .lsize = 0, \ 1232 .maxlen = HCI_MAX_IBS_SIZE 1233 1234 #define QCA_IBS_WAKE_IND_EVENT \ 1235 .type = HCI_IBS_WAKE_IND, \ 1236 .hlen = 0, \ 1237 .loff = 0, \ 1238 .lsize = 0, \ 1239 .maxlen = HCI_MAX_IBS_SIZE 1240 1241 #define QCA_IBS_WAKE_ACK_EVENT \ 1242 .type = HCI_IBS_WAKE_ACK, \ 1243 .hlen = 0, \ 1244 .loff = 0, \ 1245 .lsize = 0, \ 1246 .maxlen = HCI_MAX_IBS_SIZE 1247 1248 static const struct h4_recv_pkt qca_recv_pkts[] = { 1249 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1250 { H4_RECV_SCO, .recv = hci_recv_frame }, 1251 { H4_RECV_EVENT, .recv = qca_recv_event }, 1252 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1253 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1254 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1255 }; 1256 1257 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1258 { 1259 struct qca_data *qca = hu->priv; 1260 1261 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1262 return -EUNATCH; 1263 1264 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1265 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1266 if (IS_ERR(qca->rx_skb)) { 1267 int err = PTR_ERR(qca->rx_skb); 1268 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1269 qca->rx_skb = NULL; 1270 return err; 1271 } 1272 1273 return count; 1274 } 1275 1276 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1277 { 1278 struct qca_data *qca = hu->priv; 1279 1280 return skb_dequeue(&qca->txq); 1281 } 1282 1283 static uint8_t qca_get_baudrate_value(int speed) 1284 { 1285 switch (speed) { 1286 case 9600: 1287 return QCA_BAUDRATE_9600; 1288 case 19200: 1289 return QCA_BAUDRATE_19200; 1290 case 38400: 1291 return QCA_BAUDRATE_38400; 1292 case 57600: 1293 return QCA_BAUDRATE_57600; 1294 case 115200: 1295 return QCA_BAUDRATE_115200; 1296 case 230400: 1297 return QCA_BAUDRATE_230400; 1298 case 460800: 1299 return QCA_BAUDRATE_460800; 1300 case 500000: 1301 return QCA_BAUDRATE_500000; 1302 case 921600: 1303 return QCA_BAUDRATE_921600; 1304 case 1000000: 1305 return QCA_BAUDRATE_1000000; 1306 case 2000000: 1307 return QCA_BAUDRATE_2000000; 1308 case 3000000: 1309 return QCA_BAUDRATE_3000000; 1310 case 3200000: 1311 return QCA_BAUDRATE_3200000; 1312 case 3500000: 1313 return QCA_BAUDRATE_3500000; 1314 default: 1315 return QCA_BAUDRATE_115200; 1316 } 1317 } 1318 1319 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1320 { 1321 struct hci_uart *hu = hci_get_drvdata(hdev); 1322 struct qca_data *qca = hu->priv; 1323 struct sk_buff *skb; 1324 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1325 1326 if (baudrate > QCA_BAUDRATE_3200000) 1327 return -EINVAL; 1328 1329 cmd[4] = baudrate; 1330 1331 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1332 if (!skb) { 1333 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1334 return -ENOMEM; 1335 } 1336 1337 /* Assign commands to change baudrate and packet type. */ 1338 skb_put_data(skb, cmd, sizeof(cmd)); 1339 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1340 1341 skb_queue_tail(&qca->txq, skb); 1342 hci_uart_tx_wakeup(hu); 1343 1344 /* Wait for the baudrate change request to be sent */ 1345 1346 while (!skb_queue_empty(&qca->txq)) 1347 usleep_range(100, 200); 1348 1349 if (hu->serdev) 1350 serdev_device_wait_until_sent(hu->serdev, 1351 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1352 1353 /* Give the controller time to process the request */ 1354 switch (qca_soc_type(hu)) { 1355 case QCA_WCN3988: 1356 case QCA_WCN3990: 1357 case QCA_WCN3991: 1358 case QCA_WCN3998: 1359 case QCA_WCN6750: 1360 case QCA_WCN6855: 1361 case QCA_WCN7850: 1362 usleep_range(1000, 10000); 1363 break; 1364 1365 default: 1366 msleep(300); 1367 } 1368 1369 return 0; 1370 } 1371 1372 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1373 { 1374 if (hu->serdev) 1375 serdev_device_set_baudrate(hu->serdev, speed); 1376 else 1377 hci_uart_set_baudrate(hu, speed); 1378 } 1379 1380 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1381 { 1382 int ret; 1383 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1384 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1385 1386 /* These power pulses are single byte command which are sent 1387 * at required baudrate to wcn3990. On wcn3990, we have an external 1388 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1389 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1390 * and also we use the same power inputs to turn on and off for 1391 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1392 * we send a power on pulse at 115200 bps. This algorithm will help to 1393 * save power. Disabling hardware flow control is mandatory while 1394 * sending power pulses to SoC. 1395 */ 1396 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1397 1398 serdev_device_write_flush(hu->serdev); 1399 hci_uart_set_flow_control(hu, true); 1400 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1401 if (ret < 0) { 1402 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1403 return ret; 1404 } 1405 1406 serdev_device_wait_until_sent(hu->serdev, timeout); 1407 hci_uart_set_flow_control(hu, false); 1408 1409 /* Give to controller time to boot/shutdown */ 1410 if (on) 1411 msleep(100); 1412 else 1413 usleep_range(1000, 10000); 1414 1415 return 0; 1416 } 1417 1418 static unsigned int qca_get_speed(struct hci_uart *hu, 1419 enum qca_speed_type speed_type) 1420 { 1421 unsigned int speed = 0; 1422 1423 if (speed_type == QCA_INIT_SPEED) { 1424 if (hu->init_speed) 1425 speed = hu->init_speed; 1426 else if (hu->proto->init_speed) 1427 speed = hu->proto->init_speed; 1428 } else { 1429 if (hu->oper_speed) 1430 speed = hu->oper_speed; 1431 else if (hu->proto->oper_speed) 1432 speed = hu->proto->oper_speed; 1433 } 1434 1435 return speed; 1436 } 1437 1438 static int qca_check_speeds(struct hci_uart *hu) 1439 { 1440 switch (qca_soc_type(hu)) { 1441 case QCA_WCN3988: 1442 case QCA_WCN3990: 1443 case QCA_WCN3991: 1444 case QCA_WCN3998: 1445 case QCA_WCN6750: 1446 case QCA_WCN6855: 1447 case QCA_WCN7850: 1448 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1449 !qca_get_speed(hu, QCA_OPER_SPEED)) 1450 return -EINVAL; 1451 break; 1452 1453 default: 1454 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1455 !qca_get_speed(hu, QCA_OPER_SPEED)) 1456 return -EINVAL; 1457 } 1458 1459 return 0; 1460 } 1461 1462 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1463 { 1464 unsigned int speed, qca_baudrate; 1465 struct qca_data *qca = hu->priv; 1466 int ret = 0; 1467 1468 if (speed_type == QCA_INIT_SPEED) { 1469 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1470 if (speed) 1471 host_set_baudrate(hu, speed); 1472 } else { 1473 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1474 1475 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1476 if (!speed) 1477 return 0; 1478 1479 /* Disable flow control for wcn3990 to deassert RTS while 1480 * changing the baudrate of chip and host. 1481 */ 1482 switch (soc_type) { 1483 case QCA_WCN3988: 1484 case QCA_WCN3990: 1485 case QCA_WCN3991: 1486 case QCA_WCN3998: 1487 case QCA_WCN6750: 1488 case QCA_WCN6855: 1489 case QCA_WCN7850: 1490 hci_uart_set_flow_control(hu, true); 1491 break; 1492 1493 default: 1494 break; 1495 } 1496 1497 switch (soc_type) { 1498 case QCA_WCN3990: 1499 reinit_completion(&qca->drop_ev_comp); 1500 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1501 break; 1502 1503 default: 1504 break; 1505 } 1506 1507 qca_baudrate = qca_get_baudrate_value(speed); 1508 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1509 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1510 if (ret) 1511 goto error; 1512 1513 host_set_baudrate(hu, speed); 1514 1515 error: 1516 switch (soc_type) { 1517 case QCA_WCN3988: 1518 case QCA_WCN3990: 1519 case QCA_WCN3991: 1520 case QCA_WCN3998: 1521 case QCA_WCN6750: 1522 case QCA_WCN6855: 1523 case QCA_WCN7850: 1524 hci_uart_set_flow_control(hu, false); 1525 break; 1526 1527 default: 1528 break; 1529 } 1530 1531 switch (soc_type) { 1532 case QCA_WCN3990: 1533 /* Wait for the controller to send the vendor event 1534 * for the baudrate change command. 1535 */ 1536 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1537 msecs_to_jiffies(100))) { 1538 bt_dev_err(hu->hdev, 1539 "Failed to change controller baudrate\n"); 1540 ret = -ETIMEDOUT; 1541 } 1542 1543 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1544 break; 1545 1546 default: 1547 break; 1548 } 1549 } 1550 1551 return ret; 1552 } 1553 1554 static int qca_send_crashbuffer(struct hci_uart *hu) 1555 { 1556 struct qca_data *qca = hu->priv; 1557 struct sk_buff *skb; 1558 1559 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1560 if (!skb) { 1561 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1562 return -ENOMEM; 1563 } 1564 1565 /* We forcefully crash the controller, by sending 0xfb byte for 1566 * 1024 times. We also might have chance of losing data, To be 1567 * on safer side we send 1096 bytes to the SoC. 1568 */ 1569 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1570 QCA_CRASHBYTE_PACKET_LEN); 1571 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1572 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1573 skb_queue_tail(&qca->txq, skb); 1574 hci_uart_tx_wakeup(hu); 1575 1576 return 0; 1577 } 1578 1579 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1580 { 1581 struct hci_uart *hu = hci_get_drvdata(hdev); 1582 struct qca_data *qca = hu->priv; 1583 1584 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1585 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1586 1587 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1588 } 1589 1590 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1591 { 1592 struct hci_uart *hu = hci_get_drvdata(hdev); 1593 struct qca_data *qca = hu->priv; 1594 1595 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1596 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1597 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1598 1599 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1600 /* If hardware error event received for other than QCA 1601 * soc memory dump event, then we need to crash the SOC 1602 * and wait here for 8 seconds to get the dump packets. 1603 * This will block main thread to be on hold until we 1604 * collect dump. 1605 */ 1606 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1607 qca_send_crashbuffer(hu); 1608 qca_wait_for_dump_collection(hdev); 1609 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1610 /* Let us wait here until memory dump collected or 1611 * memory dump timer expired. 1612 */ 1613 bt_dev_info(hdev, "waiting for dump to complete"); 1614 qca_wait_for_dump_collection(hdev); 1615 } 1616 1617 mutex_lock(&qca->hci_memdump_lock); 1618 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1619 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1620 hci_devcd_abort(hu->hdev); 1621 if (qca->qca_memdump) { 1622 kfree(qca->qca_memdump); 1623 qca->qca_memdump = NULL; 1624 } 1625 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1626 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1627 } 1628 mutex_unlock(&qca->hci_memdump_lock); 1629 1630 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1631 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1632 cancel_work_sync(&qca->ctrl_memdump_evt); 1633 skb_queue_purge(&qca->rx_memdump_q); 1634 } 1635 1636 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1637 } 1638 1639 static void qca_cmd_timeout(struct hci_dev *hdev) 1640 { 1641 struct hci_uart *hu = hci_get_drvdata(hdev); 1642 struct qca_data *qca = hu->priv; 1643 1644 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1645 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1646 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1647 qca_send_crashbuffer(hu); 1648 qca_wait_for_dump_collection(hdev); 1649 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1650 /* Let us wait here until memory dump collected or 1651 * memory dump timer expired. 1652 */ 1653 bt_dev_info(hdev, "waiting for dump to complete"); 1654 qca_wait_for_dump_collection(hdev); 1655 } 1656 1657 mutex_lock(&qca->hci_memdump_lock); 1658 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1659 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1660 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1661 /* Inject hw error event to reset the device 1662 * and driver. 1663 */ 1664 hci_reset_dev(hu->hdev); 1665 } 1666 } 1667 mutex_unlock(&qca->hci_memdump_lock); 1668 } 1669 1670 static bool qca_wakeup(struct hci_dev *hdev) 1671 { 1672 struct hci_uart *hu = hci_get_drvdata(hdev); 1673 bool wakeup; 1674 1675 if (!hu->serdev) 1676 return true; 1677 1678 /* BT SoC attached through the serial bus is handled by the serdev driver. 1679 * So we need to use the device handle of the serdev driver to get the 1680 * status of device may wakeup. 1681 */ 1682 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1683 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1684 1685 return wakeup; 1686 } 1687 1688 static int qca_regulator_init(struct hci_uart *hu) 1689 { 1690 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1691 struct qca_serdev *qcadev; 1692 int ret; 1693 bool sw_ctrl_state; 1694 1695 /* Check for vregs status, may be hci down has turned 1696 * off the voltage regulator. 1697 */ 1698 qcadev = serdev_device_get_drvdata(hu->serdev); 1699 if (!qcadev->bt_power->vregs_on) { 1700 serdev_device_close(hu->serdev); 1701 ret = qca_regulator_enable(qcadev); 1702 if (ret) 1703 return ret; 1704 1705 ret = serdev_device_open(hu->serdev); 1706 if (ret) { 1707 bt_dev_err(hu->hdev, "failed to open port"); 1708 return ret; 1709 } 1710 } 1711 1712 switch (soc_type) { 1713 case QCA_WCN3988: 1714 case QCA_WCN3990: 1715 case QCA_WCN3991: 1716 case QCA_WCN3998: 1717 /* Forcefully enable wcn399x to enter in to boot mode. */ 1718 host_set_baudrate(hu, 2400); 1719 ret = qca_send_power_pulse(hu, false); 1720 if (ret) 1721 return ret; 1722 break; 1723 1724 default: 1725 break; 1726 } 1727 1728 /* For wcn6750 need to enable gpio bt_en */ 1729 if (qcadev->bt_en) { 1730 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1731 msleep(50); 1732 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1733 msleep(50); 1734 if (qcadev->sw_ctrl) { 1735 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1736 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1737 } 1738 } 1739 1740 qca_set_speed(hu, QCA_INIT_SPEED); 1741 1742 switch (soc_type) { 1743 case QCA_WCN3988: 1744 case QCA_WCN3990: 1745 case QCA_WCN3991: 1746 case QCA_WCN3998: 1747 ret = qca_send_power_pulse(hu, true); 1748 if (ret) 1749 return ret; 1750 break; 1751 1752 default: 1753 break; 1754 } 1755 1756 /* Now the device is in ready state to communicate with host. 1757 * To sync host with device we need to reopen port. 1758 * Without this, we will have RTS and CTS synchronization 1759 * issues. 1760 */ 1761 serdev_device_close(hu->serdev); 1762 ret = serdev_device_open(hu->serdev); 1763 if (ret) { 1764 bt_dev_err(hu->hdev, "failed to open port"); 1765 return ret; 1766 } 1767 1768 hci_uart_set_flow_control(hu, false); 1769 1770 return 0; 1771 } 1772 1773 static int qca_power_on(struct hci_dev *hdev) 1774 { 1775 struct hci_uart *hu = hci_get_drvdata(hdev); 1776 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1777 struct qca_serdev *qcadev; 1778 struct qca_data *qca = hu->priv; 1779 int ret = 0; 1780 1781 /* Non-serdev device usually is powered by external power 1782 * and don't need additional action in driver for power on 1783 */ 1784 if (!hu->serdev) 1785 return 0; 1786 1787 switch (soc_type) { 1788 case QCA_WCN3988: 1789 case QCA_WCN3990: 1790 case QCA_WCN3991: 1791 case QCA_WCN3998: 1792 case QCA_WCN6750: 1793 case QCA_WCN6855: 1794 case QCA_WCN7850: 1795 ret = qca_regulator_init(hu); 1796 break; 1797 1798 default: 1799 qcadev = serdev_device_get_drvdata(hu->serdev); 1800 if (qcadev->bt_en) { 1801 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1802 /* Controller needs time to bootup. */ 1803 msleep(150); 1804 } 1805 } 1806 1807 clear_bit(QCA_BT_OFF, &qca->flags); 1808 return ret; 1809 } 1810 1811 static void hci_coredump_qca(struct hci_dev *hdev) 1812 { 1813 int err; 1814 static const u8 param[] = { 0x26 }; 1815 1816 err = __hci_cmd_send(hdev, 0xfc0c, 1, param); 1817 if (err < 0) 1818 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err); 1819 } 1820 1821 static int qca_setup(struct hci_uart *hu) 1822 { 1823 struct hci_dev *hdev = hu->hdev; 1824 struct qca_data *qca = hu->priv; 1825 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1826 unsigned int retries = 0; 1827 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1828 const char *firmware_name = qca_get_firmware_name(hu); 1829 int ret; 1830 struct qca_btsoc_version ver; 1831 struct qca_serdev *qcadev; 1832 const char *soc_name; 1833 1834 ret = qca_check_speeds(hu); 1835 if (ret) 1836 return ret; 1837 1838 clear_bit(QCA_ROM_FW, &qca->flags); 1839 /* Patch downloading has to be done without IBS mode */ 1840 set_bit(QCA_IBS_DISABLED, &qca->flags); 1841 1842 /* Enable controller to do both LE scan and BR/EDR inquiry 1843 * simultaneously. 1844 */ 1845 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1846 1847 switch (soc_type) { 1848 case QCA_QCA2066: 1849 soc_name = "qca2066"; 1850 break; 1851 1852 case QCA_WCN3988: 1853 case QCA_WCN3990: 1854 case QCA_WCN3991: 1855 case QCA_WCN3998: 1856 soc_name = "wcn399x"; 1857 break; 1858 1859 case QCA_WCN6750: 1860 soc_name = "wcn6750"; 1861 break; 1862 1863 case QCA_WCN6855: 1864 soc_name = "wcn6855"; 1865 break; 1866 1867 case QCA_WCN7850: 1868 soc_name = "wcn7850"; 1869 break; 1870 1871 default: 1872 soc_name = "ROME/QCA6390"; 1873 } 1874 bt_dev_info(hdev, "setting up %s", soc_name); 1875 1876 qca->memdump_state = QCA_MEMDUMP_IDLE; 1877 1878 retry: 1879 ret = qca_power_on(hdev); 1880 if (ret) 1881 goto out; 1882 1883 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1884 1885 switch (soc_type) { 1886 case QCA_WCN3988: 1887 case QCA_WCN3990: 1888 case QCA_WCN3991: 1889 case QCA_WCN3998: 1890 case QCA_WCN6750: 1891 case QCA_WCN6855: 1892 case QCA_WCN7850: 1893 qcadev = serdev_device_get_drvdata(hu->serdev); 1894 if (qcadev->bdaddr_property_broken) 1895 set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks); 1896 1897 hci_set_aosp_capable(hdev); 1898 1899 ret = qca_read_soc_version(hdev, &ver, soc_type); 1900 if (ret) 1901 goto out; 1902 break; 1903 1904 default: 1905 qca_set_speed(hu, QCA_INIT_SPEED); 1906 } 1907 1908 /* Setup user speed if needed */ 1909 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1910 if (speed) { 1911 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1912 if (ret) 1913 goto out; 1914 1915 qca_baudrate = qca_get_baudrate_value(speed); 1916 } 1917 1918 switch (soc_type) { 1919 case QCA_WCN3988: 1920 case QCA_WCN3990: 1921 case QCA_WCN3991: 1922 case QCA_WCN3998: 1923 case QCA_WCN6750: 1924 case QCA_WCN6855: 1925 case QCA_WCN7850: 1926 break; 1927 1928 default: 1929 /* Get QCA version information */ 1930 ret = qca_read_soc_version(hdev, &ver, soc_type); 1931 if (ret) 1932 goto out; 1933 } 1934 1935 /* Setup patch / NVM configurations */ 1936 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 1937 firmware_name); 1938 if (!ret) { 1939 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1940 qca_debugfs_init(hdev); 1941 hu->hdev->hw_error = qca_hw_error; 1942 hu->hdev->cmd_timeout = qca_cmd_timeout; 1943 if (hu->serdev) { 1944 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 1945 hu->hdev->wakeup = qca_wakeup; 1946 } 1947 } else if (ret == -ENOENT) { 1948 /* No patch/nvm-config found, run with original fw/config */ 1949 set_bit(QCA_ROM_FW, &qca->flags); 1950 ret = 0; 1951 } else if (ret == -EAGAIN) { 1952 /* 1953 * Userspace firmware loader will return -EAGAIN in case no 1954 * patch/nvm-config is found, so run with original fw/config. 1955 */ 1956 set_bit(QCA_ROM_FW, &qca->flags); 1957 ret = 0; 1958 } 1959 1960 out: 1961 if (ret && retries < MAX_INIT_RETRIES) { 1962 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 1963 qca_power_shutdown(hu); 1964 if (hu->serdev) { 1965 serdev_device_close(hu->serdev); 1966 ret = serdev_device_open(hu->serdev); 1967 if (ret) { 1968 bt_dev_err(hdev, "failed to open port"); 1969 return ret; 1970 } 1971 } 1972 retries++; 1973 goto retry; 1974 } 1975 1976 /* Setup bdaddr */ 1977 if (soc_type == QCA_ROME) 1978 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 1979 else 1980 hu->hdev->set_bdaddr = qca_set_bdaddr; 1981 qca->fw_version = le16_to_cpu(ver.patch_ver); 1982 qca->controller_id = le16_to_cpu(ver.rom_ver); 1983 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 1984 1985 return ret; 1986 } 1987 1988 static const struct hci_uart_proto qca_proto = { 1989 .id = HCI_UART_QCA, 1990 .name = "QCA", 1991 .manufacturer = 29, 1992 .init_speed = 115200, 1993 .oper_speed = 3000000, 1994 .open = qca_open, 1995 .close = qca_close, 1996 .flush = qca_flush, 1997 .setup = qca_setup, 1998 .recv = qca_recv, 1999 .enqueue = qca_enqueue, 2000 .dequeue = qca_dequeue, 2001 }; 2002 2003 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 2004 .soc_type = QCA_WCN3988, 2005 .vregs = (struct qca_vreg []) { 2006 { "vddio", 15000 }, 2007 { "vddxo", 80000 }, 2008 { "vddrf", 300000 }, 2009 { "vddch0", 450000 }, 2010 }, 2011 .num_vregs = 4, 2012 }; 2013 2014 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2015 .soc_type = QCA_WCN3990, 2016 .vregs = (struct qca_vreg []) { 2017 { "vddio", 15000 }, 2018 { "vddxo", 80000 }, 2019 { "vddrf", 300000 }, 2020 { "vddch0", 450000 }, 2021 }, 2022 .num_vregs = 4, 2023 }; 2024 2025 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2026 .soc_type = QCA_WCN3991, 2027 .vregs = (struct qca_vreg []) { 2028 { "vddio", 15000 }, 2029 { "vddxo", 80000 }, 2030 { "vddrf", 300000 }, 2031 { "vddch0", 450000 }, 2032 }, 2033 .num_vregs = 4, 2034 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2035 }; 2036 2037 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2038 .soc_type = QCA_WCN3998, 2039 .vregs = (struct qca_vreg []) { 2040 { "vddio", 10000 }, 2041 { "vddxo", 80000 }, 2042 { "vddrf", 300000 }, 2043 { "vddch0", 450000 }, 2044 }, 2045 .num_vregs = 4, 2046 }; 2047 2048 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2049 .soc_type = QCA_QCA2066, 2050 .num_vregs = 0, 2051 }; 2052 2053 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2054 .soc_type = QCA_QCA6390, 2055 .num_vregs = 0, 2056 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2057 }; 2058 2059 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2060 .soc_type = QCA_WCN6750, 2061 .vregs = (struct qca_vreg []) { 2062 { "vddio", 5000 }, 2063 { "vddaon", 26000 }, 2064 { "vddbtcxmx", 126000 }, 2065 { "vddrfacmn", 12500 }, 2066 { "vddrfa0p8", 102000 }, 2067 { "vddrfa1p7", 302000 }, 2068 { "vddrfa1p2", 257000 }, 2069 { "vddrfa2p2", 1700000 }, 2070 { "vddasd", 200 }, 2071 }, 2072 .num_vregs = 9, 2073 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2074 }; 2075 2076 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2077 .soc_type = QCA_WCN6855, 2078 .vregs = (struct qca_vreg []) { 2079 { "vddio", 5000 }, 2080 { "vddbtcxmx", 126000 }, 2081 { "vddrfacmn", 12500 }, 2082 { "vddrfa0p8", 102000 }, 2083 { "vddrfa1p7", 302000 }, 2084 { "vddrfa1p2", 257000 }, 2085 }, 2086 .num_vregs = 6, 2087 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2088 }; 2089 2090 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2091 .soc_type = QCA_WCN7850, 2092 .vregs = (struct qca_vreg []) { 2093 { "vddio", 5000 }, 2094 { "vddaon", 26000 }, 2095 { "vdddig", 126000 }, 2096 { "vddrfa0p8", 102000 }, 2097 { "vddrfa1p2", 257000 }, 2098 { "vddrfa1p9", 302000 }, 2099 }, 2100 .num_vregs = 6, 2101 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2102 }; 2103 2104 static void qca_power_shutdown(struct hci_uart *hu) 2105 { 2106 struct qca_serdev *qcadev; 2107 struct qca_data *qca = hu->priv; 2108 unsigned long flags; 2109 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2110 bool sw_ctrl_state; 2111 2112 /* From this point we go into power off state. But serial port is 2113 * still open, stop queueing the IBS data and flush all the buffered 2114 * data in skb's. 2115 */ 2116 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2117 set_bit(QCA_IBS_DISABLED, &qca->flags); 2118 qca_flush(hu); 2119 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2120 2121 /* Non-serdev device usually is powered by external power 2122 * and don't need additional action in driver for power down 2123 */ 2124 if (!hu->serdev) 2125 return; 2126 2127 qcadev = serdev_device_get_drvdata(hu->serdev); 2128 2129 switch (soc_type) { 2130 case QCA_WCN3988: 2131 case QCA_WCN3990: 2132 case QCA_WCN3991: 2133 case QCA_WCN3998: 2134 host_set_baudrate(hu, 2400); 2135 qca_send_power_pulse(hu, false); 2136 qca_regulator_disable(qcadev); 2137 break; 2138 2139 case QCA_WCN6750: 2140 case QCA_WCN6855: 2141 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2142 msleep(100); 2143 qca_regulator_disable(qcadev); 2144 if (qcadev->sw_ctrl) { 2145 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2146 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 2147 } 2148 break; 2149 2150 default: 2151 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2152 } 2153 2154 set_bit(QCA_BT_OFF, &qca->flags); 2155 } 2156 2157 static int qca_power_off(struct hci_dev *hdev) 2158 { 2159 struct hci_uart *hu = hci_get_drvdata(hdev); 2160 struct qca_data *qca = hu->priv; 2161 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2162 2163 hu->hdev->hw_error = NULL; 2164 hu->hdev->cmd_timeout = NULL; 2165 2166 del_timer_sync(&qca->wake_retrans_timer); 2167 del_timer_sync(&qca->tx_idle_timer); 2168 2169 /* Stop sending shutdown command if soc crashes. */ 2170 if (soc_type != QCA_ROME 2171 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2172 qca_send_pre_shutdown_cmd(hdev); 2173 usleep_range(8000, 10000); 2174 } 2175 2176 qca_power_shutdown(hu); 2177 return 0; 2178 } 2179 2180 static int qca_regulator_enable(struct qca_serdev *qcadev) 2181 { 2182 struct qca_power *power = qcadev->bt_power; 2183 int ret; 2184 2185 /* Already enabled */ 2186 if (power->vregs_on) 2187 return 0; 2188 2189 BT_DBG("enabling %d regulators)", power->num_vregs); 2190 2191 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2192 if (ret) 2193 return ret; 2194 2195 power->vregs_on = true; 2196 2197 ret = clk_prepare_enable(qcadev->susclk); 2198 if (ret) 2199 qca_regulator_disable(qcadev); 2200 2201 return ret; 2202 } 2203 2204 static void qca_regulator_disable(struct qca_serdev *qcadev) 2205 { 2206 struct qca_power *power; 2207 2208 if (!qcadev) 2209 return; 2210 2211 power = qcadev->bt_power; 2212 2213 /* Already disabled? */ 2214 if (!power->vregs_on) 2215 return; 2216 2217 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2218 power->vregs_on = false; 2219 2220 clk_disable_unprepare(qcadev->susclk); 2221 } 2222 2223 static int qca_init_regulators(struct qca_power *qca, 2224 const struct qca_vreg *vregs, size_t num_vregs) 2225 { 2226 struct regulator_bulk_data *bulk; 2227 int ret; 2228 int i; 2229 2230 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2231 if (!bulk) 2232 return -ENOMEM; 2233 2234 for (i = 0; i < num_vregs; i++) 2235 bulk[i].supply = vregs[i].name; 2236 2237 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2238 if (ret < 0) 2239 return ret; 2240 2241 for (i = 0; i < num_vregs; i++) { 2242 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2243 if (ret) 2244 return ret; 2245 } 2246 2247 qca->vreg_bulk = bulk; 2248 qca->num_vregs = num_vregs; 2249 2250 return 0; 2251 } 2252 2253 static int qca_serdev_probe(struct serdev_device *serdev) 2254 { 2255 struct qca_serdev *qcadev; 2256 struct hci_dev *hdev; 2257 const struct qca_device_data *data; 2258 int err; 2259 bool power_ctrl_enabled = true; 2260 2261 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2262 if (!qcadev) 2263 return -ENOMEM; 2264 2265 qcadev->serdev_hu.serdev = serdev; 2266 data = device_get_match_data(&serdev->dev); 2267 serdev_device_set_drvdata(serdev, qcadev); 2268 device_property_read_string(&serdev->dev, "firmware-name", 2269 &qcadev->firmware_name); 2270 device_property_read_u32(&serdev->dev, "max-speed", 2271 &qcadev->oper_speed); 2272 if (!qcadev->oper_speed) 2273 BT_DBG("UART will pick default operating speed"); 2274 2275 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, 2276 "qcom,local-bd-address-broken"); 2277 2278 if (data) 2279 qcadev->btsoc_type = data->soc_type; 2280 else 2281 qcadev->btsoc_type = QCA_ROME; 2282 2283 switch (qcadev->btsoc_type) { 2284 case QCA_WCN3988: 2285 case QCA_WCN3990: 2286 case QCA_WCN3991: 2287 case QCA_WCN3998: 2288 case QCA_WCN6750: 2289 case QCA_WCN6855: 2290 case QCA_WCN7850: 2291 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2292 sizeof(struct qca_power), 2293 GFP_KERNEL); 2294 if (!qcadev->bt_power) 2295 return -ENOMEM; 2296 2297 qcadev->bt_power->dev = &serdev->dev; 2298 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2299 data->num_vregs); 2300 if (err) { 2301 BT_ERR("Failed to init regulators:%d", err); 2302 return err; 2303 } 2304 2305 qcadev->bt_power->vregs_on = false; 2306 2307 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2308 GPIOD_OUT_LOW); 2309 if (IS_ERR(qcadev->bt_en) && 2310 (data->soc_type == QCA_WCN6750 || 2311 data->soc_type == QCA_WCN6855)) { 2312 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); 2313 return PTR_ERR(qcadev->bt_en); 2314 } 2315 2316 if (!qcadev->bt_en) 2317 power_ctrl_enabled = false; 2318 2319 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2320 GPIOD_IN); 2321 if (IS_ERR(qcadev->sw_ctrl) && 2322 (data->soc_type == QCA_WCN6750 || 2323 data->soc_type == QCA_WCN6855 || 2324 data->soc_type == QCA_WCN7850)) { 2325 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2326 return PTR_ERR(qcadev->sw_ctrl); 2327 } 2328 2329 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2330 if (IS_ERR(qcadev->susclk)) { 2331 dev_err(&serdev->dev, "failed to acquire clk\n"); 2332 return PTR_ERR(qcadev->susclk); 2333 } 2334 2335 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2336 if (err) { 2337 BT_ERR("wcn3990 serdev registration failed"); 2338 return err; 2339 } 2340 break; 2341 2342 default: 2343 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2344 GPIOD_OUT_LOW); 2345 if (IS_ERR(qcadev->bt_en)) { 2346 dev_err(&serdev->dev, "failed to acquire enable gpio\n"); 2347 return PTR_ERR(qcadev->bt_en); 2348 } 2349 2350 if (!qcadev->bt_en) 2351 power_ctrl_enabled = false; 2352 2353 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2354 if (IS_ERR(qcadev->susclk)) { 2355 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2356 return PTR_ERR(qcadev->susclk); 2357 } 2358 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); 2359 if (err) 2360 return err; 2361 2362 err = clk_prepare_enable(qcadev->susclk); 2363 if (err) 2364 return err; 2365 2366 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2367 if (err) { 2368 BT_ERR("Rome serdev registration failed"); 2369 clk_disable_unprepare(qcadev->susclk); 2370 return err; 2371 } 2372 } 2373 2374 hdev = qcadev->serdev_hu.hdev; 2375 2376 if (power_ctrl_enabled) { 2377 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 2378 hdev->shutdown = qca_power_off; 2379 } 2380 2381 if (data) { 2382 /* Wideband speech support must be set per driver since it can't 2383 * be queried via hci. Same with the valid le states quirk. 2384 */ 2385 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2386 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, 2387 &hdev->quirks); 2388 2389 if (data->capabilities & QCA_CAP_VALID_LE_STATES) 2390 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); 2391 } 2392 2393 return 0; 2394 } 2395 2396 static void qca_serdev_remove(struct serdev_device *serdev) 2397 { 2398 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2399 struct qca_power *power = qcadev->bt_power; 2400 2401 switch (qcadev->btsoc_type) { 2402 case QCA_WCN3988: 2403 case QCA_WCN3990: 2404 case QCA_WCN3991: 2405 case QCA_WCN3998: 2406 case QCA_WCN6750: 2407 case QCA_WCN6855: 2408 case QCA_WCN7850: 2409 if (power->vregs_on) { 2410 qca_power_shutdown(&qcadev->serdev_hu); 2411 break; 2412 } 2413 fallthrough; 2414 2415 default: 2416 if (qcadev->susclk) 2417 clk_disable_unprepare(qcadev->susclk); 2418 } 2419 2420 hci_uart_unregister_device(&qcadev->serdev_hu); 2421 } 2422 2423 static void qca_serdev_shutdown(struct device *dev) 2424 { 2425 int ret; 2426 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2427 struct serdev_device *serdev = to_serdev_device(dev); 2428 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2429 struct hci_uart *hu = &qcadev->serdev_hu; 2430 struct hci_dev *hdev = hu->hdev; 2431 struct qca_data *qca = hu->priv; 2432 const u8 ibs_wake_cmd[] = { 0xFD }; 2433 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2434 2435 if (qcadev->btsoc_type == QCA_QCA6390) { 2436 if (test_bit(QCA_BT_OFF, &qca->flags) || 2437 !test_bit(HCI_RUNNING, &hdev->flags)) 2438 return; 2439 2440 serdev_device_write_flush(serdev); 2441 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2442 sizeof(ibs_wake_cmd)); 2443 if (ret < 0) { 2444 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2445 return; 2446 } 2447 serdev_device_wait_until_sent(serdev, timeout); 2448 usleep_range(8000, 10000); 2449 2450 serdev_device_write_flush(serdev); 2451 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2452 sizeof(edl_reset_soc_cmd)); 2453 if (ret < 0) { 2454 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2455 return; 2456 } 2457 serdev_device_wait_until_sent(serdev, timeout); 2458 usleep_range(8000, 10000); 2459 } 2460 } 2461 2462 static int __maybe_unused qca_suspend(struct device *dev) 2463 { 2464 struct serdev_device *serdev = to_serdev_device(dev); 2465 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2466 struct hci_uart *hu = &qcadev->serdev_hu; 2467 struct qca_data *qca = hu->priv; 2468 unsigned long flags; 2469 bool tx_pending = false; 2470 int ret = 0; 2471 u8 cmd; 2472 u32 wait_timeout = 0; 2473 2474 set_bit(QCA_SUSPENDING, &qca->flags); 2475 2476 /* if BT SoC is running with default firmware then it does not 2477 * support in-band sleep 2478 */ 2479 if (test_bit(QCA_ROM_FW, &qca->flags)) 2480 return 0; 2481 2482 /* During SSR after memory dump collection, controller will be 2483 * powered off and then powered on.If controller is powered off 2484 * during SSR then we should wait until SSR is completed. 2485 */ 2486 if (test_bit(QCA_BT_OFF, &qca->flags) && 2487 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2488 return 0; 2489 2490 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2491 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2492 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2493 IBS_DISABLE_SSR_TIMEOUT_MS : 2494 FW_DOWNLOAD_TIMEOUT_MS; 2495 2496 /* QCA_IBS_DISABLED flag is set to true, During FW download 2497 * and during memory dump collection. It is reset to false, 2498 * After FW download complete. 2499 */ 2500 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2501 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2502 2503 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2504 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2505 ret = -ETIMEDOUT; 2506 goto error; 2507 } 2508 } 2509 2510 cancel_work_sync(&qca->ws_awake_device); 2511 cancel_work_sync(&qca->ws_awake_rx); 2512 2513 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2514 flags, SINGLE_DEPTH_NESTING); 2515 2516 switch (qca->tx_ibs_state) { 2517 case HCI_IBS_TX_WAKING: 2518 del_timer(&qca->wake_retrans_timer); 2519 fallthrough; 2520 case HCI_IBS_TX_AWAKE: 2521 del_timer(&qca->tx_idle_timer); 2522 2523 serdev_device_write_flush(hu->serdev); 2524 cmd = HCI_IBS_SLEEP_IND; 2525 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2526 2527 if (ret < 0) { 2528 BT_ERR("Failed to send SLEEP to device"); 2529 break; 2530 } 2531 2532 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2533 qca->ibs_sent_slps++; 2534 tx_pending = true; 2535 break; 2536 2537 case HCI_IBS_TX_ASLEEP: 2538 break; 2539 2540 default: 2541 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2542 ret = -EINVAL; 2543 break; 2544 } 2545 2546 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2547 2548 if (ret < 0) 2549 goto error; 2550 2551 if (tx_pending) { 2552 serdev_device_wait_until_sent(hu->serdev, 2553 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2554 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2555 } 2556 2557 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2558 * to sleep, so that the packet does not wake the system later. 2559 */ 2560 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2561 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2562 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2563 if (ret == 0) { 2564 ret = -ETIMEDOUT; 2565 goto error; 2566 } 2567 2568 return 0; 2569 2570 error: 2571 clear_bit(QCA_SUSPENDING, &qca->flags); 2572 2573 return ret; 2574 } 2575 2576 static int __maybe_unused qca_resume(struct device *dev) 2577 { 2578 struct serdev_device *serdev = to_serdev_device(dev); 2579 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2580 struct hci_uart *hu = &qcadev->serdev_hu; 2581 struct qca_data *qca = hu->priv; 2582 2583 clear_bit(QCA_SUSPENDING, &qca->flags); 2584 2585 return 0; 2586 } 2587 2588 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2589 2590 #ifdef CONFIG_OF 2591 static const struct of_device_id qca_bluetooth_of_match[] = { 2592 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2593 { .compatible = "qcom,qca6174-bt" }, 2594 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2595 { .compatible = "qcom,qca9377-bt" }, 2596 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2597 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2598 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2599 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2600 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2601 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2602 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2603 { /* sentinel */ } 2604 }; 2605 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2606 #endif 2607 2608 #ifdef CONFIG_ACPI 2609 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2610 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2611 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2612 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2613 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2614 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2615 { }, 2616 }; 2617 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2618 #endif 2619 2620 #ifdef CONFIG_DEV_COREDUMP 2621 static void hciqca_coredump(struct device *dev) 2622 { 2623 struct serdev_device *serdev = to_serdev_device(dev); 2624 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2625 struct hci_uart *hu = &qcadev->serdev_hu; 2626 struct hci_dev *hdev = hu->hdev; 2627 2628 if (hdev->dump.coredump) 2629 hdev->dump.coredump(hdev); 2630 } 2631 #endif 2632 2633 static struct serdev_device_driver qca_serdev_driver = { 2634 .probe = qca_serdev_probe, 2635 .remove = qca_serdev_remove, 2636 .driver = { 2637 .name = "hci_uart_qca", 2638 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2639 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2640 .shutdown = qca_serdev_shutdown, 2641 .pm = &qca_pm_ops, 2642 #ifdef CONFIG_DEV_COREDUMP 2643 .coredump = hciqca_coredump, 2644 #endif 2645 }, 2646 }; 2647 2648 int __init qca_init(void) 2649 { 2650 serdev_device_driver_register(&qca_serdev_driver); 2651 2652 return hci_uart_register_proto(&qca_proto); 2653 } 2654 2655 int __exit qca_deinit(void) 2656 { 2657 serdev_device_driver_unregister(&qca_serdev_driver); 2658 2659 return hci_uart_unregister_proto(&qca_proto); 2660 } 2661