1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Compatibility mode system call entry point for x86-64. 4 * 5 * Copyright 2000-2002 Andi Kleen, SuSE Labs. 6 */ 7#include <asm/asm-offsets.h> 8#include <asm/current.h> 9#include <asm/errno.h> 10#include <asm/ia32_unistd.h> 11#include <asm/thread_info.h> 12#include <asm/segment.h> 13#include <asm/irqflags.h> 14#include <asm/asm.h> 15#include <asm/smap.h> 16#include <asm/nospec-branch.h> 17#include <linux/linkage.h> 18#include <linux/err.h> 19 20#include "calling.h" 21 22 .section .entry.text, "ax" 23 24/* 25 * 32-bit SYSENTER entry. 26 * 27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 28 * on 64-bit kernels running on Intel CPUs. 29 * 30 * The SYSENTER instruction, in principle, should *only* occur in the 31 * vDSO. In practice, a small number of Android devices were shipped 32 * with a copy of Bionic that inlined a SYSENTER instruction. This 33 * never happened in any of Google's Bionic versions -- it only happened 34 * in a narrow range of Intel-provided versions. 35 * 36 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs. 37 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 38 * SYSENTER does not save anything on the stack, 39 * and does not save old RIP (!!!), RSP, or RFLAGS. 40 * 41 * Arguments: 42 * eax system call number 43 * ebx arg1 44 * ecx arg2 45 * edx arg3 46 * esi arg4 47 * edi arg5 48 * ebp user stack 49 * 0(%ebp) arg6 50 */ 51SYM_CODE_START(entry_SYSENTER_compat) 52 UNWIND_HINT_ENTRY 53 ENDBR 54 /* Interrupts are off on entry. */ 55 swapgs 56 57 pushq %rax 58 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 59 popq %rax 60 61 movq PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp 62 63 /* Construct struct pt_regs on stack */ 64 pushq $__USER_DS /* pt_regs->ss */ 65 pushq $0 /* pt_regs->sp = 0 (placeholder) */ 66 67 /* 68 * Push flags. This is nasty. First, interrupts are currently 69 * off, but we need pt_regs->flags to have IF set. Second, if TS 70 * was set in usermode, it's still set, and we're singlestepping 71 * through this code. do_SYSENTER_32() will fix up IF. 72 */ 73 pushfq /* pt_regs->flags (except IF = 0) */ 74 pushq $__USER32_CS /* pt_regs->cs */ 75 pushq $0 /* pt_regs->ip = 0 (placeholder) */ 76SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL) 77 78 /* 79 * User tracing code (ptrace or signal handlers) might assume that 80 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 81 * syscall. Just in case the high bits are nonzero, zero-extend 82 * the syscall number. (This could almost certainly be deleted 83 * with no ill effects.) 84 */ 85 movl %eax, %eax 86 87 pushq %rax /* pt_regs->orig_ax */ 88 PUSH_AND_CLEAR_REGS rax=$-ENOSYS 89 UNWIND_HINT_REGS 90 91 cld 92 93 IBRS_ENTER 94 UNTRAIN_RET 95 96 /* 97 * SYSENTER doesn't filter flags, so we need to clear NT and AC 98 * ourselves. To save a few cycles, we can check whether 99 * either was set instead of doing an unconditional popfq. 100 * This needs to happen before enabling interrupts so that 101 * we don't get preempted with NT set. 102 * 103 * If TF is set, we will single-step all the way to here -- do_debug 104 * will ignore all the traps. (Yes, this is slow, but so is 105 * single-stepping in general. This allows us to avoid having 106 * a more complicated code to handle the case where a user program 107 * forces us to single-step through the SYSENTER entry code.) 108 * 109 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 110 * out-of-line as an optimization: NT is unlikely to be set in the 111 * majority of the cases and instead of polluting the I$ unnecessarily, 112 * we're keeping that code behind a branch which will predict as 113 * not-taken and therefore its instructions won't be fetched. 114 */ 115 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp) 116 jnz .Lsysenter_fix_flags 117.Lsysenter_flags_fixed: 118 119 movq %rsp, %rdi 120 call do_SYSENTER_32 121 /* XEN PV guests always use IRET path */ 122 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ 123 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV 124 jmp sysret32_from_system_call 125 126.Lsysenter_fix_flags: 127 pushq $X86_EFLAGS_FIXED 128 popfq 129 jmp .Lsysenter_flags_fixed 130SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL) 131SYM_CODE_END(entry_SYSENTER_compat) 132 133/* 134 * 32-bit SYSCALL entry. 135 * 136 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 137 * on 64-bit kernels running on AMD CPUs. 138 * 139 * The SYSCALL instruction, in principle, should *only* occur in the 140 * vDSO. In practice, it appears that this really is the case. 141 * As evidence: 142 * 143 * - The calling convention for SYSCALL has changed several times without 144 * anyone noticing. 145 * 146 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything 147 * user task that did SYSCALL without immediately reloading SS 148 * would randomly crash. 149 * 150 * - Most programmers do not directly target AMD CPUs, and the 32-bit 151 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD 152 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels 153 * because the SYSCALL instruction in legacy/native 32-bit mode (as 154 * opposed to compat mode) is sufficiently poorly designed as to be 155 * essentially unusable. 156 * 157 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves 158 * RFLAGS to R11, then loads new SS, CS, and RIP from previously 159 * programmed MSRs. RFLAGS gets masked by a value from another MSR 160 * (so CLD and CLAC are not needed). SYSCALL does not save anything on 161 * the stack and does not change RSP. 162 * 163 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode 164 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it). 165 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit 166 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes 167 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors). 168 * 169 * Arguments: 170 * eax system call number 171 * ecx return address 172 * ebx arg1 173 * ebp arg2 (note: not saved in the stack frame, should not be touched) 174 * edx arg3 175 * esi arg4 176 * edi arg5 177 * esp user stack 178 * 0(%esp) arg6 179 */ 180SYM_CODE_START(entry_SYSCALL_compat) 181 UNWIND_HINT_ENTRY 182 ENDBR 183 /* Interrupts are off on entry. */ 184 swapgs 185 186 /* Stash user ESP */ 187 movl %esp, %r8d 188 189 /* Use %rsp as scratch reg. User ESP is stashed in r8 */ 190 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp 191 192 /* Switch to the kernel stack */ 193 movq PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp 194 195SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL) 196 ANNOTATE_NOENDBR 197 198 /* Construct struct pt_regs on stack */ 199 pushq $__USER_DS /* pt_regs->ss */ 200 pushq %r8 /* pt_regs->sp */ 201 pushq %r11 /* pt_regs->flags */ 202 pushq $__USER32_CS /* pt_regs->cs */ 203 pushq %rcx /* pt_regs->ip */ 204SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL) 205 movl %eax, %eax /* discard orig_ax high bits */ 206 pushq %rax /* pt_regs->orig_ax */ 207 PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS 208 UNWIND_HINT_REGS 209 210 IBRS_ENTER 211 UNTRAIN_RET 212 213 movq %rsp, %rdi 214 call do_fast_syscall_32 215 /* XEN PV guests always use IRET path */ 216 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ 217 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV 218 219 /* Opportunistic SYSRET */ 220sysret32_from_system_call: 221 /* 222 * We are not going to return to userspace from the trampoline 223 * stack. So let's erase the thread stack right now. 224 */ 225 STACKLEAK_ERASE 226 227 IBRS_EXIT 228 229 movq RBX(%rsp), %rbx /* pt_regs->rbx */ 230 movq RBP(%rsp), %rbp /* pt_regs->rbp */ 231 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */ 232 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */ 233 addq $RAX, %rsp /* Skip r8-r15 */ 234 popq %rax /* pt_regs->rax */ 235 popq %rdx /* Skip pt_regs->cx */ 236 popq %rdx /* pt_regs->dx */ 237 popq %rsi /* pt_regs->si */ 238 popq %rdi /* pt_regs->di */ 239 240 /* 241 * USERGS_SYSRET32 does: 242 * GSBASE = user's GS base 243 * EIP = ECX 244 * RFLAGS = R11 245 * CS = __USER32_CS 246 * SS = __USER_DS 247 * 248 * ECX will not match pt_regs->cx, but we're returning to a vDSO 249 * trampoline that will fix up RCX, so this is okay. 250 * 251 * R12-R15 are callee-saved, so they contain whatever was in them 252 * when the system call started, which is already known to user 253 * code. We zero R8-R10 to avoid info leaks. 254 */ 255 movq RSP-ORIG_RAX(%rsp), %rsp 256SYM_INNER_LABEL(entry_SYSRETL_compat_unsafe_stack, SYM_L_GLOBAL) 257 ANNOTATE_NOENDBR 258 259 /* 260 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored 261 * on the process stack which is not mapped to userspace and 262 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3 263 * switch until after after the last reference to the process 264 * stack. 265 * 266 * %r8/%r9 are zeroed before the sysret, thus safe to clobber. 267 */ 268 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9 269 270 xorl %r8d, %r8d 271 xorl %r9d, %r9d 272 xorl %r10d, %r10d 273 swapgs 274 CLEAR_CPU_BUFFERS 275 sysretl 276SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL) 277 ANNOTATE_NOENDBR 278 int3 279SYM_CODE_END(entry_SYSCALL_compat) 280