1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * host.c - ChipIdea USB host controller driver 4 * 5 * Copyright (c) 2012 Intel Corporation 6 * 7 * Author: Alexander Shishkin 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/io.h> 12 #include <linux/usb.h> 13 #include <linux/usb/hcd.h> 14 #include <linux/usb/chipidea.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/pinctrl/consumer.h> 17 18 #include "../host/ehci.h" 19 20 #include "ci.h" 21 #include "bits.h" 22 #include "host.h" 23 24 static struct hc_driver __read_mostly ci_ehci_hc_driver; 25 static int (*orig_bus_suspend)(struct usb_hcd *hcd); 26 27 struct ehci_ci_priv { 28 struct regulator *reg_vbus; 29 bool enabled; 30 }; 31 32 struct ci_hdrc_dma_aligned_buffer { 33 void *kmalloc_ptr; 34 void *old_xfer_buffer; 35 u8 data[]; 36 }; 37 38 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) 39 { 40 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; 42 struct device *dev = hcd->self.controller; 43 struct ci_hdrc *ci = dev_get_drvdata(dev); 44 int ret = 0; 45 int port = HCS_N_PORTS(ehci->hcs_params); 46 47 if (priv->reg_vbus && enable != priv->enabled) { 48 if (port > 1) { 49 dev_warn(dev, 50 "Not support multi-port regulator control\n"); 51 return 0; 52 } 53 if (enable) 54 ret = regulator_enable(priv->reg_vbus); 55 else 56 ret = regulator_disable(priv->reg_vbus); 57 if (ret) { 58 dev_err(dev, 59 "Failed to %s vbus regulator, ret=%d\n", 60 enable ? "enable" : "disable", ret); 61 return ret; 62 } 63 priv->enabled = enable; 64 } 65 66 if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { 67 if (enable) 68 usb_phy_vbus_on(ci->usb_phy); 69 else 70 usb_phy_vbus_off(ci->usb_phy); 71 } 72 73 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { 74 /* 75 * Marvell 28nm HSIC PHY requires forcing the port to HS mode. 76 * As HSIC is always HS, this should be safe for others. 77 */ 78 hw_port_test_set(ci, 5); 79 hw_port_test_set(ci, 0); 80 } 81 return 0; 82 }; 83 84 static int ehci_ci_reset(struct usb_hcd *hcd) 85 { 86 struct device *dev = hcd->self.controller; 87 struct ci_hdrc *ci = dev_get_drvdata(dev); 88 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 89 int ret; 90 91 ret = ehci_setup(hcd); 92 if (ret) 93 return ret; 94 95 ehci->need_io_watchdog = 0; 96 97 if (ci->platdata->notify_event) { 98 ret = ci->platdata->notify_event(ci, 99 CI_HDRC_CONTROLLER_RESET_EVENT); 100 if (ret) 101 return ret; 102 } 103 104 ci_platform_configure(ci); 105 106 return ret; 107 } 108 109 static const struct ehci_driver_overrides ehci_ci_overrides = { 110 .extra_priv_size = sizeof(struct ehci_ci_priv), 111 .port_power = ehci_ci_portpower, 112 .reset = ehci_ci_reset, 113 }; 114 115 static irqreturn_t host_irq(struct ci_hdrc *ci) 116 { 117 return usb_hcd_irq(ci->irq, ci->hcd); 118 } 119 120 static int host_start(struct ci_hdrc *ci) 121 { 122 struct usb_hcd *hcd; 123 struct ehci_hcd *ehci; 124 struct ehci_ci_priv *priv; 125 int ret; 126 127 if (usb_disabled()) 128 return -ENODEV; 129 130 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent, 131 ci->dev, dev_name(ci->dev), NULL); 132 if (!hcd) 133 return -ENOMEM; 134 135 dev_set_drvdata(ci->dev, ci); 136 hcd->rsrc_start = ci->hw_bank.phys; 137 hcd->rsrc_len = ci->hw_bank.size; 138 hcd->regs = ci->hw_bank.abs; 139 hcd->has_tt = 1; 140 141 hcd->power_budget = ci->platdata->power_budget; 142 hcd->tpl_support = ci->platdata->tpl_support; 143 if (ci->phy || ci->usb_phy) { 144 hcd->skip_phy_initialization = 1; 145 if (ci->usb_phy) 146 hcd->usb_phy = ci->usb_phy; 147 } 148 149 ehci = hcd_to_ehci(hcd); 150 ehci->caps = ci->hw_bank.cap; 151 ehci->has_hostpc = ci->hw_bank.lpm; 152 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; 153 ehci->imx28_write_fix = ci->imx28_write_fix; 154 ehci->has_ci_pec_bug = ci->has_portsc_pec_bug; 155 156 priv = (struct ehci_ci_priv *)ehci->priv; 157 priv->reg_vbus = NULL; 158 159 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { 160 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { 161 ret = regulator_enable(ci->platdata->reg_vbus); 162 if (ret) { 163 dev_err(ci->dev, 164 "Failed to enable vbus regulator, ret=%d\n", 165 ret); 166 goto put_hcd; 167 } 168 } else { 169 priv->reg_vbus = ci->platdata->reg_vbus; 170 } 171 } 172 173 if (ci->platdata->pins_host) 174 pinctrl_select_state(ci->platdata->pctl, 175 ci->platdata->pins_host); 176 177 ci->hcd = hcd; 178 179 ret = usb_add_hcd(hcd, 0, 0); 180 if (ret) { 181 ci->hcd = NULL; 182 goto disable_reg; 183 } else { 184 struct usb_otg *otg = &ci->otg; 185 186 if (ci_otg_is_fsm_mode(ci)) { 187 otg->host = &hcd->self; 188 hcd->self.otg_port = 1; 189 } 190 191 if (ci->platdata->notify_event && 192 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC)) 193 ci->platdata->notify_event 194 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT); 195 } 196 197 return ret; 198 199 disable_reg: 200 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 201 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 202 regulator_disable(ci->platdata->reg_vbus); 203 put_hcd: 204 usb_put_hcd(hcd); 205 206 return ret; 207 } 208 209 static void host_stop(struct ci_hdrc *ci) 210 { 211 struct usb_hcd *hcd = ci->hcd; 212 213 if (hcd) { 214 if (ci->platdata->notify_event) 215 ci->platdata->notify_event(ci, 216 CI_HDRC_CONTROLLER_STOPPED_EVENT); 217 usb_remove_hcd(hcd); 218 ci->role = CI_ROLE_END; 219 synchronize_irq(ci->irq); 220 usb_put_hcd(hcd); 221 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 222 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 223 regulator_disable(ci->platdata->reg_vbus); 224 } 225 ci->hcd = NULL; 226 ci->otg.host = NULL; 227 228 if (ci->platdata->pins_host && ci->platdata->pins_default) 229 pinctrl_select_state(ci->platdata->pctl, 230 ci->platdata->pins_default); 231 } 232 233 234 void ci_hdrc_host_destroy(struct ci_hdrc *ci) 235 { 236 if (ci->role == CI_ROLE_HOST && ci->hcd) 237 host_stop(ci); 238 } 239 240 /* The below code is based on tegra ehci driver */ 241 static int ci_ehci_hub_control( 242 struct usb_hcd *hcd, 243 u16 typeReq, 244 u16 wValue, 245 u16 wIndex, 246 char *buf, 247 u16 wLength 248 ) 249 { 250 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 251 unsigned int ports = HCS_N_PORTS(ehci->hcs_params); 252 u32 __iomem *status_reg; 253 u32 temp, port_index; 254 unsigned long flags; 255 int retval = 0; 256 bool done = false; 257 struct device *dev = hcd->self.controller; 258 struct ci_hdrc *ci = dev_get_drvdata(dev); 259 260 port_index = wIndex & 0xff; 261 port_index -= (port_index > 0); 262 status_reg = &ehci->regs->port_status[port_index]; 263 264 spin_lock_irqsave(&ehci->lock, flags); 265 266 if (ci->platdata->hub_control) { 267 retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex, 268 buf, wLength, &done, &flags); 269 if (done) 270 goto done; 271 } 272 273 if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { 274 if (!wIndex || wIndex > ports) { 275 retval = -EPIPE; 276 goto done; 277 } 278 279 temp = ehci_readl(ehci, status_reg); 280 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { 281 retval = -EPIPE; 282 goto done; 283 } 284 285 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); 286 temp |= PORT_WKDISC_E | PORT_WKOC_E; 287 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); 288 289 /* 290 * If a transaction is in progress, there may be a delay in 291 * suspending the port. Poll until the port is suspended. 292 */ 293 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 294 PORT_SUSPEND, 5000)) 295 ehci_err(ehci, "timeout waiting for SUSPEND\n"); 296 297 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) { 298 if (ci->platdata->notify_event) 299 ci->platdata->notify_event(ci, 300 CI_HDRC_IMX_HSIC_SUSPEND_EVENT); 301 302 temp = ehci_readl(ehci, status_reg); 303 temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E); 304 ehci_writel(ehci, temp, status_reg); 305 } 306 307 set_bit(port_index, &ehci->suspended_ports); 308 goto done; 309 } 310 311 /* 312 * After resume has finished, it needs do some post resume 313 * operation for some SoCs. 314 */ 315 else if (typeReq == ClearPortFeature && 316 wValue == USB_PORT_FEAT_C_SUSPEND) { 317 /* Make sure the resume has finished, it should be finished */ 318 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000)) 319 ehci_err(ehci, "timeout waiting for resume\n"); 320 } 321 322 spin_unlock_irqrestore(&ehci->lock, flags); 323 324 /* Handle the hub control events here */ 325 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); 326 done: 327 spin_unlock_irqrestore(&ehci->lock, flags); 328 return retval; 329 } 330 static int ci_ehci_bus_suspend(struct usb_hcd *hcd) 331 { 332 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 333 struct device *dev = hcd->self.controller; 334 struct ci_hdrc *ci = dev_get_drvdata(dev); 335 int port; 336 u32 tmp; 337 338 int ret = orig_bus_suspend(hcd); 339 340 if (ret) 341 return ret; 342 343 port = HCS_N_PORTS(ehci->hcs_params); 344 while (port--) { 345 u32 __iomem *reg = &ehci->regs->port_status[port]; 346 u32 portsc = ehci_readl(ehci, reg); 347 348 if (portsc & PORT_CONNECT) { 349 /* 350 * For chipidea, the resume signal will be ended 351 * automatically, so for remote wakeup case, the 352 * usbcmd.rs may not be set before the resume has 353 * ended if other resume paths consumes too much 354 * time (~24ms), in that case, the SOF will not 355 * send out within 3ms after resume ends, then the 356 * high speed device will enter full speed mode. 357 */ 358 359 tmp = ehci_readl(ehci, &ehci->regs->command); 360 tmp |= CMD_RUN; 361 ehci_writel(ehci, tmp, &ehci->regs->command); 362 /* 363 * It needs a short delay between set RS bit and PHCD. 364 */ 365 usleep_range(150, 200); 366 /* 367 * Need to clear WKCN and WKOC for imx HSIC, 368 * otherwise, there will be wakeup event. 369 */ 370 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) { 371 tmp = ehci_readl(ehci, reg); 372 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E); 373 ehci_writel(ehci, tmp, reg); 374 } 375 376 break; 377 } 378 } 379 380 return 0; 381 } 382 383 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb) 384 { 385 struct ci_hdrc_dma_aligned_buffer *temp; 386 size_t length; 387 388 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) 389 return; 390 391 temp = container_of(urb->transfer_buffer, 392 struct ci_hdrc_dma_aligned_buffer, data); 393 394 if (usb_urb_dir_in(urb)) { 395 if (usb_pipeisoc(urb->pipe)) 396 length = urb->transfer_buffer_length; 397 else 398 length = urb->actual_length; 399 400 memcpy(temp->old_xfer_buffer, temp->data, length); 401 } 402 urb->transfer_buffer = temp->old_xfer_buffer; 403 kfree(temp->kmalloc_ptr); 404 405 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 406 } 407 408 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) 409 { 410 struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr; 411 const unsigned int ci_hdrc_usb_dma_align = 32; 412 size_t kmalloc_size; 413 414 if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 || 415 !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1))) 416 return 0; 417 418 /* Allocate a buffer with enough padding for alignment */ 419 kmalloc_size = urb->transfer_buffer_length + 420 sizeof(struct ci_hdrc_dma_aligned_buffer) + 421 ci_hdrc_usb_dma_align - 1; 422 423 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); 424 if (!kmalloc_ptr) 425 return -ENOMEM; 426 427 /* Position our struct dma_aligned_buffer such that data is aligned */ 428 temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1; 429 temp->kmalloc_ptr = kmalloc_ptr; 430 temp->old_xfer_buffer = urb->transfer_buffer; 431 if (usb_urb_dir_out(urb)) 432 memcpy(temp->data, urb->transfer_buffer, 433 urb->transfer_buffer_length); 434 urb->transfer_buffer = temp->data; 435 436 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; 437 438 return 0; 439 } 440 441 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, 442 gfp_t mem_flags) 443 { 444 int ret; 445 446 ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags); 447 if (ret) 448 return ret; 449 450 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); 451 if (ret) 452 ci_hdrc_free_dma_aligned_buffer(urb); 453 454 return ret; 455 } 456 457 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) 458 { 459 usb_hcd_unmap_urb_for_dma(hcd, urb); 460 ci_hdrc_free_dma_aligned_buffer(urb); 461 } 462 463 #ifdef CONFIG_PM_SLEEP 464 static void ci_hdrc_host_suspend(struct ci_hdrc *ci) 465 { 466 ehci_suspend(ci->hcd, device_may_wakeup(ci->dev)); 467 } 468 469 static void ci_hdrc_host_resume(struct ci_hdrc *ci, bool power_lost) 470 { 471 ehci_resume(ci->hcd, power_lost); 472 } 473 #endif 474 475 int ci_hdrc_host_init(struct ci_hdrc *ci) 476 { 477 struct ci_role_driver *rdrv; 478 479 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) 480 return -ENXIO; 481 482 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 483 if (!rdrv) 484 return -ENOMEM; 485 486 rdrv->start = host_start; 487 rdrv->stop = host_stop; 488 #ifdef CONFIG_PM_SLEEP 489 rdrv->suspend = ci_hdrc_host_suspend; 490 rdrv->resume = ci_hdrc_host_resume; 491 #endif 492 rdrv->irq = host_irq; 493 rdrv->name = "host"; 494 ci->roles[CI_ROLE_HOST] = rdrv; 495 496 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) { 497 ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma; 498 ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma; 499 } 500 501 return 0; 502 } 503 504 void ci_hdrc_host_driver_init(void) 505 { 506 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); 507 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; 508 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; 509 ci_ehci_hc_driver.hub_control = ci_ehci_hub_control; 510 } 511