c3fbced9 | 27-Mar-2023 |
Zhaoyang Li <lizhaoyang04@hust.edu.cn> |
soc: bcm: brcmstb: biuctrl: fix of_iomap leak
Smatch reports:
drivers/soc/bcm/brcmstb/biuctrl.c:291 setup_hifcpubiuctrl_regs() warn: 'cpubiuctrl_base' from of_iomap() not released on lines: 291.
T
soc: bcm: brcmstb: biuctrl: fix of_iomap leak
Smatch reports:
drivers/soc/bcm/brcmstb/biuctrl.c:291 setup_hifcpubiuctrl_regs() warn: 'cpubiuctrl_base' from of_iomap() not released on lines: 291.
This is because in setup_hifcpubiuctrl_regs(), cpubiuctrl_base is not released when handle error, which may cause a leak. To fix this, iounmap is added when handle error.
Fixes: 22f7a9116eba ("soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs") Signed-off-by: Zhaoyang Li <lizhaoyang04@hust.edu.cn> Reviewed-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Dongliang Mu <dzm91@hust.edu.cn> Link: https://lore.kernel.org/r/20230327115422.1536615-1-lizhaoyang04@hust.edu.cn Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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90d00028 | 15-Sep-2022 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Avoid double of_node_put()
Commit 9a073d4fbb18 ("soc: bcm: brcmstb: biuctrl: Add missing of_node_put()") added what was thought to be a missing of_node_put() but now caus
soc: bcm: brcmstb: biuctrl: Avoid double of_node_put()
Commit 9a073d4fbb18 ("soc: bcm: brcmstb: biuctrl: Add missing of_node_put()") added what was thought to be a missing of_node_put() but now causes a double of_node_put() to be called, once from setup_hifcpubiuctrl_regs() and another time from brcmstb_biuctrl_init().
Ensure that setup_hifcpubiuctrl_regs() is not calling of_node_put() since it is not obvious it does that on one of its parameters.
Fixes: 9a073d4fbb18 ("soc: bcm: brcmstb: biuctrl: Add missing of_node_put()") Reported-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Change-Id: I1c405c36c2f06c8b8c0f684143b7a52db7e809f0
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9a073d4f | 15-Jun-2022 |
Liang He <windhl@126.com> |
soc: bcm: brcmstb: biuctrl: Add missing of_node_put()
In brcmstb_biuctrl_init(), of_find_compatible_node() will return a node pointer with refcount incremented. We should use of_node_put() in each f
soc: bcm: brcmstb: biuctrl: Add missing of_node_put()
In brcmstb_biuctrl_init(), of_find_compatible_node() will return a node pointer with refcount incremented. We should use of_node_put() in each fail path or when it is not used anymore.
Signed-off-by: Liang He <windhl@126.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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6e42e16a | 14-Sep-2021 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
72116 uses a quad core Brahma-B53 CPU complex which uses the same tuning as done for previous chips, add that chip to the list.
Signed-off-by
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
72116 uses a quad core Brahma-B53 CPU complex which uses the same tuning as done for previous chips, add that chip to the list.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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10e7dd54 | 25-Oct-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
Change the RACPREFDATA(x) setting to prefetch the next 256-byte line after 4 consecutive lines have been used,
soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
Change the RACPREFDATA(x) setting to prefetch the next 256-byte line after 4 consecutive lines have been used, instead of after 2 consecutive lines. This does improve the synthetic memcpy benchmark by an additional +0.5% on top of the previous change for Cortex-A72 CPUs.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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091353c8 | 25-Oct-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
Change the RAC prefetch distance from +/- 1 to +/- 2 for Cortex-A72 CPUs since this provides an average of a 3.8% performa
soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
Change the RAC prefetch distance from +/- 1 to +/- 2 for Cortex-A72 CPUs since this provides an average of a 3.8% performance increase for synthetic memcpy benchmarks.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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4029f3b4 | 28-Feb-2020 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
72165 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it according to the existing values we have.
Signed-off-by: Florian Fainelli <f.
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
72165 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it according to the existing values we have.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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add427c4 | 07-Apr-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Update programming for 7211
Add a matching entry for 7211 which can be programmed with the same BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the f
soc: bcm: brcmstb: biuctrl: Update programming for 7211
Add a matching entry for 7211 which can be programmed with the same BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the function to include a72 in the name to reflect this applies to both types of 64-bit capable CPUs that we support (Brahma-B53 and Cortex-A72).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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ea1e84d1 | 01-Apr-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
The BIUCTRL layout is a little different on 7211 which is equipped with a Cortex-A72, account for those register offset differences. We will
soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
The BIUCTRL layout is a little different on 7211 which is equipped with a Cortex-A72, account for those register offset differences. We will match 7211 specifically in a subsequent commit.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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b2f91a39 | 10-Dec-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
7255 and 7216 are some of the latest chips that were produced and support the full register range configuration for the BIU, add the two
soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
7255 and 7216 are some of the latest chips that were produced and support the full register range configuration for the BIU, add the two entries to get the expected programming.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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