1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/lightnvm.h> 15 #include <linux/sed-opal.h> 16 #include <linux/fault-inject.h> 17 #include <linux/rcupdate.h> 18 #include <linux/wait.h> 19 #include <linux/t10-pi.h> 20 21 #include <trace/events/block.h> 22 23 extern unsigned int nvme_io_timeout; 24 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 25 26 extern unsigned int admin_timeout; 27 #define ADMIN_TIMEOUT (admin_timeout * HZ) 28 29 #define NVME_DEFAULT_KATO 5 30 #define NVME_KATO_GRACE 10 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 enum { 53 NVME_NS_LBA = 0, 54 NVME_NS_LIGHTNVM = 1, 55 }; 56 57 /* 58 * List of workarounds for devices that required behavior not specified in 59 * the standard. 60 */ 61 enum nvme_quirks { 62 /* 63 * Prefers I/O aligned to a stripe size specified in a vendor 64 * specific Identify field. 65 */ 66 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 67 68 /* 69 * The controller doesn't handle Identify value others than 0 or 1 70 * correctly. 71 */ 72 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 73 74 /* 75 * The controller deterministically returns O's on reads to 76 * logical blocks that deallocate was called on. 77 */ 78 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 79 80 /* 81 * The controller needs a delay before starts checking the device 82 * readiness, which is done by reading the NVME_CSTS_RDY bit. 83 */ 84 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 85 86 /* 87 * APST should not be used. 88 */ 89 NVME_QUIRK_NO_APST = (1 << 4), 90 91 /* 92 * The deepest sleep state should not be used. 93 */ 94 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 95 96 /* 97 * Supports the LighNVM command set if indicated in vs[1]. 98 */ 99 NVME_QUIRK_LIGHTNVM = (1 << 6), 100 101 /* 102 * Set MEDIUM priority on SQ creation 103 */ 104 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 105 106 /* 107 * Ignore device provided subnqn. 108 */ 109 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 110 111 /* 112 * Broken Write Zeroes. 113 */ 114 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 115 116 /* 117 * Force simple suspend/resume path. 118 */ 119 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 120 121 /* 122 * Use only one interrupt vector for all queues 123 */ 124 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 125 126 /* 127 * Use non-standard 128 bytes SQEs. 128 */ 129 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 130 131 /* 132 * Prevent tag overlap between queues 133 */ 134 NVME_QUIRK_SHARED_TAGS = (1 << 13), 135 136 /* 137 * Don't change the value of the temperature threshold feature 138 */ 139 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 140 141 /* 142 * The controller doesn't handle the Identify Namespace 143 * Identification Descriptor list subcommand despite claiming 144 * NVMe 1.3 compliance. 145 */ 146 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 147 }; 148 149 /* 150 * Common request structure for NVMe passthrough. All drivers must have 151 * this structure as the first member of their request-private data. 152 */ 153 struct nvme_request { 154 struct nvme_command *cmd; 155 union nvme_result result; 156 u8 retries; 157 u8 flags; 158 u16 status; 159 struct nvme_ctrl *ctrl; 160 }; 161 162 /* 163 * Mark a bio as coming in through the mpath node. 164 */ 165 #define REQ_NVME_MPATH REQ_DRV 166 167 enum { 168 NVME_REQ_CANCELLED = (1 << 0), 169 NVME_REQ_USERCMD = (1 << 1), 170 }; 171 172 static inline struct nvme_request *nvme_req(struct request *req) 173 { 174 return blk_mq_rq_to_pdu(req); 175 } 176 177 static inline u16 nvme_req_qid(struct request *req) 178 { 179 if (!req->q->queuedata) 180 return 0; 181 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 182 } 183 184 /* The below value is the specific amount of delay needed before checking 185 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 186 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 187 * found empirically. 188 */ 189 #define NVME_QUIRK_DELAY_AMOUNT 2300 190 191 /* 192 * enum nvme_ctrl_state: Controller state 193 * 194 * @NVME_CTRL_NEW: New controller just allocated, initial state 195 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 196 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 197 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 198 * transport 199 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 200 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 201 * disabled/failed immediately. This state comes 202 * after all async event processing took place and 203 * before ns removal and the controller deletion 204 * progress 205 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 206 * shutdown or removal. In this case we forcibly 207 * kill all inflight I/O as they have no chance to 208 * complete 209 */ 210 enum nvme_ctrl_state { 211 NVME_CTRL_NEW, 212 NVME_CTRL_LIVE, 213 NVME_CTRL_RESETTING, 214 NVME_CTRL_CONNECTING, 215 NVME_CTRL_DELETING, 216 NVME_CTRL_DELETING_NOIO, 217 NVME_CTRL_DEAD, 218 }; 219 220 struct nvme_fault_inject { 221 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 222 struct fault_attr attr; 223 struct dentry *parent; 224 bool dont_retry; /* DNR, do not retry */ 225 u16 status; /* status code */ 226 #endif 227 }; 228 229 struct nvme_cel { 230 struct list_head entry; 231 struct nvme_effects_log log; 232 u8 csi; 233 }; 234 235 struct nvme_ctrl { 236 bool comp_seen; 237 enum nvme_ctrl_state state; 238 bool identified; 239 spinlock_t lock; 240 struct mutex scan_lock; 241 const struct nvme_ctrl_ops *ops; 242 struct request_queue *admin_q; 243 struct request_queue *connect_q; 244 struct request_queue *fabrics_q; 245 struct device *dev; 246 int instance; 247 int numa_node; 248 struct blk_mq_tag_set *tagset; 249 struct blk_mq_tag_set *admin_tagset; 250 struct list_head namespaces; 251 struct rw_semaphore namespaces_rwsem; 252 struct device ctrl_device; 253 struct device *device; /* char device */ 254 struct cdev cdev; 255 struct work_struct reset_work; 256 struct work_struct delete_work; 257 wait_queue_head_t state_wq; 258 259 struct nvme_subsystem *subsys; 260 struct list_head subsys_entry; 261 262 struct opal_dev *opal_dev; 263 264 char name[12]; 265 u16 cntlid; 266 267 u32 ctrl_config; 268 u16 mtfa; 269 u32 queue_count; 270 271 u64 cap; 272 u32 max_hw_sectors; 273 u32 max_segments; 274 u32 max_integrity_segments; 275 #ifdef CONFIG_BLK_DEV_ZONED 276 u32 max_zone_append; 277 #endif 278 u16 crdt[3]; 279 u16 oncs; 280 u16 oacs; 281 u16 nssa; 282 u16 nr_streams; 283 u16 sqsize; 284 u32 max_namespaces; 285 atomic_t abort_limit; 286 u8 vwc; 287 u32 vs; 288 u32 sgls; 289 u16 kas; 290 u8 npss; 291 u8 apsta; 292 u16 wctemp; 293 u16 cctemp; 294 u32 oaes; 295 u32 aen_result; 296 u32 ctratt; 297 unsigned int shutdown_timeout; 298 unsigned int kato; 299 bool subsystem; 300 unsigned long quirks; 301 struct nvme_id_power_state psd[32]; 302 struct nvme_effects_log *effects; 303 struct xarray cels; 304 struct work_struct scan_work; 305 struct work_struct async_event_work; 306 struct delayed_work ka_work; 307 struct nvme_command ka_cmd; 308 struct work_struct fw_act_work; 309 unsigned long events; 310 311 #ifdef CONFIG_NVME_MULTIPATH 312 /* asymmetric namespace access: */ 313 u8 anacap; 314 u8 anatt; 315 u32 anagrpmax; 316 u32 nanagrpid; 317 struct mutex ana_lock; 318 struct nvme_ana_rsp_hdr *ana_log_buf; 319 size_t ana_log_size; 320 struct timer_list anatt_timer; 321 struct work_struct ana_work; 322 #endif 323 324 /* Power saving configuration */ 325 u64 ps_max_latency_us; 326 bool apst_enabled; 327 328 /* PCIe only: */ 329 u32 hmpre; 330 u32 hmmin; 331 u32 hmminds; 332 u16 hmmaxd; 333 334 /* Fabrics only */ 335 u32 ioccsz; 336 u32 iorcsz; 337 u16 icdoff; 338 u16 maxcmd; 339 int nr_reconnects; 340 struct nvmf_ctrl_options *opts; 341 342 struct page *discard_page; 343 unsigned long discard_page_busy; 344 345 struct nvme_fault_inject fault_inject; 346 }; 347 348 enum nvme_iopolicy { 349 NVME_IOPOLICY_NUMA, 350 NVME_IOPOLICY_RR, 351 }; 352 353 struct nvme_subsystem { 354 int instance; 355 struct device dev; 356 /* 357 * Because we unregister the device on the last put we need 358 * a separate refcount. 359 */ 360 struct kref ref; 361 struct list_head entry; 362 struct mutex lock; 363 struct list_head ctrls; 364 struct list_head nsheads; 365 char subnqn[NVMF_NQN_SIZE]; 366 char serial[20]; 367 char model[40]; 368 char firmware_rev[8]; 369 u8 cmic; 370 u16 vendor_id; 371 u16 awupf; /* 0's based awupf value. */ 372 struct ida ns_ida; 373 #ifdef CONFIG_NVME_MULTIPATH 374 enum nvme_iopolicy iopolicy; 375 #endif 376 }; 377 378 /* 379 * Container structure for uniqueue namespace identifiers. 380 */ 381 struct nvme_ns_ids { 382 u8 eui64[8]; 383 u8 nguid[16]; 384 uuid_t uuid; 385 u8 csi; 386 }; 387 388 /* 389 * Anchor structure for namespaces. There is one for each namespace in a 390 * NVMe subsystem that any of our controllers can see, and the namespace 391 * structure for each controller is chained of it. For private namespaces 392 * there is a 1:1 relation to our namespace structures, that is ->list 393 * only ever has a single entry for private namespaces. 394 */ 395 struct nvme_ns_head { 396 struct list_head list; 397 struct srcu_struct srcu; 398 struct nvme_subsystem *subsys; 399 unsigned ns_id; 400 struct nvme_ns_ids ids; 401 struct list_head entry; 402 struct kref ref; 403 bool shared; 404 int instance; 405 struct nvme_effects_log *effects; 406 #ifdef CONFIG_NVME_MULTIPATH 407 struct gendisk *disk; 408 struct bio_list requeue_list; 409 spinlock_t requeue_lock; 410 struct work_struct requeue_work; 411 struct mutex lock; 412 unsigned long flags; 413 #define NVME_NSHEAD_DISK_LIVE 0 414 struct nvme_ns __rcu *current_path[]; 415 #endif 416 }; 417 418 enum nvme_ns_features { 419 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 420 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 421 }; 422 423 struct nvme_ns { 424 struct list_head list; 425 426 struct nvme_ctrl *ctrl; 427 struct request_queue *queue; 428 struct gendisk *disk; 429 #ifdef CONFIG_NVME_MULTIPATH 430 enum nvme_ana_state ana_state; 431 u32 ana_grpid; 432 #endif 433 struct list_head siblings; 434 struct nvm_dev *ndev; 435 struct kref kref; 436 struct nvme_ns_head *head; 437 438 int lba_shift; 439 u16 ms; 440 u16 sgs; 441 u32 sws; 442 u8 pi_type; 443 #ifdef CONFIG_BLK_DEV_ZONED 444 u64 zsze; 445 #endif 446 unsigned long features; 447 unsigned long flags; 448 #define NVME_NS_REMOVING 0 449 #define NVME_NS_DEAD 1 450 #define NVME_NS_ANA_PENDING 2 451 452 struct nvme_fault_inject fault_inject; 453 454 }; 455 456 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 457 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 458 { 459 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 460 } 461 462 struct nvme_ctrl_ops { 463 const char *name; 464 struct module *module; 465 unsigned int flags; 466 #define NVME_F_FABRICS (1 << 0) 467 #define NVME_F_METADATA_SUPPORTED (1 << 1) 468 #define NVME_F_PCI_P2PDMA (1 << 2) 469 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 470 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 471 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 472 void (*free_ctrl)(struct nvme_ctrl *ctrl); 473 void (*submit_async_event)(struct nvme_ctrl *ctrl); 474 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 475 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 476 }; 477 478 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 479 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 480 const char *dev_name); 481 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 482 void nvme_should_fail(struct request *req); 483 #else 484 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 485 const char *dev_name) 486 { 487 } 488 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 489 { 490 } 491 static inline void nvme_should_fail(struct request *req) {} 492 #endif 493 494 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 495 { 496 if (!ctrl->subsystem) 497 return -ENOTTY; 498 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 499 } 500 501 /* 502 * Convert a 512B sector number to a device logical block number. 503 */ 504 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 505 { 506 return sector >> (ns->lba_shift - SECTOR_SHIFT); 507 } 508 509 /* 510 * Convert a device logical block number to a 512B sector number. 511 */ 512 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 513 { 514 return lba << (ns->lba_shift - SECTOR_SHIFT); 515 } 516 517 /* 518 * Convert byte length to nvme's 0-based num dwords 519 */ 520 static inline u32 nvme_bytes_to_numd(size_t len) 521 { 522 return (len >> 2) - 1; 523 } 524 525 static inline bool nvme_is_ana_error(u16 status) 526 { 527 switch (status & 0x7ff) { 528 case NVME_SC_ANA_TRANSITION: 529 case NVME_SC_ANA_INACCESSIBLE: 530 case NVME_SC_ANA_PERSISTENT_LOSS: 531 return true; 532 default: 533 return false; 534 } 535 } 536 537 static inline bool nvme_is_path_error(u16 status) 538 { 539 /* check for a status code type of 'path related status' */ 540 return (status & 0x700) == 0x300; 541 } 542 543 /* 544 * Fill in the status and result information from the CQE, and then figure out 545 * if blk-mq will need to use IPI magic to complete the request, and if yes do 546 * so. If not let the caller complete the request without an indirect function 547 * call. 548 */ 549 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 550 union nvme_result result) 551 { 552 struct nvme_request *rq = nvme_req(req); 553 554 rq->status = le16_to_cpu(status) >> 1; 555 rq->result = result; 556 /* inject error when permitted by fault injection framework */ 557 nvme_should_fail(req); 558 if (unlikely(blk_should_fake_timeout(req->q))) 559 return true; 560 return blk_mq_complete_request_remote(req); 561 } 562 563 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 564 { 565 get_device(ctrl->device); 566 } 567 568 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 569 { 570 put_device(ctrl->device); 571 } 572 573 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 574 { 575 return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 576 } 577 578 void nvme_complete_rq(struct request *req); 579 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 580 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 581 enum nvme_ctrl_state new_state); 582 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 583 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 584 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 585 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 586 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 587 const struct nvme_ctrl_ops *ops, unsigned long quirks); 588 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 589 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 590 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 591 int nvme_init_identify(struct nvme_ctrl *ctrl); 592 593 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 594 595 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 596 bool send); 597 598 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 599 volatile union nvme_result *res); 600 601 void nvme_stop_queues(struct nvme_ctrl *ctrl); 602 void nvme_start_queues(struct nvme_ctrl *ctrl); 603 void nvme_kill_queues(struct nvme_ctrl *ctrl); 604 void nvme_sync_queues(struct nvme_ctrl *ctrl); 605 void nvme_unfreeze(struct nvme_ctrl *ctrl); 606 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 607 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 608 void nvme_start_freeze(struct nvme_ctrl *ctrl); 609 610 #define NVME_QID_ANY -1 611 struct request *nvme_alloc_request(struct request_queue *q, 612 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 613 void nvme_cleanup_cmd(struct request *req); 614 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 615 struct nvme_command *cmd); 616 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 617 void *buf, unsigned bufflen); 618 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 619 union nvme_result *result, void *buffer, unsigned bufflen, 620 unsigned timeout, int qid, int at_head, 621 blk_mq_req_flags_t flags, bool poll); 622 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 623 unsigned int dword11, void *buffer, size_t buflen, 624 u32 *result); 625 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 626 unsigned int dword11, void *buffer, size_t buflen, 627 u32 *result); 628 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 629 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 630 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 631 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 632 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 633 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 634 635 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 636 void *log, size_t size, u64 offset); 637 struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 638 struct nvme_ns_head **head, int *srcu_idx); 639 void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx); 640 641 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 642 extern const struct block_device_operations nvme_ns_head_ops; 643 644 #ifdef CONFIG_NVME_MULTIPATH 645 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 646 { 647 return ctrl->ana_log_buf != NULL; 648 } 649 650 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 651 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 652 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 653 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 654 struct nvme_ctrl *ctrl, int *flags); 655 void nvme_failover_req(struct request *req); 656 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 657 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 658 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 659 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 660 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 661 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 662 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 663 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 664 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 665 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 666 blk_qc_t nvme_ns_head_submit_bio(struct bio *bio); 667 668 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 669 { 670 struct nvme_ns_head *head = ns->head; 671 672 if (head->disk && list_empty(&head->list)) 673 kblockd_schedule_work(&head->requeue_work); 674 } 675 676 static inline void nvme_trace_bio_complete(struct request *req, 677 blk_status_t status) 678 { 679 struct nvme_ns *ns = req->q->queuedata; 680 681 if (req->cmd_flags & REQ_NVME_MPATH) 682 trace_block_bio_complete(ns->head->disk->queue, req->bio); 683 } 684 685 extern struct device_attribute dev_attr_ana_grpid; 686 extern struct device_attribute dev_attr_ana_state; 687 extern struct device_attribute subsys_attr_iopolicy; 688 689 #else 690 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 691 { 692 return false; 693 } 694 /* 695 * Without the multipath code enabled, multiple controller per subsystems are 696 * visible as devices and thus we cannot use the subsystem instance. 697 */ 698 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 699 struct nvme_ctrl *ctrl, int *flags) 700 { 701 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 702 } 703 704 static inline void nvme_failover_req(struct request *req) 705 { 706 } 707 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 708 { 709 } 710 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 711 struct nvme_ns_head *head) 712 { 713 return 0; 714 } 715 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 716 struct nvme_id_ns *id) 717 { 718 } 719 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 720 { 721 } 722 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 723 { 724 return false; 725 } 726 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 727 { 728 } 729 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 730 { 731 } 732 static inline void nvme_trace_bio_complete(struct request *req, 733 blk_status_t status) 734 { 735 } 736 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 737 struct nvme_id_ctrl *id) 738 { 739 if (ctrl->subsys->cmic & (1 << 3)) 740 dev_warn(ctrl->device, 741 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 742 return 0; 743 } 744 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 745 { 746 } 747 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 748 { 749 } 750 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 751 { 752 } 753 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 754 { 755 } 756 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 757 { 758 } 759 #endif /* CONFIG_NVME_MULTIPATH */ 760 761 int nvme_revalidate_zones(struct nvme_ns *ns); 762 #ifdef CONFIG_BLK_DEV_ZONED 763 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 764 int nvme_report_zones(struct gendisk *disk, sector_t sector, 765 unsigned int nr_zones, report_zones_cb cb, void *data); 766 767 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 768 struct nvme_command *cmnd, 769 enum nvme_zone_mgmt_action action); 770 #else 771 #define nvme_report_zones NULL 772 773 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 774 struct request *req, struct nvme_command *cmnd, 775 enum nvme_zone_mgmt_action action) 776 { 777 return BLK_STS_NOTSUPP; 778 } 779 780 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 781 { 782 dev_warn(ns->ctrl->device, 783 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 784 return -EPROTONOSUPPORT; 785 } 786 #endif 787 788 #ifdef CONFIG_NVM 789 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 790 void nvme_nvm_unregister(struct nvme_ns *ns); 791 extern const struct attribute_group nvme_nvm_attr_group; 792 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 793 #else 794 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 795 int node) 796 { 797 return 0; 798 } 799 800 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 801 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 802 unsigned long arg) 803 { 804 return -ENOTTY; 805 } 806 #endif /* CONFIG_NVM */ 807 808 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 809 { 810 return dev_to_disk(dev)->private_data; 811 } 812 813 #ifdef CONFIG_NVME_HWMON 814 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 815 #else 816 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 817 { 818 return 0; 819 } 820 #endif 821 822 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 823 u8 opcode); 824 void nvme_execute_passthru_rq(struct request *rq); 825 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 826 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 827 void nvme_put_ns(struct nvme_ns *ns); 828 829 #endif /* _NVME_H */ 830