1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/soc/amlogic/meson-canvas.h> 16 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_gem_framebuffer_helper.h> 22 #include <drm/drm_irq.h> 23 #include <drm/drm_modeset_helper_vtables.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "meson_crtc.h" 28 #include "meson_drv.h" 29 #include "meson_overlay.h" 30 #include "meson_plane.h" 31 #include "meson_registers.h" 32 #include "meson_venc_cvbs.h" 33 #include "meson_viu.h" 34 #include "meson_vpp.h" 35 36 #define DRIVER_NAME "meson" 37 #define DRIVER_DESC "Amlogic Meson DRM driver" 38 39 /** 40 * DOC: Video Processing Unit 41 * 42 * VPU Handles the Global Video Processing, it includes management of the 43 * clocks gates, blocks reset lines and power domains. 44 * 45 * What is missing : 46 * 47 * - Full reset of entire video processing HW blocks 48 * - Scaling and setup of the VPU clock 49 * - Bus clock gates 50 * - Powering up video processing HW blocks 51 * - Powering Up HDMI controller and PHY 52 */ 53 54 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 55 .atomic_check = drm_atomic_helper_check, 56 .atomic_commit = drm_atomic_helper_commit, 57 .fb_create = drm_gem_fb_create, 58 }; 59 60 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 61 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 62 }; 63 64 static irqreturn_t meson_irq(int irq, void *arg) 65 { 66 struct drm_device *dev = arg; 67 struct meson_drm *priv = dev->dev_private; 68 69 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 70 71 meson_crtc_irq(priv); 72 73 return IRQ_HANDLED; 74 } 75 76 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 77 struct drm_mode_create_dumb *args) 78 { 79 /* 80 * We need 64bytes aligned stride, and PAGE aligned size 81 */ 82 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 83 args->size = PAGE_ALIGN(args->pitch * args->height); 84 85 return drm_gem_cma_dumb_create_internal(file, dev, args); 86 } 87 88 DEFINE_DRM_GEM_CMA_FOPS(fops); 89 90 static struct drm_driver meson_driver = { 91 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 92 93 /* IRQ */ 94 .irq_handler = meson_irq, 95 96 /* PRIME Ops */ 97 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 98 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 99 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 100 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 101 .gem_prime_vmap = drm_gem_cma_prime_vmap, 102 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 103 .gem_prime_mmap = drm_gem_cma_prime_mmap, 104 105 /* GEM Ops */ 106 .dumb_create = meson_dumb_create, 107 .gem_free_object_unlocked = drm_gem_cma_free_object, 108 .gem_vm_ops = &drm_gem_cma_vm_ops, 109 110 /* Misc */ 111 .fops = &fops, 112 .name = DRIVER_NAME, 113 .desc = DRIVER_DESC, 114 .date = "20161109", 115 .major = 1, 116 .minor = 0, 117 }; 118 119 static bool meson_vpu_has_available_connectors(struct device *dev) 120 { 121 struct device_node *ep, *remote; 122 123 /* Parses each endpoint and check if remote exists */ 124 for_each_endpoint_of_node(dev->of_node, ep) { 125 /* If the endpoint node exists, consider it enabled */ 126 remote = of_graph_get_remote_port(ep); 127 if (remote) 128 return true; 129 } 130 131 return false; 132 } 133 134 static struct regmap_config meson_regmap_config = { 135 .reg_bits = 32, 136 .val_bits = 32, 137 .reg_stride = 4, 138 .max_register = 0x1000, 139 }; 140 141 static void meson_vpu_init(struct meson_drm *priv) 142 { 143 u32 value; 144 145 /* 146 * Slave dc0 and dc5 connected to master port 1. 147 * By default other slaves are connected to master port 0. 148 */ 149 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) | 150 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1); 151 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 152 153 /* Slave dc0 connected to master port 1 */ 154 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1); 155 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 156 157 /* Slave dc4 and dc7 connected to master port 1 */ 158 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) | 159 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1); 160 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 161 162 /* Slave dc1 connected to master port 1 */ 163 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1); 164 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 165 } 166 167 static void meson_remove_framebuffers(void) 168 { 169 struct apertures_struct *ap; 170 171 ap = alloc_apertures(1); 172 if (!ap) 173 return; 174 175 /* The framebuffer can be located anywhere in RAM */ 176 ap->ranges[0].base = 0; 177 ap->ranges[0].size = ~0; 178 179 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 180 false); 181 kfree(ap); 182 } 183 184 static int meson_drv_bind_master(struct device *dev, bool has_components) 185 { 186 struct platform_device *pdev = to_platform_device(dev); 187 struct meson_drm *priv; 188 struct drm_device *drm; 189 struct resource *res; 190 void __iomem *regs; 191 int ret; 192 193 /* Checks if an output connector is available */ 194 if (!meson_vpu_has_available_connectors(dev)) { 195 dev_err(dev, "No output connector available\n"); 196 return -ENODEV; 197 } 198 199 drm = drm_dev_alloc(&meson_driver, dev); 200 if (IS_ERR(drm)) 201 return PTR_ERR(drm); 202 203 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 204 if (!priv) { 205 ret = -ENOMEM; 206 goto free_drm; 207 } 208 drm->dev_private = priv; 209 priv->drm = drm; 210 priv->dev = dev; 211 212 priv->compat = (enum vpu_compatible)of_device_get_match_data(priv->dev); 213 214 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 215 regs = devm_ioremap_resource(dev, res); 216 if (IS_ERR(regs)) { 217 ret = PTR_ERR(regs); 218 goto free_drm; 219 } 220 221 priv->io_base = regs; 222 223 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 224 if (!res) { 225 ret = -EINVAL; 226 goto free_drm; 227 } 228 /* Simply ioremap since it may be a shared register zone */ 229 regs = devm_ioremap(dev, res->start, resource_size(res)); 230 if (!regs) { 231 ret = -EADDRNOTAVAIL; 232 goto free_drm; 233 } 234 235 priv->hhi = devm_regmap_init_mmio(dev, regs, 236 &meson_regmap_config); 237 if (IS_ERR(priv->hhi)) { 238 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 239 ret = PTR_ERR(priv->hhi); 240 goto free_drm; 241 } 242 243 priv->canvas = meson_canvas_get(dev); 244 if (IS_ERR(priv->canvas)) { 245 ret = PTR_ERR(priv->canvas); 246 goto free_drm; 247 } 248 249 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 250 if (ret) 251 goto free_drm; 252 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 253 if (ret) { 254 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 255 goto free_drm; 256 } 257 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 258 if (ret) { 259 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 260 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 261 goto free_drm; 262 } 263 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 264 if (ret) { 265 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 266 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 267 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 268 goto free_drm; 269 } 270 271 priv->vsync_irq = platform_get_irq(pdev, 0); 272 273 ret = drm_vblank_init(drm, 1); 274 if (ret) 275 goto free_drm; 276 277 /* Remove early framebuffers (ie. simplefb) */ 278 meson_remove_framebuffers(); 279 280 drm_mode_config_init(drm); 281 drm->mode_config.max_width = 3840; 282 drm->mode_config.max_height = 2160; 283 drm->mode_config.funcs = &meson_mode_config_funcs; 284 drm->mode_config.helper_private = &meson_mode_config_helpers; 285 286 /* Hardware Initialization */ 287 288 meson_vpu_init(priv); 289 meson_venc_init(priv); 290 meson_vpp_init(priv); 291 meson_viu_init(priv); 292 293 /* Encoder Initialization */ 294 295 ret = meson_venc_cvbs_create(priv); 296 if (ret) 297 goto free_drm; 298 299 if (has_components) { 300 ret = component_bind_all(drm->dev, drm); 301 if (ret) { 302 dev_err(drm->dev, "Couldn't bind all components\n"); 303 goto free_drm; 304 } 305 } 306 307 ret = meson_plane_create(priv); 308 if (ret) 309 goto free_drm; 310 311 ret = meson_overlay_create(priv); 312 if (ret) 313 goto free_drm; 314 315 ret = meson_crtc_create(priv); 316 if (ret) 317 goto free_drm; 318 319 ret = drm_irq_install(drm, priv->vsync_irq); 320 if (ret) 321 goto free_drm; 322 323 drm_mode_config_reset(drm); 324 325 drm_kms_helper_poll_init(drm); 326 327 platform_set_drvdata(pdev, priv); 328 329 ret = drm_dev_register(drm, 0); 330 if (ret) 331 goto uninstall_irq; 332 333 drm_fbdev_generic_setup(drm, 32); 334 335 return 0; 336 337 uninstall_irq: 338 drm_irq_uninstall(drm); 339 free_drm: 340 drm_dev_put(drm); 341 342 return ret; 343 } 344 345 static int meson_drv_bind(struct device *dev) 346 { 347 return meson_drv_bind_master(dev, true); 348 } 349 350 static void meson_drv_unbind(struct device *dev) 351 { 352 struct meson_drm *priv = dev_get_drvdata(dev); 353 struct drm_device *drm = priv->drm; 354 355 if (priv->canvas) { 356 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 357 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 358 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 359 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 360 } 361 362 drm_dev_unregister(drm); 363 drm_irq_uninstall(drm); 364 drm_kms_helper_poll_fini(drm); 365 drm_mode_config_cleanup(drm); 366 drm_dev_put(drm); 367 368 } 369 370 static const struct component_master_ops meson_drv_master_ops = { 371 .bind = meson_drv_bind, 372 .unbind = meson_drv_unbind, 373 }; 374 375 static int __maybe_unused meson_drv_pm_suspend(struct device *dev) 376 { 377 struct meson_drm *priv = dev_get_drvdata(dev); 378 379 if (!priv) 380 return 0; 381 382 return drm_mode_config_helper_suspend(priv->drm); 383 } 384 385 static int __maybe_unused meson_drv_pm_resume(struct device *dev) 386 { 387 struct meson_drm *priv = dev_get_drvdata(dev); 388 389 if (!priv) 390 return 0; 391 392 meson_vpu_init(priv); 393 meson_venc_init(priv); 394 meson_vpp_init(priv); 395 meson_viu_init(priv); 396 397 drm_mode_config_helper_resume(priv->drm); 398 399 return 0; 400 } 401 402 static int compare_of(struct device *dev, void *data) 403 { 404 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 405 dev->of_node, data); 406 407 return dev->of_node == data; 408 } 409 410 /* Possible connectors nodes to ignore */ 411 static const struct of_device_id connectors_match[] = { 412 { .compatible = "composite-video-connector" }, 413 { .compatible = "svideo-connector" }, 414 { .compatible = "hdmi-connector" }, 415 { .compatible = "dvi-connector" }, 416 {} 417 }; 418 419 static int meson_probe_remote(struct platform_device *pdev, 420 struct component_match **match, 421 struct device_node *parent, 422 struct device_node *remote) 423 { 424 struct device_node *ep, *remote_node; 425 int count = 1; 426 427 /* If node is a connector, return and do not add to match table */ 428 if (of_match_node(connectors_match, remote)) 429 return 1; 430 431 component_match_add(&pdev->dev, match, compare_of, remote); 432 433 for_each_endpoint_of_node(remote, ep) { 434 remote_node = of_graph_get_remote_port_parent(ep); 435 if (!remote_node || 436 remote_node == parent || /* Ignore parent endpoint */ 437 !of_device_is_available(remote_node)) { 438 of_node_put(remote_node); 439 continue; 440 } 441 442 count += meson_probe_remote(pdev, match, remote, remote_node); 443 444 of_node_put(remote_node); 445 } 446 447 return count; 448 } 449 450 static int meson_drv_probe(struct platform_device *pdev) 451 { 452 struct component_match *match = NULL; 453 struct device_node *np = pdev->dev.of_node; 454 struct device_node *ep, *remote; 455 int count = 0; 456 457 for_each_endpoint_of_node(np, ep) { 458 remote = of_graph_get_remote_port_parent(ep); 459 if (!remote || !of_device_is_available(remote)) { 460 of_node_put(remote); 461 continue; 462 } 463 464 count += meson_probe_remote(pdev, &match, np, remote); 465 of_node_put(remote); 466 } 467 468 if (count && !match) 469 return meson_drv_bind_master(&pdev->dev, false); 470 471 /* If some endpoints were found, initialize the nodes */ 472 if (count) { 473 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 474 475 return component_master_add_with_match(&pdev->dev, 476 &meson_drv_master_ops, 477 match); 478 } 479 480 /* If no output endpoints were available, simply bail out */ 481 return 0; 482 }; 483 484 static const struct of_device_id dt_match[] = { 485 { .compatible = "amlogic,meson-gxbb-vpu", 486 .data = (void *)VPU_COMPATIBLE_GXBB }, 487 { .compatible = "amlogic,meson-gxl-vpu", 488 .data = (void *)VPU_COMPATIBLE_GXL }, 489 { .compatible = "amlogic,meson-gxm-vpu", 490 .data = (void *)VPU_COMPATIBLE_GXM }, 491 { .compatible = "amlogic,meson-g12a-vpu", 492 .data = (void *)VPU_COMPATIBLE_G12A }, 493 {} 494 }; 495 MODULE_DEVICE_TABLE(of, dt_match); 496 497 static const struct dev_pm_ops meson_drv_pm_ops = { 498 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume) 499 }; 500 501 static struct platform_driver meson_drm_platform_driver = { 502 .probe = meson_drv_probe, 503 .driver = { 504 .name = "meson-drm", 505 .of_match_table = dt_match, 506 .pm = &meson_drv_pm_ops, 507 }, 508 }; 509 510 module_platform_driver(meson_drm_platform_driver); 511 512 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 513 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 514 MODULE_DESCRIPTION(DRIVER_DESC); 515 MODULE_LICENSE("GPL"); 516