target/openrisc: Rename the cpu from or32 to or1kThis is in keeping with the toolchain and or1ksim.Signed-off-by: Richard Henderson <rth@twiddle.net>
target-openrisc: Correct carry flag check of l.addc and l.addic test casesThe test cases did not correctly test for the carry flag.Signed-off-by: Sebastian Macke <sebastian@macke.de>Reviewed-by:
target-openrisc: Correct carry flag check of l.addc and l.addic test casesThe test cases did not correctly test for the carry flag.Signed-off-by: Sebastian Macke <sebastian@macke.de>Reviewed-by: Jia Liu <proljc@gmail.com>Signed-off-by: Jia Liu <proljc@gmail.com>
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target-or32: Add testcasesAdd testcases for OpenRISC.Signed-off-by: Jia Liu <proljc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>