1 /* 2 * ARM11MPCore Snoop Control Unit (SCU) emulation 3 * 4 * Copyright (c) 2006-2007 CodeSourcery. 5 * Copyright (c) 2013 SUSE LINUX Products GmbH 6 * Written by Paul Brook and Andreas Färber 7 * 8 * This code is licensed under the GPL. 9 */ 10 11 #include "hw/misc/arm11scu.h" 12 13 static uint64_t mpcore_scu_read(void *opaque, hwaddr offset, 14 unsigned size) 15 { 16 ARM11SCUState *s = (ARM11SCUState *)opaque; 17 int id; 18 /* SCU */ 19 switch (offset) { 20 case 0x00: /* Control. */ 21 return s->control; 22 case 0x04: /* Configuration. */ 23 id = ((1 << s->num_cpu) - 1) << 4; 24 return id | (s->num_cpu - 1); 25 case 0x08: /* CPU status. */ 26 return 0; 27 case 0x0c: /* Invalidate all. */ 28 return 0; 29 default: 30 qemu_log_mask(LOG_GUEST_ERROR, 31 "mpcore_priv_read: Bad offset %x\n", (int)offset); 32 return 0; 33 } 34 } 35 36 static void mpcore_scu_write(void *opaque, hwaddr offset, 37 uint64_t value, unsigned size) 38 { 39 ARM11SCUState *s = (ARM11SCUState *)opaque; 40 /* SCU */ 41 switch (offset) { 42 case 0: /* Control register. */ 43 s->control = value & 1; 44 break; 45 case 0x0c: /* Invalidate all. */ 46 /* This is a no-op as cache is not emulated. */ 47 break; 48 default: 49 qemu_log_mask(LOG_GUEST_ERROR, 50 "mpcore_priv_read: Bad offset %x\n", (int)offset); 51 } 52 } 53 54 static const MemoryRegionOps mpcore_scu_ops = { 55 .read = mpcore_scu_read, 56 .write = mpcore_scu_write, 57 .endianness = DEVICE_NATIVE_ENDIAN, 58 }; 59 60 static void arm11_scu_realize(DeviceState *dev, Error **errp) 61 { 62 } 63 64 static void arm11_scu_init(Object *obj) 65 { 66 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 67 ARM11SCUState *s = ARM11_SCU(obj); 68 69 memory_region_init_io(&s->iomem, OBJECT(s), 70 &mpcore_scu_ops, s, "mpcore-scu", 0x100); 71 sysbus_init_mmio(sbd, &s->iomem); 72 } 73 74 static Property arm11_scu_properties[] = { 75 DEFINE_PROP_UINT32("num-cpu", ARM11SCUState, num_cpu, 1), 76 DEFINE_PROP_END_OF_LIST() 77 }; 78 79 static void arm11_scu_class_init(ObjectClass *oc, void *data) 80 { 81 DeviceClass *dc = DEVICE_CLASS(oc); 82 83 dc->realize = arm11_scu_realize; 84 dc->props = arm11_scu_properties; 85 } 86 87 static const TypeInfo arm11_scu_type_info = { 88 .name = TYPE_ARM11_SCU, 89 .parent = TYPE_SYS_BUS_DEVICE, 90 .instance_size = sizeof(ARM11SCUState), 91 .instance_init = arm11_scu_init, 92 .class_init = arm11_scu_class_init, 93 }; 94 95 static void arm11_scu_register_types(void) 96 { 97 type_register_static(&arm11_scu_type_info); 98 } 99 100 type_init(arm11_scu_register_types) 101