1 /* 2 * Copyright (C) 2012,2013 - ARM Ltd 3 * Author: Marc Zyngier <marc.zyngier@arm.com> 4 * 5 * Derived from arch/arm/include/uapi/asm/kvm.h: 6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 7 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef __ARM_KVM_H__ 23 #define __ARM_KVM_H__ 24 25 #define KVM_SPSR_EL1 0 26 #define KVM_SPSR_SVC KVM_SPSR_EL1 27 #define KVM_SPSR_ABT 1 28 #define KVM_SPSR_UND 2 29 #define KVM_SPSR_IRQ 3 30 #define KVM_SPSR_FIQ 4 31 #define KVM_NR_SPSR 5 32 33 #ifndef __ASSEMBLY__ 34 #include <asm/types.h> 35 #include <asm/ptrace.h> 36 37 #define __KVM_HAVE_GUEST_DEBUG 38 #define __KVM_HAVE_IRQ_LINE 39 40 #define KVM_REG_SIZE(id) \ 41 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) 42 43 struct kvm_regs { 44 struct user_pt_regs regs; /* sp = sp_el0 */ 45 46 __u64 sp_el1; 47 __u64 elr_el1; 48 49 __u64 spsr[KVM_NR_SPSR]; 50 51 struct user_fpsimd_state fp_regs; 52 }; 53 54 /* Supported Processor Types */ 55 #define KVM_ARM_TARGET_AEM_V8 0 56 #define KVM_ARM_TARGET_FOUNDATION_V8 1 57 #define KVM_ARM_TARGET_CORTEX_A57 2 58 59 #define KVM_ARM_NUM_TARGETS 3 60 61 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ 62 #define KVM_ARM_DEVICE_TYPE_SHIFT 0 63 #define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) 64 #define KVM_ARM_DEVICE_ID_SHIFT 16 65 #define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) 66 67 /* Supported device IDs */ 68 #define KVM_ARM_DEVICE_VGIC_V2 0 69 70 /* Supported VGIC address types */ 71 #define KVM_VGIC_V2_ADDR_TYPE_DIST 0 72 #define KVM_VGIC_V2_ADDR_TYPE_CPU 1 73 74 #define KVM_VGIC_V2_DIST_SIZE 0x1000 75 #define KVM_VGIC_V2_CPU_SIZE 0x2000 76 77 #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ 78 #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ 79 80 struct kvm_vcpu_init { 81 __u32 target; 82 __u32 features[7]; 83 }; 84 85 struct kvm_sregs { 86 }; 87 88 struct kvm_fpu { 89 }; 90 91 struct kvm_guest_debug_arch { 92 }; 93 94 struct kvm_debug_exit_arch { 95 }; 96 97 struct kvm_sync_regs { 98 }; 99 100 struct kvm_arch_memory_slot { 101 }; 102 103 /* If you need to interpret the index values, here is the key: */ 104 #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 105 #define KVM_REG_ARM_COPROC_SHIFT 16 106 107 /* Normal registers are mapped as coprocessor 16. */ 108 #define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) 109 #define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32)) 110 111 /* Some registers need more space to represent values. */ 112 #define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) 113 #define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 114 #define KVM_REG_ARM_DEMUX_ID_SHIFT 8 115 #define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) 116 #define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF 117 #define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 118 119 /* AArch64 system registers */ 120 #define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT) 121 #define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000 122 #define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14 123 #define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800 124 #define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11 125 #define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780 126 #define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7 127 #define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078 128 #define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3 129 #define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007 130 #define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0 131 132 /* KVM_IRQ_LINE irq field index values */ 133 #define KVM_ARM_IRQ_TYPE_SHIFT 24 134 #define KVM_ARM_IRQ_TYPE_MASK 0xff 135 #define KVM_ARM_IRQ_VCPU_SHIFT 16 136 #define KVM_ARM_IRQ_VCPU_MASK 0xff 137 #define KVM_ARM_IRQ_NUM_SHIFT 0 138 #define KVM_ARM_IRQ_NUM_MASK 0xffff 139 140 /* irq_type field */ 141 #define KVM_ARM_IRQ_TYPE_CPU 0 142 #define KVM_ARM_IRQ_TYPE_SPI 1 143 #define KVM_ARM_IRQ_TYPE_PPI 2 144 145 /* out-of-kernel GIC cpu interrupt injection irq_number field */ 146 #define KVM_ARM_IRQ_CPU_IRQ 0 147 #define KVM_ARM_IRQ_CPU_FIQ 1 148 149 /* Highest supported SPI, from VGIC_NR_IRQS */ 150 #define KVM_ARM_IRQ_GIC_MAX 127 151 152 /* PSCI interface */ 153 #define KVM_PSCI_FN_BASE 0x95c1ba5e 154 #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) 155 156 #define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) 157 #define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) 158 #define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) 159 #define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) 160 161 #define KVM_PSCI_RET_SUCCESS 0 162 #define KVM_PSCI_RET_NI ((unsigned long)-1) 163 #define KVM_PSCI_RET_INVAL ((unsigned long)-2) 164 #define KVM_PSCI_RET_DENIED ((unsigned long)-3) 165 166 #endif 167 168 #endif /* __ARM_KVM_H__ */ 169