xref: /openbmc/qemu/include/hw/timer/aspeed_timer.h (revision 4a09d0bb)
1 /*
2  *  ASPEED AST2400 Timer
3  *
4  *  Andrew Jeffery <andrew@aj.id.au>
5  *
6  *  Copyright (C) 2016 IBM Corp.
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; either version 2 of the License, or
11  *  (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License along
19  *  with this program; if not, write to the Free Software Foundation, Inc.,
20  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21  */
22 #ifndef ASPEED_TIMER_H
23 #define ASPEED_TIMER_H
24 
25 #include "qemu/timer.h"
26 
27 #define ASPEED_TIMER(obj) \
28     OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
29 #define TYPE_ASPEED_TIMER "aspeed.timer"
30 #define ASPEED_TIMER_NR_TIMERS 8
31 
32 typedef struct AspeedTimer {
33     qemu_irq irq;
34 
35     uint8_t id;
36     QEMUTimer timer;
37 
38     /**
39      * Track the line level as the ASPEED timers implement edge triggered
40      * interrupts, signalling with both the rising and falling edge.
41      */
42     int32_t level;
43     uint32_t reload;
44     uint32_t match[2];
45     uint64_t start;
46 } AspeedTimer;
47 
48 typedef struct AspeedTimerCtrlState {
49     /*< private >*/
50     SysBusDevice parent;
51 
52     /*< public >*/
53     MemoryRegion iomem;
54 
55     uint32_t ctrl;
56     uint32_t ctrl2;
57     AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
58 } AspeedTimerCtrlState;
59 
60 #endif /* ASPEED_TIMER_H */
61