ppc: amcc: Omit unneeded ns16550 CONFIG if using driver model

This comes from the device tree or a call to get_uart_clock().

Signed-off-by: Simon Glass <sjg@chromium.org>

powerpc: ppc4xx: Add a gpio.h header file

This is required at present for device tree control. The ppc4xx does support
GPIOs but does not seem to have a proper driver. So this file is empty.

Signed

powerpc: ppc4xx: Add a gpio.h header file

This is required at present for device tree control. The ppc4xx does support
GPIOs but does not seem to have a proper driver. So this file is empty.

Signed-off-by: Simon Glass <sjg@chromium.org>

show more ...

crypto/fsl: Add fixup for crypto node

Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used acro

crypto/fsl: Add fixup for crypto node

Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Fix commit message indentation]
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

arch/powerpc: Add SGMII support for the L2 Switch ports

Some Freescale SoCs like T1020 and T1040 have an integrated
L2 Switch. The L2 Switch ports may be connected to Ethernet PHYs
over SGMII and QS

arch/powerpc: Add SGMII support for the L2 Switch ports

Some Freescale SoCs like T1020 and T1040 have an integrated
L2 Switch. The L2 Switch ports may be connected to Ethernet PHYs
over SGMII and QSGMII.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

arch/powerpc: Fix mapping of Freescale SerDes protocols

The number of supported serdes protocols on Freescale SoCs
has increased over time. Until now, an u64 variable have been
initialized on boot w

arch/powerpc: Fix mapping of Freescale SerDes protocols

The number of supported serdes protocols on Freescale SoCs
has increased over time. Until now, an u64 variable have been
initialized on boot with the configured protocols. However,
since this number has increased (enum srds_prtcl has more
than 64 values), 64 bits are no longer sufficient to hold track
of all the configured protocols.
This patch replaces the u64 map values with static arrays.
To keep track of the number of serdes protocols, the
SERDES_PRCTL_COUNT vale has been added at the end of
enum srds_prtcl. This value must always be the last one.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc/mpc85xx: Define PBI Flash Base for C29XPCIE Secure Boot

CONFIG_SYS_PBI_FLASH_BASE is defined for Secure Boot on C29X

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by:

powerpc/mpc85xx: Define PBI Flash Base for C29XPCIE Secure Boot

CONFIG_SYS_PBI_FLASH_BASE is defined for Secure Boot on C29X

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc: mpc85xx: Add dummy gpio.h to enable CONFIG_OF_CONTROL

If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>.

powerpc: mpc85xx: Add dummy gpio.h to enable CONFIG_OF_CONTROL

If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>. As a result, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h>.

The right fix would be to split the lib/fdtdec.c to remove
dependency on GPIO.

This commit adds a dummy <asm/arch/gpio.h> to support OF_CONTROL
for mpc85xx platform. A file mpc85xx_gpio.h exists in
arch/powerpc/include/asm. The defintions in that file conflict
with the ones in asm-generic/gpio.h. Hence a dummy header file
has been added. This will be removed after FDT-GPIO stuff is
fixed correctly.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc: 74xx_7xx: remove 74xx_7xx cpu support

All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2

Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan R

powerpc: 74xx_7xx: remove 74xx_7xx cpu support

All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2

Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>

show more ...

powerpc: mpc824x: remove MPC824X cpu support

All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245

Signed-off-by: Masahiro Yamad

powerpc: mpc824x: remove MPC824X cpu support

All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Torsten Demke <torsten.demke@fci.com>
Cc: Jim Thompson <jim@musenki.com>
Cc: Greg Allen <gallen@arlut.utexas.edu>

show more ...

mpc8xx: remove lwmon board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>

powerpc/mpc85xx: use correct dma compatible for several SoCs

Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get

powerpc/mpc85xx: use correct dma compatible for several SoCs

Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get their liodn.
In order to have the means to specify the compatible
string, the liodn setting macros were updated to receive
a new parameter for it.
The following SoCs were changed to use the new compatible:
T1023/4, T1040, T2080/1, T4240, B4860.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

t1024qds: increase IO drive strength

Increase IO drive strength to fix FCS error on RGMII ports
on T1024QDS.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksu

t1024qds: increase IO drive strength

Increase IO drive strength to fix FCS error on RGMII ports
on T1024QDS.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

net/fman: update 10GEC to fit new SoC

fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
o

net/fman: update 10GEC to fit new SoC

fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
10GEC1->MAC1, 10GEC2->MAC2

so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc/mpc85xx: Add T1024/T1023 SoC support

Add support for Freescale T1024/T1023 SoC.

The T1024 SoC includes the following function and features:
- Two 64-bit Power architecture e5500 cores, up t

powerpc/mpc85xx: Add T1024/T1023 SoC support

Add support for Freescale T1024/T1023 SoC.

The T1024 SoC includes the following function and features:
- Two 64-bit Power architecture e5500 cores, up to 1.4GHz
- private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC)
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
- Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI)
- High-speed peripheral interfaces
- Three PCI Express 2.0 controllers
- Additional peripheral interfaces
- One SATA 2.0 controller
- Two USB 2.0 controllers with integrated PHY
- Enhanced secure digital host controller (SD/eSDHC/eMMC)
- Enhanced serial peripheral interface (eSPI)
- Four I2C controllers
- Four 2-pin UARTs or two 4-pin UARTs
- Integrated Flash Controller supporting NAND and NOR flash
- Two 8-channel DMA engines
- Multicore programmable interrupt controller (PIC)
- LCD interface (DIU) with 12 bit dual data rate
- QUICC Engine block supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0

Differences between T1024 and T1023:
Feature T1024 T1023
QUICC Engine: yes no
DIU: yes no
Deep Sleep: yes no
I2C controller: 4 3
DDR: 64-bit 32-bit
IFC: 32-bit 28-bit

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc/mpc85xx: modify erratum A007186

T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN f

powerpc/mpc85xx: modify erratum A007186

T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

powerpc/mpc85xx:Put errata number for T104x NAND boot issue

When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7

powerpc/mpc85xx:Put errata number for T104x NAND boot issue

When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.

Workaround is already in-place.
Put the errata number to adhere errata handling framework.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

drivers : usb: fsl: Implement usb Erratum A007798 workaround

Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large
usb writes

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>

drivers : usb: fsl: Implement usb Erratum A007798 workaround

Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large
usb writes

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

drivers: usb: fsl: Move USB Errata checking code

Move USB Errata checking code from "arch/powerpc" to architecture independent
file "fsl_usb.h" so that errata(s) become independent of the architectu

drivers: usb: fsl: Move USB Errata checking code

Move USB Errata checking code from "arch/powerpc" to architecture independent
file "fsl_usb.h" so that errata(s) become independent of the architecture.
For each erratum checking function for PPC arch, define a nop function for
non PPC arch for successful compilation in either case

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

net/fm: add 2.5G SGMII support

As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different se

net/fm: add 2.5G SGMII support

As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

driver/net/fm/memac_phy: set NEG bit for external MDIOs

NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failur

driver/net/fm/memac_phy: set NEG bit for external MDIOs

NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

Fman/mEMAC: mEMAC fix for 10G MAC and PHY

1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode

Fman/mEMAC: mEMAC fix for 10G MAC and PHY

1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode;
4. return 0xffff if clause 22 is used to read 10G phy_id;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-By: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>

show more ...

ppc4xx: Handle i2c stuck on combined xfer

ppc4xx i2c master gets stuck on errors while repeated start is
active. Can be easily reproduced by "i2c md" on an unpopulated
i2c address. There is not stop

ppc4xx: Handle i2c stuck on combined xfer

ppc4xx i2c master gets stuck on errors while repeated start is
active. Can be easily reproduced by "i2c md" on an unpopulated
i2c address. There is not stop condition given, scl remains
pulled low.
The only way out seems to be doing a stop manually and then a
soft reset.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>

show more ...

ppc: Zap Hymod board

Remove this board as this is the only one last user of eeprom_probe(),
which is pretty non-standard stuff.

This patch also removes all the PHP, SQL and CSS stuff from U-Boot,
w

ppc: Zap Hymod board

Remove this board as this is the only one last user of eeprom_probe(),
which is pretty non-standard stuff.

This patch also removes all the PHP, SQL and CSS stuff from U-Boot,
which probably makes U-Boot a bit less IoT ;-)

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>

show more ...

powerpc: mpc512x: fix boot breakage

Commit d6b11fd1 (powerpc: remove MBX and MBX860T boards support)
removed mbxbar field in "struct sysconf512x" by mistake and broke
booting on mpc5121 boards. Fix

powerpc: mpc512x: fix boot breakage

Commit d6b11fd1 (powerpc: remove MBX and MBX860T boards support)
removed mbxbar field in "struct sysconf512x" by mistake and broke
booting on mpc5121 boards. Fix it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

show more ...