1 /* 2 * Copyright (C) 2014 Panasonic Corporation 3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <linux/types.h> 10 #include <asm/io.h> 11 #include <asm/errno.h> 12 #include <dm/device.h> 13 #include <dm/root.h> 14 #include <i2c.h> 15 #include <fdtdec.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 struct uniphier_i2c_regs { 20 u32 dtrm; /* data transmission */ 21 #define I2C_DTRM_STA (1 << 10) 22 #define I2C_DTRM_STO (1 << 9) 23 #define I2C_DTRM_NACK (1 << 8) 24 #define I2C_DTRM_RD (1 << 0) 25 u32 drec; /* data reception */ 26 #define I2C_DREC_STS (1 << 12) 27 #define I2C_DREC_LRB (1 << 11) 28 #define I2C_DREC_LAB (1 << 9) 29 u32 myad; /* slave address */ 30 u32 clk; /* clock frequency control */ 31 u32 brst; /* bus reset */ 32 #define I2C_BRST_FOEN (1 << 1) 33 #define I2C_BRST_BRST (1 << 0) 34 u32 hold; /* hold time control */ 35 u32 bsts; /* bus status monitor */ 36 u32 noise; /* noise filter control */ 37 u32 setup; /* setup time control */ 38 }; 39 40 #define IOBUS_FREQ 100000000 41 42 struct uniphier_i2c_dev { 43 struct uniphier_i2c_regs __iomem *regs; /* register base */ 44 unsigned long input_clk; /* master clock (Hz) */ 45 unsigned long wait_us; /* wait for every byte transfer (us) */ 46 }; 47 48 static int uniphier_i2c_probe(struct udevice *dev) 49 { 50 fdt_addr_t addr; 51 fdt_size_t size; 52 struct uniphier_i2c_dev *priv = dev_get_priv(dev); 53 54 addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); 55 56 priv->regs = map_sysmem(addr, size); 57 58 if (!priv->regs) 59 return -ENOMEM; 60 61 priv->input_clk = IOBUS_FREQ; 62 63 /* deassert reset */ 64 writel(0x3, &priv->regs->brst); 65 66 return 0; 67 } 68 69 static int uniphier_i2c_remove(struct udevice *dev) 70 { 71 struct uniphier_i2c_dev *priv = dev_get_priv(dev); 72 73 unmap_sysmem(priv->regs); 74 75 return 0; 76 } 77 78 static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm) 79 { 80 writel(dtrm, &dev->regs->dtrm); 81 82 /* 83 * This controller only provides interruption to inform the completion 84 * of each byte transfer. (No status register to poll it.) 85 * Unfortunately, U-Boot does not have a good support of interrupt. 86 * Wait for a while. 87 */ 88 udelay(dev->wait_us); 89 90 return readl(&dev->regs->drec); 91 } 92 93 static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop) 94 { 95 int ret = 0; 96 u32 drec; 97 98 drec = send_and_recv_byte(dev, dtrm); 99 100 if (drec & I2C_DREC_LAB) { 101 debug("uniphier_i2c: bus arbitration failed\n"); 102 *stop = false; 103 ret = -EREMOTEIO; 104 } 105 if (drec & I2C_DREC_LRB) { 106 debug("uniphier_i2c: slave did not return ACK\n"); 107 ret = -EREMOTEIO; 108 } 109 return ret; 110 } 111 112 static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr, 113 uint len, const u8 *buf, bool *stop) 114 { 115 int ret; 116 117 debug("%s: addr = %x, len = %d\n", __func__, addr, len); 118 119 ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop); 120 if (ret < 0) 121 goto fail; 122 123 while (len--) { 124 ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop); 125 if (ret < 0) 126 goto fail; 127 } 128 129 fail: 130 if (*stop) 131 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); 132 133 return ret; 134 } 135 136 static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr, 137 uint len, u8 *buf, bool *stop) 138 { 139 int ret; 140 141 debug("%s: addr = %x, len = %d\n", __func__, addr, len); 142 143 ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | 144 I2C_DTRM_RD | addr << 1, stop); 145 if (ret < 0) 146 goto fail; 147 148 while (len--) 149 *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK); 150 151 fail: 152 if (*stop) 153 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); 154 155 return ret; 156 } 157 158 static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, 159 int nmsgs) 160 { 161 int ret = 0; 162 struct uniphier_i2c_dev *dev = dev_get_priv(bus); 163 bool stop; 164 165 for (; nmsgs > 0; nmsgs--, msg++) { 166 /* If next message is read, skip the stop condition */ 167 stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true; 168 169 if (msg->flags & I2C_M_RD) 170 ret = uniphier_i2c_receive(dev, msg->addr, msg->len, 171 msg->buf, &stop); 172 else 173 ret = uniphier_i2c_transmit(dev, msg->addr, msg->len, 174 msg->buf, &stop); 175 176 if (ret < 0) 177 break; 178 } 179 180 return ret; 181 } 182 183 static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) 184 { 185 struct uniphier_i2c_dev *priv = dev_get_priv(bus); 186 187 /* max supported frequency is 400 kHz */ 188 if (speed > 400000) 189 return -EINVAL; 190 191 /* bus reset: make sure the bus is idle when change the frequency */ 192 writel(0x1, &priv->regs->brst); 193 194 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed), 195 &priv->regs->clk); 196 197 writel(0x3, &priv->regs->brst); 198 199 /* 200 * Theoretically, each byte can be transferred in 201 * 1000000 * 9 / speed usec. For safety, wait more than double. 202 */ 203 priv->wait_us = 20000000 / speed; 204 205 return 0; 206 } 207 208 209 static const struct dm_i2c_ops uniphier_i2c_ops = { 210 .xfer = uniphier_i2c_xfer, 211 .set_bus_speed = uniphier_i2c_set_bus_speed, 212 }; 213 214 static const struct udevice_id uniphier_i2c_of_match[] = { 215 { .compatible = "panasonic,uniphier-i2c" }, 216 {}, 217 }; 218 219 U_BOOT_DRIVER(uniphier_i2c) = { 220 .name = "uniphier-i2c", 221 .id = UCLASS_I2C, 222 .of_match = uniphier_i2c_of_match, 223 .probe = uniphier_i2c_probe, 224 .remove = uniphier_i2c_remove, 225 .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev), 226 .ops = &uniphier_i2c_ops, 227 }; 228