1 /*
2  *  Copyright (C) 2010 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/pinmux.h>
16 #include <asm/arch/watchdog.h>
17 #include <ld9040.h>
18 #include <power/pmic.h>
19 #include <usb.h>
20 #include <usb/s3c_udc.h>
21 #include <asm/arch/cpu.h>
22 #include <power/max8998_pmic.h>
23 #include <libtizen.h>
24 #include <samsung/misc.h>
25 #include <usb_mass_storage.h>
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
29 unsigned int board_rev;
30 
31 u32 get_board_rev(void)
32 {
33 	return board_rev;
34 }
35 
36 static int get_hwrev(void)
37 {
38 	return board_rev & 0xFF;
39 }
40 
41 static void init_pmic_lcd(void);
42 
43 int exynos_power_init(void)
44 {
45 	int ret;
46 
47 	/*
48 	 * For PMIC the I2C bus is named as I2C5, but it is connected
49 	 * to logical I2C adapter 0
50 	 */
51 	ret = pmic_init(I2C_0);
52 	if (ret)
53 		return ret;
54 
55 	init_pmic_lcd();
56 
57 	return 0;
58 }
59 
60 static unsigned short get_adc_value(int channel)
61 {
62 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
63 	unsigned short ret = 0;
64 	unsigned int reg;
65 	unsigned int loop = 0;
66 
67 	writel(channel & 0xF, &adc->adcmux);
68 	writel((1 << 14) | (49 << 6), &adc->adccon);
69 	writel(1000 & 0xffff, &adc->adcdly);
70 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
71 	udelay(10);
72 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
73 	udelay(10);
74 
75 	do {
76 		udelay(1);
77 		reg = readl(&adc->adccon);
78 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
79 
80 	ret = readl(&adc->adcdat0) & 0xFFF;
81 
82 	return ret;
83 }
84 
85 static int adc_power_control(int on)
86 {
87 	int ret;
88 	struct pmic *p = pmic_get("MAX8998_PMIC");
89 	if (!p)
90 		return -ENODEV;
91 
92 	if (pmic_probe(p))
93 		return -1;
94 
95 	ret = pmic_set_output(p,
96 			      MAX8998_REG_ONOFF1,
97 			      MAX8998_LDO4, !!on);
98 
99 	return ret;
100 }
101 
102 static unsigned int get_hw_revision(void)
103 {
104 	int hwrev, mode0, mode1;
105 
106 	adc_power_control(1);
107 
108 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
109 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
110 
111 	/*
112 	 * XXX Always set the default hwrev as the latest board
113 	 * ADC = (voltage) / 3.3 * 4096
114 	 */
115 	hwrev = 3;
116 
117 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
118 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
119 		hwrev = 0x0;		/* 0.01V	0.01V */
120 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
121 		hwrev = 0x1;		/* 610mV	0.01V */
122 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
123 		hwrev = 0x2;		/* 1.16V	0.01V */
124 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
125 		hwrev = 0x3;		/* 1.79V	0.01V */
126 #undef IS_RANGE
127 
128 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
129 
130 	adc_power_control(0);
131 
132 	return hwrev;
133 }
134 
135 static void check_hw_revision(void)
136 {
137 	int hwrev;
138 
139 	hwrev = get_hw_revision();
140 
141 	board_rev |= hwrev;
142 }
143 
144 #ifdef CONFIG_USB_GADGET
145 static int s5pc210_phy_control(int on)
146 {
147 	int ret = 0;
148 	struct pmic *p = pmic_get("MAX8998_PMIC");
149 	if (!p)
150 		return -ENODEV;
151 
152 	if (pmic_probe(p))
153 		return -1;
154 
155 	if (on) {
156 		ret |= pmic_set_output(p,
157 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
158 				       MAX8998_SAFEOUT1, LDO_ON);
159 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
160 				      MAX8998_LDO3, LDO_ON);
161 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
162 				      MAX8998_LDO8, LDO_ON);
163 
164 	} else {
165 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
166 				      MAX8998_LDO8, LDO_OFF);
167 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
168 				      MAX8998_LDO3, LDO_OFF);
169 		ret |= pmic_set_output(p,
170 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
171 				       MAX8998_SAFEOUT1, LDO_OFF);
172 	}
173 
174 	if (ret) {
175 		puts("MAX8998 LDO setting error!\n");
176 		return -1;
177 	}
178 
179 	return 0;
180 }
181 
182 struct s3c_plat_otg_data s5pc210_otg_data = {
183 	.phy_control = s5pc210_phy_control,
184 	.regs_phy = EXYNOS4_USBPHY_BASE,
185 	.regs_otg = EXYNOS4_USBOTG_BASE,
186 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
187 	.usb_flags = PHY0_SLEEP,
188 };
189 #endif
190 
191 int board_usb_init(int index, enum usb_init_type init)
192 {
193 	debug("USB_udc_probe\n");
194 	return s3c_udc_probe(&s5pc210_otg_data);
195 }
196 
197 int exynos_early_init_f(void)
198 {
199 	wdt_stop();
200 
201 	return 0;
202 }
203 
204 static void init_pmic_lcd(void)
205 {
206 	unsigned char val;
207 	int ret = 0;
208 
209 	struct pmic *p = pmic_get("MAX8998_PMIC");
210 
211 	if (!p)
212 		return;
213 
214 	if (pmic_probe(p))
215 		return;
216 
217 	/* LDO7 1.8V */
218 	val = 0x02; /* (1800 - 1600) / 100; */
219 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
220 
221 	/* LDO17 3.0V */
222 	val = 0xe; /* (3000 - 1600) / 100; */
223 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
224 
225 	/* Disable unneeded regulators */
226 	/*
227 	 * ONOFF1
228 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
229 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
230 	 */
231 	val = 0xB9;
232 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
233 
234 	/* ONOFF2
235 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
236 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
237 	 */
238 	val = 0x50;
239 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
240 
241 	/* ONOFF3
242 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
243 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
244 	 */
245 	val = 0x00;
246 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
247 
248 	if (ret)
249 		puts("LCD pmic initialisation error!\n");
250 }
251 
252 void exynos_cfg_lcd_gpio(void)
253 {
254 	unsigned int i, f3_end = 4;
255 
256 	for (i = 0; i < 8; i++) {
257 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
258 		gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
259 		gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
260 		gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
261 		/* pull-up/down disable */
262 		gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
263 		gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
264 		gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
265 
266 		/* drive strength to max (24bit) */
267 		gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
268 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
269 		gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
270 		gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
271 		gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
272 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
273 	}
274 
275 	for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
276 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
277 		gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
278 		/* pull-up/down disable */
279 		gpio_set_pull(i, S5P_GPIO_PULL_NONE);
280 		/* drive strength to max (24bit) */
281 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
282 		gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
283 	}
284 
285 	/* gpio pad configuration for LCD reset. */
286 	gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
287 	gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
288 }
289 
290 int mipi_power(void)
291 {
292 	return 0;
293 }
294 
295 void exynos_reset_lcd(void)
296 {
297 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
298 	udelay(10000);
299 	gpio_set_value(EXYNOS4_GPIO_Y45, 0);
300 	udelay(10000);
301 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
302 	udelay(100);
303 }
304 
305 void exynos_lcd_power_on(void)
306 {
307 	struct pmic *p = pmic_get("MAX8998_PMIC");
308 
309 	if (!p)
310 		return;
311 
312 	if (pmic_probe(p))
313 		return;
314 
315 	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
316 	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
317 }
318 
319 void exynos_cfg_ldo(void)
320 {
321 	ld9040_cfg_ldo();
322 }
323 
324 void exynos_enable_ldo(unsigned int onoff)
325 {
326 	ld9040_enable_ldo(onoff);
327 }
328 
329 int exynos_init(void)
330 {
331 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
332 
333 	switch (get_hwrev()) {
334 	case 0:
335 		/*
336 		 * Set the low to enable LDO_EN
337 		 * But when you use the test board for eMMC booting
338 		 * you should set it HIGH since it removes the inverter
339 		 */
340 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
341 		gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
342 		gpio_direction_output(EXYNOS4_GPIO_E36, 0);
343 		break;
344 	default:
345 		/*
346 		 * Default reset state is High and there's no inverter
347 		 * But set it as HIGH to ensure
348 		 */
349 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
350 		gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
351 		gpio_direction_output(EXYNOS4_GPIO_E13, 1);
352 		break;
353 	}
354 
355 	check_hw_revision();
356 	printf("HW Revision:\t0x%x\n", board_rev);
357 
358 	return 0;
359 }
360 
361 void exynos_lcd_misc_init(vidinfo_t *vid)
362 {
363 #ifdef CONFIG_TIZEN
364 	get_tizen_logo_info(vid);
365 #endif
366 
367 	/* for LD9040. */
368 	vid->pclk_name = 1;	/* MPLL */
369 	vid->sclk_div = 1;
370 
371 	setenv("lcdinfo", "lcd=ld9040");
372 }
373