xref: /openbmc/u-boot/include/configs/malta.h (revision 86bedaeb)
1 /*
2  * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3  *
4  * SPDX-License-Identifier:	GPL-2.0
5  */
6 
7 #ifndef _MALTA_CONFIG_H
8 #define _MALTA_CONFIG_H
9 
10 #include <asm/addrspace.h>
11 #include <asm/malta.h>
12 
13 /*
14  * System configuration
15  */
16 #define CONFIG_MALTA
17 #define CONFIG_SYS_GENERIC_BOARD
18 #define CONFIG_BOARD_EARLY_INIT_F
19 #define CONFIG_DISPLAY_BOARDINFO
20 
21 #define CONFIG_MEMSIZE_IN_BYTES
22 
23 #define CONFIG_PCI
24 #define CONFIG_PCI_GT64120
25 #define CONFIG_PCI_MSC01
26 #define CONFIG_PCI_PNP
27 #define CONFIG_PCNET
28 #define CONFIG_PCNET_79C973
29 #define PCNET_HAS_PROM
30 
31 #define CONFIG_MISC_INIT_R
32 #define CONFIG_RTC_MC146818
33 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS	0
34 
35 /*
36  * CPU Configuration
37  */
38 #define CONFIG_SYS_MHZ			250	/* arbitrary value */
39 #define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
40 
41 /*
42  * Memory map
43  */
44 #define CONFIG_SYS_TEXT_BASE		0xbe000000 /* Rom version */
45 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
46 
47 #define CONFIG_SYS_SDRAM_BASE		0x80000000 /* Cached addr */
48 #define CONFIG_SYS_MEM_SIZE		(256 * 1024 * 1024)
49 
50 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
51 
52 #define CONFIG_SYS_LOAD_ADDR		0x81000000
53 #define CONFIG_SYS_MEMTEST_START	0x80100000
54 #define CONFIG_SYS_MEMTEST_END		0x80800000
55 
56 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024)
57 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
58 #define CONFIG_SYS_BOOTM_LEN		(64 * 1024 * 1024)
59 
60 /*
61  * Console configuration
62  */
63 #if defined(CONFIG_SYS_LITTLE_ENDIAN)
64 #define CONFIG_SYS_PROMPT		"maltael # "
65 #else
66 #define CONFIG_SYS_PROMPT		"malta # "
67 #endif
68 
69 #define CONFIG_SYS_CBSIZE		256
70 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
71 					 sizeof(CONFIG_SYS_PROMPT) + 16)
72 #define CONFIG_SYS_MAXARGS		16
73 
74 #define CONFIG_SYS_HUSH_PARSER
75 #define CONFIG_AUTO_COMPLETE
76 #define CONFIG_CMDLINE_EDITING
77 
78 /*
79  * Serial driver
80  */
81 #define CONFIG_BAUDRATE			115200
82 
83 #define CONFIG_SYS_NS16550
84 #define CONFIG_SYS_NS16550_SERIAL
85 #define CONFIG_SYS_NS16550_REG_SIZE	1
86 #define CONFIG_SYS_NS16550_CLK		(115200 * 16)
87 #define CONFIG_SYS_NS16550_COM1		CKSEG1ADDR(MALTA_GT_UART0_BASE)
88 #define CONFIG_SYS_NS16550_COM2		CKSEG1ADDR(MALTA_MSC01_UART0_BASE)
89 #define CONFIG_CONS_INDEX		1
90 
91 /*
92  * Flash configuration
93  */
94 #define CONFIG_SYS_FLASH_BASE		(KSEG1 | MALTA_FLASH_BASE)
95 #define CONFIG_SYS_MAX_FLASH_BANKS	1
96 #define CONFIG_SYS_MAX_FLASH_SECT	128
97 #define CONFIG_SYS_FLASH_CFI
98 #define CONFIG_FLASH_CFI_DRIVER
99 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
100 
101 /*
102  * Environment
103  */
104 #define CONFIG_ENV_IS_IN_FLASH
105 #define CONFIG_ENV_SECT_SIZE		0x20000
106 #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
107 #define CONFIG_ENV_ADDR \
108 	(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
109 
110 /*
111  * IDE/ATA
112  */
113 #define CONFIG_SYS_IDE_MAXBUS		1
114 #define CONFIG_SYS_IDE_MAXDEVICE	2
115 #define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_ISA_IO_BASE_ADDRESS
116 #define CONFIG_SYS_ATA_IDE0_OFFSET	0x01f0
117 #define CONFIG_SYS_ATA_DATA_OFFSET	0
118 #define CONFIG_SYS_ATA_REG_OFFSET	0
119 
120 /*
121  * Commands
122  */
123 #include <config_cmd_default.h>
124 
125 #undef CONFIG_CMD_FPGA
126 #undef CONFIG_CMD_LOADB
127 #undef CONFIG_CMD_LOADS
128 #undef CONFIG_CMD_NFS
129 
130 #define CONFIG_CMD_DATE
131 #define CONFIG_CMD_DHCP
132 #define CONFIG_CMD_ELF
133 #define CONFIG_CMD_IDE
134 #define CONFIG_CMD_PCI
135 #define CONFIG_CMD_PING
136 
137 #define CONFIG_SYS_LONGHELP		/* verbose help, undef to save memory */
138 
139 #endif /* _MALTA_CONFIG_H */
140