xref: /openbmc/u-boot/arch/arm/lib/relocate.S (revision b97cd681)
1/*
2 *  relocate - common relocation function for ARM U-Boot
3 *
4 *  Copyright (c) 2013  Albert ARIBAUD <albert.u.boot@aribaud.net>
5 *
6 * SPDX-License-Identifier:	GPL-2.0+
7 */
8
9#include <asm-offsets.h>
10#include <config.h>
11#include <linux/linkage.h>
12
13/*
14 * void relocate_code(addr_moni)
15 *
16 * This function relocates the monitor code.
17 *
18 * NOTE:
19 * To prevent the code below from containing references with an R_ARM_ABS32
20 * relocation record type, we never refer to linker-defined symbols directly.
21 * Instead, we declare literals which contain their relative location with
22 * respect to relocate_code, and at run time, add relocate_code back to them.
23 */
24
25ENTRY(relocate_code)
26	ldr	r1, =__image_copy_start	/* r1 <- SRC &__image_copy_start */
27	subs	r4, r0, r1		/* r4 <- relocation offset */
28	beq	relocate_done		/* skip relocation */
29	ldr	r2, =__image_copy_end	/* r2 <- SRC &__image_copy_end */
30
31copy_loop:
32	ldmia	r1!, {r10-r11}		/* copy from source address [r1]    */
33	stmia	r0!, {r10-r11}		/* copy to   target address [r0]    */
34	cmp	r1, r2			/* until source end address [r2]    */
35	blo	copy_loop
36
37	/*
38	 * fix .rel.dyn relocations
39	 */
40	ldr	r2, =__rel_dyn_start	/* r2 <- SRC &__rel_dyn_start */
41	ldr	r3, =__rel_dyn_end	/* r3 <- SRC &__rel_dyn_end */
42fixloop:
43	ldmia	r2!, {r0-r1}		/* (r0,r1) <- (SRC location,fixup) */
44	and	r1, r1, #0xff
45	cmp	r1, #23			/* relative fixup? */
46	bne	fixnext
47
48	/* relative fix: increase location by offset */
49	add	r0, r0, r4
50	ldr	r1, [r0]
51	add	r1, r1, r4
52	str	r1, [r0]
53fixnext:
54	cmp	r2, r3
55	blo	fixloop
56
57	/*
58	 * Relocate the exception vectors
59	 */
60#ifdef CONFIG_HAS_VBAR
61	/*
62	 * If the ARM processor has the security extensions,
63	 * use VBAR to relocate the exception vectors.
64	 */
65	ldr	r0, [r9, #GD_RELOCADDR]	/* r0 = gd->relocaddr */
66	mcr     p15, 0, r0, c12, c0, 0  /* Set VBAR */
67#else
68	/*
69	 * Copy the relocated exception vectors to the
70	 * correct address
71	 * CP15 c1 V bit gives us the location of the vectors:
72	 * 0x00000000 or 0xFFFF0000.
73	 */
74	ldr	r0, [r9, #GD_RELOCADDR]	/* r0 = gd->relocaddr */
75	mrc	p15, 0, r2, c1, c0, 0	/* V bit (bit[13]) in CP15 c1 */
76	ands	r2, r2, #(1 << 13)
77	ldreq	r1, =0x00000000 	/* If V=0 */
78	ldrne	r1, =0xFFFF0000 	/* If V=1 */
79	ldmia	r0!, {r2-r8,r10}
80	stmia	r1!, {r2-r8,r10}
81	ldmia	r0!, {r2-r8,r10}
82	stmia	r1!, {r2-r8,r10}
83#endif
84
85relocate_done:
86
87#ifdef __XSCALE__
88	/*
89	 * On xscale, icache must be invalidated and write buffers drained,
90	 * even with cache disabled - 4.2.7 of xscale core developer's manual
91	 */
92	mcr	p15, 0, r0, c7, c7, 0	/* invalidate icache */
93	mcr	p15, 0, r0, c7, c10, 4	/* drain write buffer */
94#endif
95
96	/* ARMv4- don't know bx lr but the assembler fails to see that */
97
98#ifdef __ARM_ARCH_4__
99	mov        pc, lr
100#else
101	bx        lr
102#endif
103
104ENDPROC(relocate_code)
105