1/dts-v1/; 2 3/ { 4 #address-cells = <1>; 5 #size-cells = <0>; 6 7 chosen { 8 stdout-path = "/serial"; 9 }; 10 11 /* Needs to be available prior to relocation */ 12 uart0: serial { 13 compatible = "sandbox,serial"; 14 sandbox,text-colour = "cyan"; 15 }; 16 17 triangle { 18 compatible = "demo-shape"; 19 colour = "cyan"; 20 sides = <3>; 21 character = <83>; 22 light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; 23 }; 24 square { 25 compatible = "demo-shape"; 26 colour = "blue"; 27 sides = <4>; 28 }; 29 hexagon { 30 compatible = "demo-simple"; 31 colour = "white"; 32 sides = <6>; 33 }; 34 35 host@0 { 36 #address-cells = <1>; 37 #size-cells = <0>; 38 compatible = "sandbox,host-emulation"; 39 cros-ec@0 { 40 reg = <0>; 41 compatible = "google,cros-ec"; 42 43 /* 44 * This describes the flash memory within the EC. Note 45 * that the STM32L flash erases to 0, not 0xff. 46 */ 47 #address-cells = <1>; 48 #size-cells = <1>; 49 flash@8000000 { 50 reg = <0x08000000 0x20000>; 51 erase-value = <0>; 52 #address-cells = <1>; 53 #size-cells = <1>; 54 55 /* Information for sandbox */ 56 ro { 57 reg = <0 0xf000>; 58 }; 59 wp-ro { 60 reg = <0xf000 0x1000>; 61 }; 62 rw { 63 reg = <0x10000 0x10000>; 64 }; 65 }; 66 }; 67 }; 68 69 lcd { 70 compatible = "sandbox,lcd-sdl"; 71 xres = <800>; 72 yres = <600>; 73 }; 74 75 cros-ec-keyb { 76 compatible = "google,cros-ec-keyb"; 77 keypad,num-rows = <8>; 78 keypad,num-columns = <13>; 79 google,ghost-filter; 80 /* 81 * Keymap entries take the form of 0xRRCCKKKK where 82 * RR=Row CC=Column KKKK=Key Code 83 * The values below are for a US keyboard layout and 84 * are taken from the Linux driver. Note that the 85 * 102ND key is not used for US keyboards. 86 */ 87 linux,keymap = < 88 /* CAPSLCK F1 B F10 */ 89 0x0001003a 0x0002003b 0x00030030 0x00040044 90 /* N = R_ALT ESC */ 91 0x00060031 0x0008000d 0x000a0064 0x01010001 92 /* F4 G F7 H */ 93 0x0102003e 0x01030022 0x01040041 0x01060023 94 /* ' F9 BKSPACE L_CTRL */ 95 0x01080028 0x01090043 0x010b000e 0x0200001d 96 /* TAB F3 T F6 */ 97 0x0201000f 0x0202003d 0x02030014 0x02040040 98 /* ] Y 102ND [ */ 99 0x0205001b 0x02060015 0x02070056 0x0208001a 100 /* F8 GRAVE F2 5 */ 101 0x02090042 0x03010029 0x0302003c 0x03030006 102 /* F5 6 - \ */ 103 0x0304003f 0x03060007 0x0308000c 0x030b002b 104 /* R_CTRL A D F */ 105 0x04000061 0x0401001e 0x04020020 0x04030021 106 /* S K J ; */ 107 0x0404001f 0x04050025 0x04060024 0x04080027 108 /* L ENTER Z C */ 109 0x04090026 0x040b001c 0x0501002c 0x0502002e 110 /* V X , M */ 111 0x0503002f 0x0504002d 0x05050033 0x05060032 112 /* L_SHIFT / . SPACE */ 113 0x0507002a 0x05080035 0x05090034 0x050B0039 114 /* 1 3 4 2 */ 115 0x06010002 0x06020004 0x06030005 0x06040003 116 /* 8 7 0 9 */ 117 0x06050009 0x06060008 0x0608000b 0x0609000a 118 /* L_ALT DOWN RIGHT Q */ 119 0x060a0038 0x060b006c 0x060c006a 0x07010010 120 /* E R W I */ 121 0x07020012 0x07030013 0x07040011 0x07050017 122 /* U R_SHIFT P O */ 123 0x07060016 0x07070036 0x07080019 0x07090018 124 /* UP LEFT */ 125 0x070b0067 0x070c0069>; 126 }; 127 128 gpio_a: gpios@0 { 129 gpio-controller; 130 compatible = "sandbox,gpio"; 131 #gpio-cells = <1>; 132 gpio-bank-name = "a"; 133 num-gpios = <20>; 134 }; 135 136 gpio_b: gpios@1 { 137 gpio-controller; 138 compatible = "sandbox,gpio"; 139 #gpio-cells = <2>; 140 gpio-bank-name = "b"; 141 num-gpios = <10>; 142 }; 143 144 i2c@0 { 145 #address-cells = <1>; 146 #size-cells = <0>; 147 reg = <0>; 148 compatible = "sandbox,i2c"; 149 clock-frequency = <400000>; 150 eeprom@2c { 151 reg = <0x2c>; 152 compatible = "i2c-eeprom"; 153 emul { 154 compatible = "sandbox,i2c-eeprom"; 155 sandbox,filename = "i2c.bin"; 156 sandbox,size = <128>; 157 }; 158 }; 159 }; 160 161 spi@0 { 162 #address-cells = <1>; 163 #size-cells = <0>; 164 reg = <0>; 165 compatible = "sandbox,spi"; 166 cs-gpios = <0>, <&gpio_a 0>; 167 flash@0 { 168 reg = <0>; 169 compatible = "spansion,m25p16", "sandbox,spi-flash"; 170 spi-max-frequency = <40000000>; 171 sandbox,filename = "spi.bin"; 172 }; 173 }; 174 175 cros-ec@0 { 176 compatible = "google,cros-ec"; 177 #address-cells = <1>; 178 #size-cells = <1>; 179 firmware_storage_spi: flash@0 { 180 reg = <0 0x400000>; 181 }; 182 }; 183 184}; 185