1 /* 2 * (C) Copyright 2014 3 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 4 * 5 * Based on: 6 * Copyright (C) 2012 Freescale Semiconductor, Inc. 7 * 8 * Configuration settings for the Freescale i.MX6Q SabreSD board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 #ifndef __ARISTAINETOS_CONFIG_H 13 #define __ARISTAINETOS_CONFIG_H 14 15 #define CONFIG_MX6 16 17 #include "mx6_common.h" 18 #include <linux/sizes.h> 19 20 #define CONFIG_DISPLAY_CPUINFO 21 #define CONFIG_DISPLAY_BOARDINFO 22 23 #include <asm/arch/imx-regs.h> 24 #include <asm/imx-common/gpio.h> 25 26 #define CONFIG_MACH_TYPE 4501 27 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 28 #define CONFIG_DEFAULT_FDT_FILE "aristainetos.dtb" 29 #define CONFIG_HOSTNAME aristainetos 30 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 31 32 #define CONFIG_SYS_GENERIC_BOARD 33 34 /* Size of malloc() pool */ 35 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) 36 37 #define CONFIG_BOARD_EARLY_INIT_F 38 #define CONFIG_MXC_GPIO 39 40 #define CONFIG_MXC_UART 41 #define CONFIG_MXC_UART_BASE UART5_BASE 42 #define CONFIG_CONSOLE_DEV "ttymxc4" 43 44 #define CONFIG_CMD_FUSE 45 #define CONFIG_MXC_OCOTP 46 47 /* MMC Configs */ 48 #define CONFIG_FSL_ESDHC 49 #define CONFIG_FSL_USDHC 50 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 51 52 #define CONFIG_MMC 53 #define CONFIG_CMD_MMC 54 #define CONFIG_GENERIC_MMC 55 #define CONFIG_BOUNCE_BUFFER 56 #define CONFIG_CMD_EXT2 57 #define CONFIG_CMD_FAT 58 #define CONFIG_DOS_PARTITION 59 60 #define CONFIG_CMD_PING 61 #define CONFIG_CMD_DHCP 62 #define CONFIG_CMD_MII 63 #define CONFIG_CMD_NET 64 #define CONFIG_FEC_MXC 65 #define CONFIG_MII 66 #define IMX_FEC_BASE ENET_BASE_ADDR 67 #define CONFIG_FEC_XCV_TYPE RMII 68 #define CONFIG_ETHPRIME "FEC" 69 #define CONFIG_FEC_MXC_PHYADDR 0 70 71 #define CONFIG_PHYLIB 72 #define CONFIG_PHY_MICREL 73 74 #define CONFIG_CMD_SF 75 #define CONFIG_SPI_FLASH 76 #define CONFIG_SPI_FLASH_MTD 77 #define CONFIG_SPI_FLASH_STMICRO 78 #define CONFIG_MXC_SPI 79 #define CONFIG_SF_DEFAULT_BUS 3 80 #define CONFIG_SF_DEFAULT_CS 0 81 #define CONFIG_SF_DEFAULT_SPEED 20000000 82 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 83 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 84 85 /* allow to overwrite serial and ethaddr */ 86 #define CONFIG_ENV_OVERWRITE 87 #define CONFIG_CONS_INDEX 1 88 #define CONFIG_BAUDRATE 115200 89 90 /* Command definition */ 91 #include <config_cmd_default.h> 92 93 #define CONFIG_CMD_BMODE 94 #define CONFIG_CMD_BOOTZ 95 #define CONFIG_CMD_SETEXPR 96 #undef CONFIG_CMD_IMLS 97 98 #define CONFIG_BOOTDELAY 3 99 100 #define CONFIG_LOADADDR 0x12000000 101 #define CONFIG_SYS_TEXT_BASE 0x17800000 102 103 #define CONFIG_EXTRA_ENV_SETTINGS \ 104 "uimage=uImage\0" \ 105 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 106 "fdt_addr_r=0x11000000\0" \ 107 "kernel_addr_r=0x12000000\0" \ 108 "kernel_file=uImage\0" \ 109 "boot_fdt=try\0" \ 110 "ip_dyn=yes\0" \ 111 "console=" CONFIG_CONSOLE_DEV "\0" \ 112 "fdt_high=0xffffffff\0" \ 113 "initrd_high=0xffffffff\0" \ 114 "mmcpart=1\0" \ 115 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 116 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 117 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 118 "root=${mmcroot}\0" \ 119 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} " \ 120 "${uimage}\0" \ 121 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} " \ 122 "${fdt_file}\0" \ 123 "mmcboot=echo Booting from mmc ...; " \ 124 "run mmcargs;run loadimage loadfdt fdt_setup;" \ 125 "bootm ${kernel_addr_r} - ${fdt_addr_r};\0" \ 126 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-sato-sdk\0" \ 127 "nfsopts=nfsvers=3 nolock rw\0" \ 128 "netdev=eth0\0" \ 129 "fdt_setup=fdt addr ${fdt_addr_r};fdt resize;fdt chosen;fdt board\0"\ 130 "load_fdt=tftp ${fdt_addr_r} ${fdt_file}\0" \ 131 "load_kernel=tftp ${kernel_addr_r} ${kernel_file}\0" \ 132 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 133 "get_env=mw ${loadaddr} 0x00000000 0x20000;" \ 134 "tftp ${loadaddr} /tftpboot/aristainetos/env.txt;" \ 135 "env import -t ${loadaddr}\0" \ 136 "addmisc=setenv bootargs ${bootargs} maxcpus=1 loglevel=8\0" \ 137 "bootargs_defaults=setenv bootargs ${console} ${mtdoops} " \ 138 "${optargs}\0" \ 139 "net_args=run bootargs_defaults;setenv bootargs ${bootargs} " \ 140 "root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} " \ 141 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ 142 "${hostname}:${netdev}:off\0" \ 143 "net_nfs=run load_kernel load_fdt;run net_args addmtd addmisc;" \ 144 "run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ 145 "uboot=/tftpboot/aristainetos/u-boot.imx\0" \ 146 "load_uboot=tftp ${loadaddr} ${uboot}\0" \ 147 "uboot_sz=c0000\0" \ 148 "upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \ 149 "mw.b 10200000 0x00 ${uboot_sz};" \ 150 "run load_uboot;sf probe;sf erase 0 ${uboot_sz};" \ 151 "sf write ${loadaddr} 400 ${filesize};" \ 152 "sf read 10200000 400 ${uboot_sz};" \ 153 "cmp.b ${loadaddr} 10200000 bc000\0" \ 154 "ubi_prep=ubi part ubi 2048;ubifsmount ubi:kernel\0" \ 155 "load_kernel_ubi=ubifsload ${kernel_addr_r} uImage\0" \ 156 "load_fdt_ubi=ubifsload ${fdt_addr_r} aristainetos.dtb\0" \ 157 "ubi_nfs=run ubiprep load_kernel_ubi load_fdt_ubi;" \ 158 "run net_args addmtd addmisc;run fdt_setup;" \ 159 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ 160 "rootfsname=rootfs\0" \ 161 "ubi_args=run bootargs_defaults;setenv bootargs ${bootargs} " \ 162 "ubi.mtd=0,2048 root=ubi0:${rootfsname} rootfstype=ubifs " \ 163 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ 164 "${hostname}:${netdev}:off\0" \ 165 "ubi_ubi=run ubi_prep load_kernel_ubi load_fdt_ubi;" \ 166 "run bootargs_defaults ubi_args addmtd addmisc;" \ 167 "run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ 168 "ubirootfs_file=/tftpboot/aristainetos/rootfs-minimal.ubifs\0" \ 169 "upd_ubirootfs=run ubi_prep;tftp ${loadaddr} ${ubirootfs_file};" \ 170 "ubi write ${loadaddr} rootfs ${filesize}\0" \ 171 "ksz=800000\0" \ 172 "rootsz=2000000\0" \ 173 "usersz=8000000\0" \ 174 "ubi_make=run ubi_prep;ubi create kernel ${ksz};" \ 175 "ubi create rootfs ${rootsz};ubi create userfs ${usersz}\0" 176 177 #define CONFIG_BOOTCOMMAND \ 178 "mmc dev ${mmcdev};" \ 179 "if mmc rescan; then " \ 180 "run mmcboot;" \ 181 "else run ubi_ubi; fi" 182 183 #define CONFIG_ARP_TIMEOUT 200UL 184 185 /* Miscellaneous configurable options */ 186 #define CONFIG_SYS_LONGHELP 187 #define CONFIG_SYS_HUSH_PARSER 188 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 189 #define CONFIG_AUTO_COMPLETE 190 #define CONFIG_SYS_CBSIZE 256 191 192 /* Print Buffer Size */ 193 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 194 #define CONFIG_SYS_MAXARGS 16 195 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 196 197 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 198 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 199 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 200 201 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 202 203 #define CONFIG_CMDLINE_EDITING 204 #define CONFIG_STACKSIZE (128 * 1024) 205 206 /* Physical Memory Map */ 207 #define CONFIG_NR_DRAM_BANKS 1 208 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 209 210 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 211 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 212 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 213 214 #define CONFIG_SYS_INIT_SP_OFFSET \ 215 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 216 #define CONFIG_SYS_INIT_SP_ADDR \ 217 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 218 219 /* FLASH and environment organization */ 220 #define CONFIG_SYS_NO_FLASH 221 222 #define CONFIG_ENV_SIZE (12 * 1024) 223 #define CONFIG_ENV_IS_IN_SPI_FLASH 224 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 225 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 226 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 227 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 228 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 229 #define CONFIG_ENV_SECT_SIZE (0x010000) 230 #define CONFIG_ENV_OFFSET (0x0c0000) 231 #define CONFIG_ENV_OFFSET_REDUND (0x0d0000) 232 233 #define CONFIG_OF_LIBFDT 234 235 #define CONFIG_CMD_CACHE 236 237 #define CONFIG_SYS_FSL_USDHC_NUM 2 238 239 #define CONFIG_CMD_I2C 240 #define CONFIG_SYS_I2C 241 #define CONFIG_SYS_I2C_MXC 242 #define CONFIG_SYS_I2C_SPEED 100000 243 #define CONFIG_SYS_I2C_SLAVE 0x7f 244 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} } 245 246 #define CONFIG_CMD_GPIO 247 #define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) 248 249 /* NAND stuff */ 250 #define CONFIG_CMD_NAND 251 #define CONFIG_CMD_NAND_TRIMFFS 252 #define CONFIG_NAND_MXS 253 #define CONFIG_SYS_MAX_NAND_DEVICE 1 254 #define CONFIG_SYS_NAND_BASE 0x40000000 255 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 256 #define CONFIG_SYS_NAND_ONFI_DETECTION 257 258 /* DMA stuff, needed for GPMI/MXS NAND support */ 259 #define CONFIG_APBH_DMA 260 #define CONFIG_APBH_DMA_BURST 261 #define CONFIG_APBH_DMA_BURST8 262 263 /* RTC */ 264 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 265 #define CONFIG_SYS_RTC_BUS_NUM 2 266 #define CONFIG_RTC_M41T11 267 #define CONFIG_CMD_DATE 268 269 /* USB Configs */ 270 #define CONFIG_CMD_USB 271 #define CONFIG_CMD_FAT 272 #define CONFIG_USB_EHCI 273 #define CONFIG_USB_EHCI_MX6 274 #define CONFIG_USB_STORAGE 275 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 276 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 277 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 278 #define CONFIG_MXC_USB_FLAGS 0 279 280 #define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) 281 #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31) 282 283 /* UBI support */ 284 #define CONFIG_CMD_MTDPARTS 285 #define CONFIG_MTD_PARTITIONS 286 #define CONFIG_MTD_DEVICE 287 #define CONFIG_RBTREE 288 #define CONFIG_LZO 289 #define CONFIG_CMD_UBI 290 #define CONFIG_CMD_UBIFS 291 292 #define MTDIDS_DEFAULT "nand0=gpmi-nand" 293 #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:-(ubi)" 294 295 #define CONFIG_MTD_UBI_FASTMAP 296 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1 297 298 #define CONFIG_HW_WATCHDOG 299 #define CONFIG_IMX_WATCHDOG 300 301 #define CONFIG_FIT 302 303 /* Framebuffer */ 304 #define CONFIG_VIDEO 305 #define CONFIG_VIDEO_IPUV3 306 /* check this console not needed, after test remove it */ 307 #define CONFIG_CFB_CONSOLE 308 #define CONFIG_VGA_AS_SINGLE_DEVICE 309 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 310 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 311 #define CONFIG_VIDEO_BMP_RLE8 312 #define CONFIG_SPLASH_SCREEN 313 #define CONFIG_SPLASH_SCREEN_ALIGN 314 #define CONFIG_BMP_16BPP 315 #define CONFIG_VIDEO_LOGO 316 #define CONFIG_VIDEO_BMP_LOGO 317 #define CONFIG_IPUV3_CLK 198000000 318 #define CONFIG_IMX_VIDEO_SKIP 319 320 #define CONFIG_CMD_BMP 321 322 #define CONFIG_PWM_IMX 323 #define CONFIG_IMX6_PWM_PER_CLK 66000000 324 325 #endif /* __ARISTAINETOS_CONFIG_H */ 326