1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7790 16 #define CONFIG_RMOBILE_BOARD_STRING "Lager" 17 #define CONFIG_SH_GPIO_PFC 18 19 #include <asm/arch/rmobile.h> 20 21 #define CONFIG_CMD_EDITENV 22 #define CONFIG_CMD_SAVEENV 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_DFL 25 #define CONFIG_CMD_SDRAM 26 #define CONFIG_CMD_RUN 27 #define CONFIG_CMD_LOADS 28 #define CONFIG_CMD_NET 29 #define CONFIG_CMD_MII 30 #define CONFIG_CMD_PING 31 #define CONFIG_CMD_DHCP 32 #define CONFIG_CMD_NFS 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_CMD_USB 35 #define CONFIG_CMD_FAT 36 #define CONFIG_CMD_SF 37 #define CONFIG_CMD_SPI 38 39 #define CONFIG_FAT_WRITE 40 #define CONFIG_EXT4_WRITE 41 42 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 43 #define CONFIG_SYS_TEXT_BASE 0xB0000000 44 #else 45 #define CONFIG_SYS_TEXT_BASE 0xE8080000 46 #endif 47 #define CONFIG_SYS_THUMB_BUILD 48 #define CONFIG_SYS_GENERIC_BOARD 49 50 /* Support File sytems */ 51 #define CONFIG_DOS_PARTITION 52 #define CONFIG_SUPPORT_VFAT 53 54 #define CONFIG_CMDLINE_TAG 55 #define CONFIG_SETUP_MEMORY_TAGS 56 #define CONFIG_INITRD_TAG 57 #define CONFIG_CMDLINE_EDITING 58 #define CONFIG_OF_LIBFDT 59 60 /* #define CONFIG_OF_LIBFDT */ 61 #define BOARD_LATE_INIT 62 63 #define CONFIG_BAUDRATE 38400 64 #define CONFIG_BOOTDELAY 3 65 #define CONFIG_BOOTARGS "" 66 67 #define CONFIG_VERSION_VARIABLE 68 #undef CONFIG_SHOW_BOOT_PROGRESS 69 70 #define CONFIG_ARCH_CPU_INIT 71 #define CONFIG_DISPLAY_CPUINFO 72 #define CONFIG_DISPLAY_BOARDINFO 73 #define CONFIG_BOARD_EARLY_INIT_F 74 #define CONFIG_TMU_TIMER 75 76 /* STACK */ 77 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 78 #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 79 #else 80 #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 81 #endif 82 #define STACK_AREA_SIZE 0xC000 83 #define LOW_LEVEL_MERAM_STACK \ 84 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 85 86 /* MEMORY */ 87 #define LAGER_SDRAM_BASE 0x40000000 88 #define LAGER_SDRAM_SIZE (2048u * 1024 * 1024) 89 #define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 90 91 #define CONFIG_SYS_LONGHELP 92 #define CONFIG_SYS_CBSIZE 256 93 #define CONFIG_SYS_PBSIZE 256 94 #define CONFIG_SYS_MAXARGS 16 95 #define CONFIG_SYS_BARGSIZE 512 96 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 97 98 /* SCIF */ 99 #define CONFIG_SCIF_CONSOLE 100 #define CONFIG_CONS_SCIF0 101 #define CONFIG_SCIF_USE_EXT_CLK 102 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 103 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 104 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 105 106 #define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE) 107 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 108 504 * 1024 * 1024) 109 #undef CONFIG_SYS_ALT_MEMTEST 110 #undef CONFIG_SYS_MEMTEST_SCRATCH 111 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 112 113 #define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE) 114 #define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE) 115 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 116 #define CONFIG_NR_DRAM_BANKS 1 117 118 #define CONFIG_SYS_MONITOR_BASE 0x00000000 119 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 120 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 121 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 122 123 /* USE SPI */ 124 #define CONFIG_SPI 125 #define CONFIG_SPI_FLASH_BAR 126 #define CONFIG_SH_QSPI 127 #define CONFIG_SPI_FLASH 128 #define CONFIG_SPI_FLASH_SPANSION 129 #define CONFIG_SYS_NO_FLASH 130 131 /* ENV setting */ 132 #define CONFIG_ENV_IS_IN_SPI_FLASH 133 #define CONFIG_ENV_ADDR 0xC0000 134 135 /* Common ENV setting */ 136 #define CONFIG_ENV_OVERWRITE 137 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 138 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 139 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 140 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 141 142 /* SH Ether */ 143 #define CONFIG_NET_MULTI 144 #define CONFIG_SH_ETHER 145 #define CONFIG_SH_ETHER_USE_PORT 0 146 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 147 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 148 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 149 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 150 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 151 #define CONFIG_PHYLIB 152 #define CONFIG_PHY_MICREL 153 #define CONFIG_BITBANGMII 154 #define CONFIG_BITBANGMII_MULTI 155 156 /* I2C */ 157 #define CONFIG_SYS_I2C 158 #define CONFIG_SYS_I2C_RCAR 159 #define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000 160 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 161 #define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000 162 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 163 #define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000 164 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 165 #define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000 166 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 167 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 168 169 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 170 171 /* Board Clock */ 172 #define RMOBILE_XTAL_CLK 20000000u 173 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 174 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 175 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 176 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 177 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 178 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 179 #define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ 180 181 #define CONFIG_SYS_TMU_CLK_DIV 4 182 183 /* USB */ 184 #define CONFIG_USB_EHCI 185 #define CONFIG_USB_EHCI_RMOBILE 186 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 187 #define CONFIG_USB_STORAGE 188 189 #endif /* __LAGER_H */ 190