1 /* 2 * Board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright Siemens AG 4 * 5 * Based on: 6 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #include <common.h> 16 #include <asm/io.h> 17 #include <asm/arch/at91sam9260_matrix.h> 18 #include <asm/arch/at91sam9_smc.h> 19 #include <asm/arch/at91_common.h> 20 #include <asm/arch/at91_pmc.h> 21 #include <asm/arch/at91_rstc.h> 22 #include <asm/arch/gpio.h> 23 #include <asm/arch/at91sam9_sdramc.h> 24 #include <asm/arch/clk.h> 25 #include <linux/mtd/nand.h> 26 #include <atmel_mci.h> 27 #include <asm/arch/at91_spi.h> 28 #include <spi.h> 29 30 #include <net.h> 31 #include <netdev.h> 32 33 DECLARE_GLOBAL_DATA_PTR; 34 35 static void taurus_nand_hw_init(void) 36 { 37 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 38 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 39 unsigned long csa; 40 41 /* Assign CS3 to NAND/SmartMedia Interface */ 42 csa = readl(&matrix->ebicsa); 43 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; 44 writel(csa, &matrix->ebicsa); 45 46 /* Configure SMC CS3 for NAND/SmartMedia */ 47 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | 48 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), 49 &smc->cs[3].setup); 50 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | 51 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3), 52 &smc->cs[3].pulse); 53 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), 54 &smc->cs[3].cycle); 55 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 56 AT91_SMC_MODE_EXNW_DISABLE | 57 AT91_SMC_MODE_DBW_8 | 58 AT91_SMC_MODE_TDF_CYCLE(3), 59 &smc->cs[3].mode); 60 61 /* Configure RDY/BSY */ 62 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); 63 64 /* Enable NandFlash */ 65 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 66 } 67 68 #if defined(CONFIG_SPL_BUILD) 69 #include <spl.h> 70 #include <nand.h> 71 72 void matrix_init(void) 73 { 74 struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; 75 76 writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE)) 77 | AT91_MATRIX_SLOT_CYCLE_(0x40), 78 &mat->scfg[3]); 79 } 80 81 void at91_spl_board_init(void) 82 { 83 taurus_nand_hw_init(); 84 85 /* Configure recovery button PINs */ 86 at91_set_gpio_input(AT91_PIN_PA31, 1); 87 88 /* check if button is pressed */ 89 if (at91_get_gpio_value(AT91_PIN_PA31) == 0) { 90 u32 boot_device; 91 92 debug("Recovery button pressed\n"); 93 boot_device = spl_boot_device(); 94 switch (boot_device) { 95 #ifdef CONFIG_SPL_NAND_SUPPORT 96 case BOOT_DEVICE_NAND: 97 nand_init(); 98 spl_nand_erase_one(0, 0); 99 break; 100 #endif 101 } 102 } 103 } 104 105 void mem_init(void) 106 { 107 struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX; 108 struct sdramc_reg setting; 109 110 at91_sdram_hw_init(); 111 setting.cr = (AT91_SDRAMC_NC_9 | 112 AT91_SDRAMC_NR_13 | 113 AT91_SDRAMC_CAS_3 | 114 AT91_SDRAMC_NB_4 | 115 AT91_SDRAMC_DBW_32 | 116 AT91_SDRAMC_TWR_VAL(3) | 117 AT91_SDRAMC_TRC_VAL(9) | 118 AT91_SDRAMC_TRP_VAL(3) | 119 AT91_SDRAMC_TRCD_VAL(3) | 120 AT91_SDRAMC_TRAS_VAL(6) | 121 AT91_SDRAMC_TXSR_VAL(10)); 122 setting.mdr = AT91_SDRAMC_MD_SDRAM; 123 setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; 124 125 126 writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC | 127 AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL, 128 &ma->ebicsa); 129 sdramc_initialize(ATMEL_BASE_CS1, &setting); 130 } 131 #endif 132 133 #ifdef CONFIG_MACB 134 static void taurus_macb_hw_init(void) 135 { 136 /* Enable EMAC clock */ 137 at91_periph_clk_enable(ATMEL_ID_EMAC0); 138 139 /* 140 * Disable pull-up on: 141 * RXDV (PA17) => PHY normal mode (not Test mode) 142 * ERX0 (PA14) => PHY ADDR0 143 * ERX1 (PA15) => PHY ADDR1 144 * ERX2 (PA25) => PHY ADDR2 145 * ERX3 (PA26) => PHY ADDR3 146 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 147 * 148 * PHY has internal pull-down 149 */ 150 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0); 151 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); 152 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0); 153 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0); 154 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0); 155 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0); 156 157 at91_phy_reset(); 158 159 at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */ 160 161 /* Re-enable pull-up */ 162 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1); 163 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); 164 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1); 165 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1); 166 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1); 167 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1); 168 169 /* Initialize EMAC=MACB hardware */ 170 at91_macb_hw_init(); 171 } 172 #endif 173 174 #ifdef CONFIG_GENERIC_ATMEL_MCI 175 int board_mmc_init(bd_t *bd) 176 { 177 at91_mci_hw_init(); 178 179 return atmel_mci_init((void *)ATMEL_BASE_MCI); 180 } 181 #endif 182 183 int board_early_init_f(void) 184 { 185 /* Enable clocks for all PIOs */ 186 at91_periph_clk_enable(ATMEL_ID_PIOA); 187 at91_periph_clk_enable(ATMEL_ID_PIOB); 188 at91_periph_clk_enable(ATMEL_ID_PIOC); 189 190 at91_seriald_hw_init(); 191 192 return 0; 193 } 194 195 int spi_cs_is_valid(unsigned int bus, unsigned int cs) 196 { 197 return bus == 0 && cs == 0; 198 } 199 200 void spi_cs_activate(struct spi_slave *slave) 201 { 202 at91_set_gpio_value(TAURUS_SPI_CS_PIN, 0); 203 } 204 205 void spi_cs_deactivate(struct spi_slave *slave) 206 { 207 at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1); 208 } 209 210 int board_init(void) 211 { 212 /* adress of boot parameters */ 213 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 214 215 #ifdef CONFIG_CMD_NAND 216 taurus_nand_hw_init(); 217 #endif 218 #ifdef CONFIG_MACB 219 taurus_macb_hw_init(); 220 #endif 221 at91_spi0_hw_init(TAURUS_SPI_MASK); 222 223 return 0; 224 } 225 226 int dram_init(void) 227 { 228 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 229 CONFIG_SYS_SDRAM_SIZE); 230 return 0; 231 } 232 233 int board_eth_init(bd_t *bis) 234 { 235 int rc = 0; 236 #ifdef CONFIG_MACB 237 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); 238 #endif 239 return rc; 240 } 241