xref: /openbmc/u-boot/include/configs/sh7752evb.h (revision c35f8693)
1 /*
2  * Configuation settings for the sh7752evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7752EVB_H
10 #define __SH7752EVB_H
11 
12 #undef DEBUG
13 #define CONFIG_CPU_SH7752	1
14 #define CONFIG_SH7752EVB	1
15 
16 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
17 #define CONFIG_SYS_LDSCRIPT	"board/renesas/sh7752evb/u-boot.lds"
18 
19 #define CONFIG_CMD_MEMORY
20 #define CONFIG_CMD_NET
21 #define CONFIG_CMD_MII
22 #define CONFIG_CMD_PING
23 #define CONFIG_CMD_NFS
24 #define CONFIG_CMD_DFL
25 #define CONFIG_CMD_SDRAM
26 #define CONFIG_CMD_SF
27 #define CONFIG_CMD_RUN
28 #define CONFIG_CMD_SAVEENV
29 #define CONFIG_CMD_MD5SUM
30 #define CONFIG_MD5
31 #define CONFIG_CMD_LOADS
32 #define CONFIG_CMD_MMC
33 #define CONFIG_CMD_EXT2
34 #define CONFIG_DOS_PARTITION
35 #define CONFIG_MAC_PARTITION
36 
37 #define CONFIG_BAUDRATE		115200
38 #define CONFIG_BOOTDELAY	3
39 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
40 
41 #define CONFIG_VERSION_VARIABLE
42 #undef	CONFIG_SHOW_BOOT_PROGRESS
43 #define CONFIG_CMDLINE_EDITING
44 #define CONFIG_AUTO_COMPLETE
45 
46 /* MEMORY */
47 #define SH7752EVB_SDRAM_BASE		(0x40000000)
48 #define SH7752EVB_SDRAM_SIZE		(512 * 1024 * 1024)
49 
50 #define CONFIG_SYS_LONGHELP
51 #define CONFIG_SYS_CBSIZE		256
52 #define CONFIG_SYS_PBSIZE		256
53 #define CONFIG_SYS_MAXARGS		16
54 #define CONFIG_SYS_BARGSIZE		512
55 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
56 
57 /* SCIF */
58 #define CONFIG_SCIF_CONSOLE	1
59 #define CONFIG_CONS_SCIF2	1
60 #undef	CONFIG_SYS_CONSOLE_INFO_QUIET
61 #undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
62 #undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
63 
64 #define CONFIG_SYS_MEMTEST_START	(SH7752EVB_SDRAM_BASE)
65 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
66 					 480 * 1024 * 1024)
67 #undef	CONFIG_SYS_ALT_MEMTEST
68 #undef	CONFIG_SYS_MEMTEST_SCRATCH
69 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
70 
71 #define CONFIG_SYS_SDRAM_BASE		(SH7752EVB_SDRAM_BASE)
72 #define CONFIG_SYS_SDRAM_SIZE		(SH7752EVB_SDRAM_SIZE)
73 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
74 					 128 * 1024 * 1024)
75 
76 #define CONFIG_SYS_MONITOR_BASE		0x00000000
77 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
78 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
79 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
80 
81 /* FLASH */
82 #define CONFIG_SYS_NO_FLASH
83 
84 /* Ether */
85 #define CONFIG_SH_ETHER			1
86 #define CONFIG_SH_ETHER_USE_PORT	0
87 #define CONFIG_SH_ETHER_PHY_ADDR	18
88 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
89 #define CONFIG_SH_ETHER_USE_GETHER	1
90 #define CONFIG_PHYLIB
91 #define CONFIG_BITBANGMII
92 #define CONFIG_BITBANGMII_MULTI
93 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
94 #define CONFIG_PHY_VITESSE
95 
96 #define SH7752EVB_ETHERNET_MAC_BASE_SPI	0x00090000
97 #define SH7752EVB_SPI_SECTOR_SIZE	(64 * 1024)
98 #define SH7752EVB_ETHERNET_MAC_BASE	SH7752EVB_ETHERNET_MAC_BASE_SPI
99 #define SH7752EVB_ETHERNET_MAC_SIZE	17
100 #define SH7752EVB_ETHERNET_NUM_CH	2
101 #define CONFIG_BOARD_LATE_INIT
102 
103 /* SPI */
104 #define CONFIG_SH_SPI			1
105 #define CONFIG_SH_SPI_BASE		0xfe002000
106 #define CONFIG_SPI_FLASH
107 #define CONFIG_SPI_FLASH_STMICRO	1
108 #define CONFIG_SPI_FLASH_MACRONIX	1
109 
110 /* MMCIF */
111 #define CONFIG_MMC			1
112 #define CONFIG_GENERIC_MMC		1
113 #define CONFIG_SH_MMCIF			1
114 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
115 #define CONFIG_SH_MMCIF_CLK		48000000
116 
117 /* ENV setting */
118 #define CONFIG_ENV_IS_EMBEDDED
119 #define CONFIG_ENV_IS_IN_SPI_FLASH
120 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
121 #define CONFIG_ENV_ADDR		(0x00080000)
122 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
123 #define CONFIG_ENV_OVERWRITE	1
124 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
125 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
126 #define CONFIG_EXTRA_ENV_SETTINGS				\
127 		"netboot=bootp; bootm\0"
128 
129 /* Board Clock */
130 #define CONFIG_SYS_CLK_FREQ	48000000
131 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
132 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
133 #define CONFIG_SYS_TMU_CLK_DIV	4
134 #endif	/* __SH7752EVB_H */
135