fbfba88b | 30-Nov-2022 |
James Morse <james.morse@arm.com> |
arm64/sysreg: Convert ID_MMFR2_EL1 to automatic generation
Convert ID_MMFR2_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org>
arm64/sysreg: Convert ID_MMFR2_EL1 to automatic generation
Convert ID_MMFR2_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20221130171637.718182-20-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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7e2f00be | 30-Nov-2022 |
James Morse <james.morse@arm.com> |
arm64/sysreg: Convert ID_MMFR1_EL1 to automatic generation
Convert ID_MMFR1_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org>
arm64/sysreg: Convert ID_MMFR1_EL1 to automatic generation
Convert ID_MMFR1_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20221130171637.718182-19-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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8893df29 | 30-Nov-2022 |
James Morse <james.morse@arm.com> |
arm64/sysreg: Convert ID_MMFR0_EL1 to automatic generation
Convert ID_MMFR0_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org>
arm64/sysreg: Convert ID_MMFR0_EL1 to automatic generation
Convert ID_MMFR0_EL1 to be automatically generated as per DDI0487I.a, no functional changes.
Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20221130171637.718182-18-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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95aa6860 | 17-Oct-2022 |
Mark Brown <broonie@kernel.org> |
arm64/hwcap: Add support for FEAT_CSSC
FEAT_CSSC adds a number of new instructions usable to optimise common short sequences of instructions, add a hwcap indicating that the feature is available and
arm64/hwcap: Add support for FEAT_CSSC
FEAT_CSSC adds a number of new instructions usable to optimise common short sequences of instructions, add a hwcap indicating that the feature is available and can be used by userspace.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20221017152520.1039165-2-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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10453bf1 | 10-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation
Convert ID_AA64AFRn_EL1 to automatic generation as per DDI0487I.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org
arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation
Convert ID_AA64AFRn_EL1 to automatic generation as per DDI0487I.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220910163354.860255-7-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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c65c6178 | 10-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generation
Convert ID_AA64FDR1_EL1 to automatic generation as per DDI0487I.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org
arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generation
Convert ID_AA64FDR1_EL1 to automatic generation as per DDI0487I.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220910163354.860255-6-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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3e9ae1ce | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Add defintion for ALLINT
The FEAT_NMI extension adds a new system register ALLINT for controlling NMI related interrupt masking, add a definition of this register as per DDI0487H.a.
S
arm64/sysreg: Add defintion for ALLINT
The FEAT_NMI extension adds a new system register ALLINT for controlling NMI related interrupt masking, add a definition of this register as per DDI0487H.a.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-29-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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b1179b75 | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert SCXTNUM_EL1 to automatic generation
Convert SCXTNUM_EL1 to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Review
arm64/sysreg: Convert SCXTNUM_EL1 to automatic generation
Convert SCXTNUM_EL1 to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-28-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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0a45f398 | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert TIPDR_EL1 to automatic generation
Convert TPIDR_EL1 to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-b
arm64/sysreg: Convert TIPDR_EL1 to automatic generation
Convert TPIDR_EL1 to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-27-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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ef4ba5a6 | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generation
Convert ID_AA64PFR1_EL1 to be automatically generated as per DDI04187H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@ker
arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generation
Convert ID_AA64PFR1_EL1 to be automatically generated as per DDI04187H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-26-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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cea08f2b | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation
Automatically generate the constants for ID_AA64PFR0_EL1 as per DDI0487I.a, no functional changes. The generic defines for the ELx field
arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation
Automatically generate the constants for ID_AA64PFR0_EL1 as per DDI0487I.a, no functional changes. The generic defines for the ELx fields are left in place as they remain useful.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-25-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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cfa3a6c5 | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64MMFR2_EL1 to automatic generation
Convert ID_AA64MMFR2_EL1 defines to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@
arm64/sysreg: Convert ID_AA64MMFR2_EL1 to automatic generation
Convert ID_AA64MMFR2_EL1 defines to automatic generation as per DDI0487H.a, no functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-24-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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7d751b31 | 05-Sep-2022 |
Kristina Martsenko <kristina.martsenko@arm.com> |
arm64/sysreg: Convert ID_AA64MMFR1_EL1 to automatic generation
Convert ID_AA64MMFR1_EL1 to be automatically generated as per DDI0487H.a plus ECBHB which was RES0 in DDI0487H.a but has been subsequen
arm64/sysreg: Convert ID_AA64MMFR1_EL1 to automatic generation
Convert ID_AA64MMFR1_EL1 to be automatically generated as per DDI0487H.a plus ECBHB which was RES0 in DDI0487H.a but has been subsequently defined and is already present in mainline. No functional changes.
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-23-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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0b7ed4d8 | 05-Sep-2022 |
Mark Brown <broonie@kernel.org> |
arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generation
Automatically generate most of the defines for ID_AA64MMFR0_EL1 mostly as per DDI0487H.a. Due to the large amount of MixedCase in this
arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generation
Automatically generate most of the defines for ID_AA64MMFR0_EL1 mostly as per DDI0487H.a. Due to the large amount of MixedCase in this register which isn't really consistent with either the kernel style or the majority of the architecture the use of upper case is preserved. We also leave in place a number of min/max/default value definitions which don't flow from the architecture definitions.
No functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-22-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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