1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Based on arch/arm/mm/fault.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 1995-2004 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/bitfield.h> 12 #include <linux/extable.h> 13 #include <linux/kfence.h> 14 #include <linux/signal.h> 15 #include <linux/mm.h> 16 #include <linux/hardirq.h> 17 #include <linux/init.h> 18 #include <linux/kasan.h> 19 #include <linux/kprobes.h> 20 #include <linux/uaccess.h> 21 #include <linux/page-flags.h> 22 #include <linux/sched/signal.h> 23 #include <linux/sched/debug.h> 24 #include <linux/highmem.h> 25 #include <linux/perf_event.h> 26 #include <linux/preempt.h> 27 #include <linux/hugetlb.h> 28 29 #include <asm/acpi.h> 30 #include <asm/bug.h> 31 #include <asm/cmpxchg.h> 32 #include <asm/cpufeature.h> 33 #include <asm/efi.h> 34 #include <asm/exception.h> 35 #include <asm/daifflags.h> 36 #include <asm/debug-monitors.h> 37 #include <asm/esr.h> 38 #include <asm/kprobes.h> 39 #include <asm/mte.h> 40 #include <asm/processor.h> 41 #include <asm/sysreg.h> 42 #include <asm/system_misc.h> 43 #include <asm/tlbflush.h> 44 #include <asm/traps.h> 45 46 struct fault_info { 47 int (*fn)(unsigned long far, unsigned long esr, 48 struct pt_regs *regs); 49 int sig; 50 int code; 51 const char *name; 52 }; 53 54 static const struct fault_info fault_info[]; 55 static struct fault_info debug_fault_info[]; 56 57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr) 58 { 59 return fault_info + (esr & ESR_ELx_FSC); 60 } 61 62 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr) 63 { 64 return debug_fault_info + DBG_ESR_EVT(esr); 65 } 66 67 static void data_abort_decode(unsigned long esr) 68 { 69 pr_alert("Data abort info:\n"); 70 71 if (esr & ESR_ELx_ISV) { 72 pr_alert(" Access size = %u byte(s)\n", 73 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT)); 74 pr_alert(" SSE = %lu, SRT = %lu\n", 75 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT, 76 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT); 77 pr_alert(" SF = %lu, AR = %lu\n", 78 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, 79 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); 80 } else { 81 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); 82 } 83 84 pr_alert(" CM = %lu, WnR = %lu\n", 85 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT, 86 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT); 87 } 88 89 static void mem_abort_decode(unsigned long esr) 90 { 91 pr_alert("Mem abort info:\n"); 92 93 pr_alert(" ESR = 0x%016lx\n", esr); 94 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", 95 ESR_ELx_EC(esr), esr_get_class_string(esr), 96 (esr & ESR_ELx_IL) ? 32 : 16); 97 pr_alert(" SET = %lu, FnV = %lu\n", 98 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT, 99 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT); 100 pr_alert(" EA = %lu, S1PTW = %lu\n", 101 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT, 102 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT); 103 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC), 104 esr_to_fault_info(esr)->name); 105 106 if (esr_is_data_abort(esr)) 107 data_abort_decode(esr); 108 } 109 110 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) 111 { 112 /* Either init_pg_dir or swapper_pg_dir */ 113 if (mm == &init_mm) 114 return __pa_symbol(mm->pgd); 115 116 return (unsigned long)virt_to_phys(mm->pgd); 117 } 118 119 /* 120 * Dump out the page tables associated with 'addr' in the currently active mm. 121 */ 122 static void show_pte(unsigned long addr) 123 { 124 struct mm_struct *mm; 125 pgd_t *pgdp; 126 pgd_t pgd; 127 128 if (is_ttbr0_addr(addr)) { 129 /* TTBR0 */ 130 mm = current->active_mm; 131 if (mm == &init_mm) { 132 pr_alert("[%016lx] user address but active_mm is swapper\n", 133 addr); 134 return; 135 } 136 } else if (is_ttbr1_addr(addr)) { 137 /* TTBR1 */ 138 mm = &init_mm; 139 } else { 140 pr_alert("[%016lx] address between user and kernel address ranges\n", 141 addr); 142 return; 143 } 144 145 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", 146 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, 147 vabits_actual, mm_to_pgd_phys(mm)); 148 pgdp = pgd_offset(mm, addr); 149 pgd = READ_ONCE(*pgdp); 150 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); 151 152 do { 153 p4d_t *p4dp, p4d; 154 pud_t *pudp, pud; 155 pmd_t *pmdp, pmd; 156 pte_t *ptep, pte; 157 158 if (pgd_none(pgd) || pgd_bad(pgd)) 159 break; 160 161 p4dp = p4d_offset(pgdp, addr); 162 p4d = READ_ONCE(*p4dp); 163 pr_cont(", p4d=%016llx", p4d_val(p4d)); 164 if (p4d_none(p4d) || p4d_bad(p4d)) 165 break; 166 167 pudp = pud_offset(p4dp, addr); 168 pud = READ_ONCE(*pudp); 169 pr_cont(", pud=%016llx", pud_val(pud)); 170 if (pud_none(pud) || pud_bad(pud)) 171 break; 172 173 pmdp = pmd_offset(pudp, addr); 174 pmd = READ_ONCE(*pmdp); 175 pr_cont(", pmd=%016llx", pmd_val(pmd)); 176 if (pmd_none(pmd) || pmd_bad(pmd)) 177 break; 178 179 ptep = pte_offset_map(pmdp, addr); 180 pte = READ_ONCE(*ptep); 181 pr_cont(", pte=%016llx", pte_val(pte)); 182 pte_unmap(ptep); 183 } while(0); 184 185 pr_cont("\n"); 186 } 187 188 /* 189 * This function sets the access flags (dirty, accessed), as well as write 190 * permission, and only to a more permissive setting. 191 * 192 * It needs to cope with hardware update of the accessed/dirty state by other 193 * agents in the system and can safely skip the __sync_icache_dcache() call as, 194 * like set_pte_at(), the PTE is never changed from no-exec to exec here. 195 * 196 * Returns whether or not the PTE actually changed. 197 */ 198 int ptep_set_access_flags(struct vm_area_struct *vma, 199 unsigned long address, pte_t *ptep, 200 pte_t entry, int dirty) 201 { 202 pteval_t old_pteval, pteval; 203 pte_t pte = READ_ONCE(*ptep); 204 205 if (pte_same(pte, entry)) 206 return 0; 207 208 /* only preserve the access flags and write permission */ 209 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; 210 211 /* 212 * Setting the flags must be done atomically to avoid racing with the 213 * hardware update of the access/dirty state. The PTE_RDONLY bit must 214 * be set to the most permissive (lowest value) of *ptep and entry 215 * (calculated as: a & b == ~(~a | ~b)). 216 */ 217 pte_val(entry) ^= PTE_RDONLY; 218 pteval = pte_val(pte); 219 do { 220 old_pteval = pteval; 221 pteval ^= PTE_RDONLY; 222 pteval |= pte_val(entry); 223 pteval ^= PTE_RDONLY; 224 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); 225 } while (pteval != old_pteval); 226 227 /* Invalidate a stale read-only entry */ 228 if (dirty) 229 flush_tlb_page(vma, address); 230 return 1; 231 } 232 233 static bool is_el1_instruction_abort(unsigned long esr) 234 { 235 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR; 236 } 237 238 static bool is_el1_data_abort(unsigned long esr) 239 { 240 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR; 241 } 242 243 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr, 244 struct pt_regs *regs) 245 { 246 unsigned long fsc_type = esr & ESR_ELx_FSC_TYPE; 247 248 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr)) 249 return false; 250 251 if (fsc_type == ESR_ELx_FSC_PERM) 252 return true; 253 254 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan()) 255 return fsc_type == ESR_ELx_FSC_FAULT && 256 (regs->pstate & PSR_PAN_BIT); 257 258 return false; 259 } 260 261 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, 262 unsigned long esr, 263 struct pt_regs *regs) 264 { 265 unsigned long flags; 266 u64 par, dfsc; 267 268 if (!is_el1_data_abort(esr) || 269 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT) 270 return false; 271 272 local_irq_save(flags); 273 asm volatile("at s1e1r, %0" :: "r" (addr)); 274 isb(); 275 par = read_sysreg_par(); 276 local_irq_restore(flags); 277 278 /* 279 * If we now have a valid translation, treat the translation fault as 280 * spurious. 281 */ 282 if (!(par & SYS_PAR_EL1_F)) 283 return true; 284 285 /* 286 * If we got a different type of fault from the AT instruction, 287 * treat the translation fault as spurious. 288 */ 289 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); 290 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; 291 } 292 293 static void die_kernel_fault(const char *msg, unsigned long addr, 294 unsigned long esr, struct pt_regs *regs) 295 { 296 bust_spinlocks(1); 297 298 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg, 299 addr); 300 301 kasan_non_canonical_hook(addr); 302 303 mem_abort_decode(esr); 304 305 show_pte(addr); 306 die("Oops", regs, esr); 307 bust_spinlocks(0); 308 make_task_dead(SIGKILL); 309 } 310 311 #ifdef CONFIG_KASAN_HW_TAGS 312 static void report_tag_fault(unsigned long addr, unsigned long esr, 313 struct pt_regs *regs) 314 { 315 /* 316 * SAS bits aren't set for all faults reported in EL1, so we can't 317 * find out access size. 318 */ 319 bool is_write = !!(esr & ESR_ELx_WNR); 320 kasan_report(addr, 0, is_write, regs->pc); 321 } 322 #else 323 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */ 324 static inline void report_tag_fault(unsigned long addr, unsigned long esr, 325 struct pt_regs *regs) { } 326 #endif 327 328 static void do_tag_recovery(unsigned long addr, unsigned long esr, 329 struct pt_regs *regs) 330 { 331 332 report_tag_fault(addr, esr, regs); 333 334 /* 335 * Disable MTE Tag Checking on the local CPU for the current EL. 336 * It will be done lazily on the other CPUs when they will hit a 337 * tag fault. 338 */ 339 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK, 340 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE)); 341 isb(); 342 } 343 344 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr) 345 { 346 unsigned long fsc = esr & ESR_ELx_FSC; 347 348 if (!is_el1_data_abort(esr)) 349 return false; 350 351 if (fsc == ESR_ELx_FSC_MTE) 352 return true; 353 354 return false; 355 } 356 357 static void __do_kernel_fault(unsigned long addr, unsigned long esr, 358 struct pt_regs *regs) 359 { 360 const char *msg; 361 362 /* 363 * Are we prepared to handle this kernel fault? 364 * We are almost certainly not prepared to handle instruction faults. 365 */ 366 if (!is_el1_instruction_abort(esr) && fixup_exception(regs)) 367 return; 368 369 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs), 370 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr)) 371 return; 372 373 if (is_el1_mte_sync_tag_check_fault(esr)) { 374 do_tag_recovery(addr, esr, regs); 375 376 return; 377 } 378 379 if (is_el1_permission_fault(addr, esr, regs)) { 380 if (esr & ESR_ELx_WNR) 381 msg = "write to read-only memory"; 382 else if (is_el1_instruction_abort(esr)) 383 msg = "execute from non-executable memory"; 384 else 385 msg = "read from unreadable memory"; 386 } else if (addr < PAGE_SIZE) { 387 msg = "NULL pointer dereference"; 388 } else { 389 if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs)) 390 return; 391 392 msg = "paging request"; 393 } 394 395 if (efi_runtime_fixup_exception(regs, msg)) 396 return; 397 398 die_kernel_fault(msg, addr, esr, regs); 399 } 400 401 static void set_thread_esr(unsigned long address, unsigned long esr) 402 { 403 current->thread.fault_address = address; 404 405 /* 406 * If the faulting address is in the kernel, we must sanitize the ESR. 407 * From userspace's point of view, kernel-only mappings don't exist 408 * at all, so we report them as level 0 translation faults. 409 * (This is not quite the way that "no mapping there at all" behaves: 410 * an alignment fault not caused by the memory type would take 411 * precedence over translation fault for a real access to empty 412 * space. Unfortunately we can't easily distinguish "alignment fault 413 * not caused by memory type" from "alignment fault caused by memory 414 * type", so we ignore this wrinkle and just return the translation 415 * fault.) 416 */ 417 if (!is_ttbr0_addr(current->thread.fault_address)) { 418 switch (ESR_ELx_EC(esr)) { 419 case ESR_ELx_EC_DABT_LOW: 420 /* 421 * These bits provide only information about the 422 * faulting instruction, which userspace knows already. 423 * We explicitly clear bits which are architecturally 424 * RES0 in case they are given meanings in future. 425 * We always report the ESR as if the fault was taken 426 * to EL1 and so ISV and the bits in ISS[23:14] are 427 * clear. (In fact it always will be a fault to EL1.) 428 */ 429 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | 430 ESR_ELx_CM | ESR_ELx_WNR; 431 esr |= ESR_ELx_FSC_FAULT; 432 break; 433 case ESR_ELx_EC_IABT_LOW: 434 /* 435 * Claim a level 0 translation fault. 436 * All other bits are architecturally RES0 for faults 437 * reported with that DFSC value, so we clear them. 438 */ 439 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; 440 esr |= ESR_ELx_FSC_FAULT; 441 break; 442 default: 443 /* 444 * This should never happen (entry.S only brings us 445 * into this code for insn and data aborts from a lower 446 * exception level). Fail safe by not providing an ESR 447 * context record at all. 448 */ 449 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr); 450 esr = 0; 451 break; 452 } 453 } 454 455 current->thread.fault_code = esr; 456 } 457 458 static void do_bad_area(unsigned long far, unsigned long esr, 459 struct pt_regs *regs) 460 { 461 unsigned long addr = untagged_addr(far); 462 463 /* 464 * If we are in kernel mode at this point, we have no context to 465 * handle this fault with. 466 */ 467 if (user_mode(regs)) { 468 const struct fault_info *inf = esr_to_fault_info(esr); 469 470 set_thread_esr(addr, esr); 471 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name); 472 } else { 473 __do_kernel_fault(addr, esr, regs); 474 } 475 } 476 477 #define VM_FAULT_BADMAP 0x010000 478 #define VM_FAULT_BADACCESS 0x020000 479 480 static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr, 481 unsigned int mm_flags, unsigned long vm_flags, 482 struct pt_regs *regs) 483 { 484 struct vm_area_struct *vma = find_vma(mm, addr); 485 486 if (unlikely(!vma)) 487 return VM_FAULT_BADMAP; 488 489 /* 490 * Ok, we have a good vm_area for this memory access, so we can handle 491 * it. 492 */ 493 if (unlikely(vma->vm_start > addr)) { 494 if (!(vma->vm_flags & VM_GROWSDOWN)) 495 return VM_FAULT_BADMAP; 496 if (expand_stack(vma, addr)) 497 return VM_FAULT_BADMAP; 498 } 499 500 /* 501 * Check that the permissions on the VMA allow for the fault which 502 * occurred. 503 */ 504 if (!(vma->vm_flags & vm_flags)) 505 return VM_FAULT_BADACCESS; 506 return handle_mm_fault(vma, addr, mm_flags, regs); 507 } 508 509 static bool is_el0_instruction_abort(unsigned long esr) 510 { 511 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW; 512 } 513 514 /* 515 * Note: not valid for EL1 DC IVAC, but we never use that such that it 516 * should fault. EL0 cannot issue DC IVAC (undef). 517 */ 518 static bool is_write_abort(unsigned long esr) 519 { 520 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); 521 } 522 523 static int __kprobes do_page_fault(unsigned long far, unsigned long esr, 524 struct pt_regs *regs) 525 { 526 const struct fault_info *inf; 527 struct mm_struct *mm = current->mm; 528 vm_fault_t fault; 529 unsigned long vm_flags; 530 unsigned int mm_flags = FAULT_FLAG_DEFAULT; 531 unsigned long addr = untagged_addr(far); 532 533 if (kprobe_page_fault(regs, esr)) 534 return 0; 535 536 /* 537 * If we're in an interrupt or have no user context, we must not take 538 * the fault. 539 */ 540 if (faulthandler_disabled() || !mm) 541 goto no_context; 542 543 if (user_mode(regs)) 544 mm_flags |= FAULT_FLAG_USER; 545 546 /* 547 * vm_flags tells us what bits we must have in vma->vm_flags 548 * for the fault to be benign, __do_page_fault() would check 549 * vma->vm_flags & vm_flags and returns an error if the 550 * intersection is empty 551 */ 552 if (is_el0_instruction_abort(esr)) { 553 /* It was exec fault */ 554 vm_flags = VM_EXEC; 555 mm_flags |= FAULT_FLAG_INSTRUCTION; 556 } else if (is_write_abort(esr)) { 557 /* It was write fault */ 558 vm_flags = VM_WRITE; 559 mm_flags |= FAULT_FLAG_WRITE; 560 } else { 561 /* It was read fault */ 562 vm_flags = VM_READ; 563 /* Write implies read */ 564 vm_flags |= VM_WRITE; 565 /* If EPAN is absent then exec implies read */ 566 if (!cpus_have_const_cap(ARM64_HAS_EPAN)) 567 vm_flags |= VM_EXEC; 568 } 569 570 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) { 571 if (is_el1_instruction_abort(esr)) 572 die_kernel_fault("execution of user memory", 573 addr, esr, regs); 574 575 if (!search_exception_tables(regs->pc)) 576 die_kernel_fault("access to user memory outside uaccess routines", 577 addr, esr, regs); 578 } 579 580 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 581 582 /* 583 * As per x86, we may deadlock here. However, since the kernel only 584 * validly references user space from well defined areas of the code, 585 * we can bug out early if this is from code which shouldn't. 586 */ 587 if (!mmap_read_trylock(mm)) { 588 if (!user_mode(regs) && !search_exception_tables(regs->pc)) 589 goto no_context; 590 retry: 591 mmap_read_lock(mm); 592 } else { 593 /* 594 * The above mmap_read_trylock() might have succeeded in which 595 * case, we'll have missed the might_sleep() from down_read(). 596 */ 597 might_sleep(); 598 #ifdef CONFIG_DEBUG_VM 599 if (!user_mode(regs) && !search_exception_tables(regs->pc)) { 600 mmap_read_unlock(mm); 601 goto no_context; 602 } 603 #endif 604 } 605 606 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs); 607 608 /* Quick path to respond to signals */ 609 if (fault_signal_pending(fault, regs)) { 610 if (!user_mode(regs)) 611 goto no_context; 612 return 0; 613 } 614 615 /* The fault is fully completed (including releasing mmap lock) */ 616 if (fault & VM_FAULT_COMPLETED) 617 return 0; 618 619 if (fault & VM_FAULT_RETRY) { 620 mm_flags |= FAULT_FLAG_TRIED; 621 goto retry; 622 } 623 mmap_read_unlock(mm); 624 625 /* 626 * Handle the "normal" (no error) case first. 627 */ 628 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | 629 VM_FAULT_BADACCESS)))) 630 return 0; 631 632 /* 633 * If we are in kernel mode at this point, we have no context to 634 * handle this fault with. 635 */ 636 if (!user_mode(regs)) 637 goto no_context; 638 639 if (fault & VM_FAULT_OOM) { 640 /* 641 * We ran out of memory, call the OOM killer, and return to 642 * userspace (which will retry the fault, or kill us if we got 643 * oom-killed). 644 */ 645 pagefault_out_of_memory(); 646 return 0; 647 } 648 649 inf = esr_to_fault_info(esr); 650 set_thread_esr(addr, esr); 651 if (fault & VM_FAULT_SIGBUS) { 652 /* 653 * We had some memory, but were unable to successfully fix up 654 * this page fault. 655 */ 656 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name); 657 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) { 658 unsigned int lsb; 659 660 lsb = PAGE_SHIFT; 661 if (fault & VM_FAULT_HWPOISON_LARGE) 662 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 663 664 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name); 665 } else { 666 /* 667 * Something tried to access memory that isn't in our memory 668 * map. 669 */ 670 arm64_force_sig_fault(SIGSEGV, 671 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, 672 far, inf->name); 673 } 674 675 return 0; 676 677 no_context: 678 __do_kernel_fault(addr, esr, regs); 679 return 0; 680 } 681 682 static int __kprobes do_translation_fault(unsigned long far, 683 unsigned long esr, 684 struct pt_regs *regs) 685 { 686 unsigned long addr = untagged_addr(far); 687 688 if (is_ttbr0_addr(addr)) 689 return do_page_fault(far, esr, regs); 690 691 do_bad_area(far, esr, regs); 692 return 0; 693 } 694 695 static int do_alignment_fault(unsigned long far, unsigned long esr, 696 struct pt_regs *regs) 697 { 698 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) && 699 compat_user_mode(regs)) 700 return do_compat_alignment_fixup(far, regs); 701 do_bad_area(far, esr, regs); 702 return 0; 703 } 704 705 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs) 706 { 707 return 1; /* "fault" */ 708 } 709 710 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs) 711 { 712 const struct fault_info *inf; 713 unsigned long siaddr; 714 715 inf = esr_to_fault_info(esr); 716 717 if (user_mode(regs) && apei_claim_sea(regs) == 0) { 718 /* 719 * APEI claimed this as a firmware-first notification. 720 * Some processing deferred to task_work before ret_to_user(). 721 */ 722 return 0; 723 } 724 725 if (esr & ESR_ELx_FnV) { 726 siaddr = 0; 727 } else { 728 /* 729 * The architecture specifies that the tag bits of FAR_EL1 are 730 * UNKNOWN for synchronous external aborts. Mask them out now 731 * so that userspace doesn't see them. 732 */ 733 siaddr = untagged_addr(far); 734 } 735 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr); 736 737 return 0; 738 } 739 740 static int do_tag_check_fault(unsigned long far, unsigned long esr, 741 struct pt_regs *regs) 742 { 743 /* 744 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN 745 * for tag check faults. Set them to corresponding bits in the untagged 746 * address. 747 */ 748 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); 749 do_bad_area(far, esr, regs); 750 return 0; 751 } 752 753 static const struct fault_info fault_info[] = { 754 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" }, 755 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" }, 756 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" }, 757 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" }, 758 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, 759 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, 760 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, 761 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, 762 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" }, 763 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, 764 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, 765 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, 766 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" }, 767 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, 768 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, 769 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, 770 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" }, 771 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" }, 772 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" }, 773 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" }, 774 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" }, 775 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" }, 776 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" }, 777 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" }, 778 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented 779 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" }, 780 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" }, 781 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" }, 782 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 783 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 784 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 785 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented 786 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" }, 787 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" }, 788 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" }, 789 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" }, 790 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" }, 791 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" }, 792 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" }, 793 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" }, 794 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" }, 795 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" }, 796 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" }, 797 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" }, 798 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" }, 799 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" }, 800 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" }, 801 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" }, 802 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" }, 803 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" }, 804 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" }, 805 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" }, 806 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" }, 807 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" }, 808 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" }, 809 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" }, 810 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" }, 811 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" }, 812 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" }, 813 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" }, 814 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" }, 815 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" }, 816 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" }, 817 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" }, 818 }; 819 820 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs) 821 { 822 const struct fault_info *inf = esr_to_fault_info(esr); 823 unsigned long addr = untagged_addr(far); 824 825 if (!inf->fn(far, esr, regs)) 826 return; 827 828 if (!user_mode(regs)) 829 die_kernel_fault(inf->name, addr, esr, regs); 830 831 /* 832 * At this point we have an unrecognized fault type whose tag bits may 833 * have been defined as UNKNOWN. Therefore we only expose the untagged 834 * address to the signal handler. 835 */ 836 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr); 837 } 838 NOKPROBE_SYMBOL(do_mem_abort); 839 840 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs) 841 { 842 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN, 843 addr, esr); 844 } 845 NOKPROBE_SYMBOL(do_sp_pc_abort); 846 847 int __init early_brk64(unsigned long addr, unsigned long esr, 848 struct pt_regs *regs); 849 850 /* 851 * __refdata because early_brk64 is __init, but the reference to it is 852 * clobbered at arch_initcall time. 853 * See traps.c and debug-monitors.c:debug_traps_init(). 854 */ 855 static struct fault_info __refdata debug_fault_info[] = { 856 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" }, 857 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" }, 858 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" }, 859 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" }, 860 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" }, 861 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" }, 862 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" }, 863 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" }, 864 }; 865 866 void __init hook_debug_fault_code(int nr, 867 int (*fn)(unsigned long, unsigned long, struct pt_regs *), 868 int sig, int code, const char *name) 869 { 870 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info)); 871 872 debug_fault_info[nr].fn = fn; 873 debug_fault_info[nr].sig = sig; 874 debug_fault_info[nr].code = code; 875 debug_fault_info[nr].name = name; 876 } 877 878 /* 879 * In debug exception context, we explicitly disable preemption despite 880 * having interrupts disabled. 881 * This serves two purposes: it makes it much less likely that we would 882 * accidentally schedule in exception context and it will force a warning 883 * if we somehow manage to schedule by accident. 884 */ 885 static void debug_exception_enter(struct pt_regs *regs) 886 { 887 preempt_disable(); 888 889 /* This code is a bit fragile. Test it. */ 890 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); 891 } 892 NOKPROBE_SYMBOL(debug_exception_enter); 893 894 static void debug_exception_exit(struct pt_regs *regs) 895 { 896 preempt_enable_no_resched(); 897 } 898 NOKPROBE_SYMBOL(debug_exception_exit); 899 900 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr, 901 struct pt_regs *regs) 902 { 903 const struct fault_info *inf = esr_to_debug_fault_info(esr); 904 unsigned long pc = instruction_pointer(regs); 905 906 debug_exception_enter(regs); 907 908 if (user_mode(regs) && !is_ttbr0_addr(pc)) 909 arm64_apply_bp_hardening(); 910 911 if (inf->fn(addr_if_watchpoint, esr, regs)) { 912 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr); 913 } 914 915 debug_exception_exit(regs); 916 } 917 NOKPROBE_SYMBOL(do_debug_exception); 918 919 /* 920 * Used during anonymous page fault handling. 921 */ 922 struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma, 923 unsigned long vaddr) 924 { 925 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO; 926 927 /* 928 * If the page is mapped with PROT_MTE, initialise the tags at the 929 * point of allocation and page zeroing as this is usually faster than 930 * separate DC ZVA and STGM. 931 */ 932 if (vma->vm_flags & VM_MTE) 933 flags |= __GFP_ZEROTAGS; 934 935 return alloc_page_vma(flags, vma, vaddr); 936 } 937 938 void tag_clear_highpage(struct page *page) 939 { 940 mte_zero_clear_page_tags(page_address(page)); 941 set_bit(PG_mte_tagged, &page->flags); 942 } 943