1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef __MSM_DRV_H__ 9 #define __MSM_DRV_H__ 10 11 #include <linux/kernel.h> 12 #include <linux/clk.h> 13 #include <linux/cpufreq.h> 14 #include <linux/module.h> 15 #include <linux/component.h> 16 #include <linux/platform_device.h> 17 #include <linux/pm.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/slab.h> 20 #include <linux/list.h> 21 #include <linux/iommu.h> 22 #include <linux/types.h> 23 #include <linux/of_graph.h> 24 #include <linux/of_device.h> 25 #include <linux/sizes.h> 26 #include <linux/kthread.h> 27 28 #include <drm/drm_atomic.h> 29 #include <drm/drm_atomic_helper.h> 30 #include <drm/drm_probe_helper.h> 31 #include <drm/drm_fb_helper.h> 32 #include <drm/display/drm_dsc.h> 33 #include <drm/msm_drm.h> 34 #include <drm/drm_gem.h> 35 36 #ifdef CONFIG_FAULT_INJECTION 37 extern struct fault_attr fail_gem_alloc; 38 extern struct fault_attr fail_gem_iova; 39 #else 40 # define should_fail(attr, size) 0 41 #endif 42 43 struct msm_kms; 44 struct msm_gpu; 45 struct msm_mmu; 46 struct msm_mdss; 47 struct msm_rd_state; 48 struct msm_perf_state; 49 struct msm_gem_submit; 50 struct msm_fence_context; 51 struct msm_gem_address_space; 52 struct msm_gem_vma; 53 struct msm_disp_state; 54 55 #define MAX_CRTCS 8 56 #define MAX_BRIDGES 8 57 58 #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) 59 60 enum msm_dp_controller { 61 MSM_DP_CONTROLLER_0, 62 MSM_DP_CONTROLLER_1, 63 MSM_DP_CONTROLLER_2, 64 MSM_DP_CONTROLLER_COUNT, 65 }; 66 67 #define MSM_GPU_MAX_RINGS 4 68 #define MAX_H_TILES_PER_DISPLAY 2 69 70 /** 71 * enum msm_event_wait - type of HW events to wait for 72 * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW 73 * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel 74 * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters) 75 */ 76 enum msm_event_wait { 77 MSM_ENC_COMMIT_DONE = 0, 78 MSM_ENC_TX_COMPLETE, 79 MSM_ENC_VBLANK, 80 }; 81 82 /** 83 * struct msm_display_topology - defines a display topology pipeline 84 * @num_lm: number of layer mixers used 85 * @num_enc: number of compression encoder blocks used 86 * @num_intf: number of interfaces the panel is mounted on 87 * @num_dspp: number of dspp blocks used 88 * @num_dsc: number of Display Stream Compression (DSC) blocks used 89 */ 90 struct msm_display_topology { 91 u32 num_lm; 92 u32 num_enc; 93 u32 num_intf; 94 u32 num_dspp; 95 u32 num_dsc; 96 }; 97 98 /* Commit/Event thread specific structure */ 99 struct msm_drm_thread { 100 struct drm_device *dev; 101 unsigned int crtc_id; 102 struct kthread_worker *worker; 103 }; 104 105 struct msm_drm_private { 106 107 struct drm_device *dev; 108 109 struct msm_kms *kms; 110 int (*kms_init)(struct drm_device *dev); 111 112 /* subordinate devices, if present: */ 113 struct platform_device *gpu_pdev; 114 115 /* possibly this should be in the kms component, but it is 116 * shared by both mdp4 and mdp5.. 117 */ 118 struct hdmi *hdmi; 119 120 /* DSI is shared by mdp4 and mdp5 */ 121 struct msm_dsi *dsi[2]; 122 123 struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT]; 124 125 /* when we have more than one 'msm_gpu' these need to be an array: */ 126 struct msm_gpu *gpu; 127 128 /* gpu is only set on open(), but we need this info earlier */ 129 bool is_a2xx; 130 bool has_cached_coherent; 131 132 struct drm_fb_helper *fbdev; 133 134 struct msm_rd_state *rd; /* debugfs to dump all submits */ 135 struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */ 136 struct msm_perf_state *perf; 137 138 /** 139 * List of all GEM objects (mainly for debugfs, protected by obj_lock 140 * (acquire before per GEM object lock) 141 */ 142 struct list_head objects; 143 struct mutex obj_lock; 144 145 /** 146 * lru: 147 * 148 * The various LRU's that a GEM object is in at various stages of 149 * it's lifetime. Objects start out in the unbacked LRU. When 150 * pinned (for scannout or permanently mapped GPU buffers, like 151 * ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When 152 * unpinned, it moves into willneed or dontneed LRU depending on 153 * madvise state. When backing pages are evicted (willneed) or 154 * purged (dontneed) it moves back into the unbacked LRU. 155 * 156 * The dontneed LRU is considered by the shrinker for objects 157 * that are candidate for purging, and the willneed LRU is 158 * considered for objects that could be evicted. 159 */ 160 struct { 161 /** 162 * unbacked: 163 * 164 * The LRU for GEM objects without backing pages allocated. 165 * This mostly exists so that objects are always is one 166 * LRU. 167 */ 168 struct drm_gem_lru unbacked; 169 170 /** 171 * pinned: 172 * 173 * The LRU for pinned GEM objects 174 */ 175 struct drm_gem_lru pinned; 176 177 /** 178 * willneed: 179 * 180 * The LRU for unpinned GEM objects which are in madvise 181 * WILLNEED state (ie. can be evicted) 182 */ 183 struct drm_gem_lru willneed; 184 185 /** 186 * dontneed: 187 * 188 * The LRU for unpinned GEM objects which are in madvise 189 * DONTNEED state (ie. can be purged) 190 */ 191 struct drm_gem_lru dontneed; 192 193 /** 194 * lock: 195 * 196 * Protects manipulation of all of the LRUs. 197 */ 198 struct mutex lock; 199 } lru; 200 201 struct workqueue_struct *wq; 202 203 unsigned int num_crtcs; 204 struct drm_crtc *crtcs[MAX_CRTCS]; 205 206 struct msm_drm_thread event_thread[MAX_CRTCS]; 207 208 unsigned int num_bridges; 209 struct drm_bridge *bridges[MAX_BRIDGES]; 210 211 /* VRAM carveout, used when no IOMMU: */ 212 struct { 213 unsigned long size; 214 dma_addr_t paddr; 215 /* NOTE: mm managed at the page level, size is in # of pages 216 * and position mm_node->start is in # of pages: 217 */ 218 struct drm_mm mm; 219 spinlock_t lock; /* Protects drm_mm node allocation/removal */ 220 } vram; 221 222 struct notifier_block vmap_notifier; 223 struct shrinker shrinker; 224 225 struct drm_atomic_state *pm_state; 226 227 /* For hang detection, in ms */ 228 unsigned int hangcheck_period; 229 230 /** 231 * disable_err_irq: 232 * 233 * Disable handling of GPU hw error interrupts, to force fallback to 234 * sw hangcheck timer. Written (via debugfs) by igt tests to test 235 * the sw hangcheck mechanism. 236 */ 237 bool disable_err_irq; 238 }; 239 240 struct msm_format { 241 uint32_t pixel_format; 242 }; 243 244 struct msm_pending_timer; 245 246 int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, 247 struct msm_kms *kms, int crtc_idx); 248 void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer); 249 void msm_atomic_commit_tail(struct drm_atomic_state *state); 250 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); 251 void msm_atomic_state_clear(struct drm_atomic_state *state); 252 void msm_atomic_state_free(struct drm_atomic_state *state); 253 254 int msm_crtc_enable_vblank(struct drm_crtc *crtc); 255 void msm_crtc_disable_vblank(struct drm_crtc *crtc); 256 257 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); 258 void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); 259 260 struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev); 261 bool msm_use_mmu(struct drm_device *dev); 262 263 int msm_ioctl_gem_submit(struct drm_device *dev, void *data, 264 struct drm_file *file); 265 266 #ifdef CONFIG_DEBUG_FS 267 unsigned long msm_gem_shrinker_shrink(struct drm_device *dev, unsigned long nr_to_scan); 268 #endif 269 270 void msm_gem_shrinker_init(struct drm_device *dev); 271 void msm_gem_shrinker_cleanup(struct drm_device *dev); 272 273 int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); 274 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); 275 int msm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map); 276 void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map); 277 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, 278 struct dma_buf_attachment *attach, struct sg_table *sg); 279 int msm_gem_prime_pin(struct drm_gem_object *obj); 280 void msm_gem_prime_unpin(struct drm_gem_object *obj); 281 282 int msm_framebuffer_prepare(struct drm_framebuffer *fb, 283 struct msm_gem_address_space *aspace, bool needs_dirtyfb); 284 void msm_framebuffer_cleanup(struct drm_framebuffer *fb, 285 struct msm_gem_address_space *aspace, bool needed_dirtyfb); 286 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, 287 struct msm_gem_address_space *aspace, int plane); 288 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane); 289 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb); 290 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, 291 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); 292 struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev, 293 int w, int h, int p, uint32_t format); 294 295 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev); 296 void msm_fbdev_free(struct drm_device *dev); 297 298 struct hdmi; 299 #ifdef CONFIG_DRM_MSM_HDMI 300 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, 301 struct drm_encoder *encoder); 302 void __init msm_hdmi_register(void); 303 void __exit msm_hdmi_unregister(void); 304 #else 305 static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, 306 struct drm_encoder *encoder) 307 { 308 return -EINVAL; 309 } 310 static inline void __init msm_hdmi_register(void) {} 311 static inline void __exit msm_hdmi_unregister(void) {} 312 #endif 313 314 struct msm_dsi; 315 #ifdef CONFIG_DRM_MSM_DSI 316 int dsi_dev_attach(struct platform_device *pdev); 317 void dsi_dev_detach(struct platform_device *pdev); 318 void __init msm_dsi_register(void); 319 void __exit msm_dsi_unregister(void); 320 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev, 321 struct drm_encoder *encoder); 322 void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi); 323 bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi); 324 bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi); 325 bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi); 326 struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi); 327 #else 328 static inline void __init msm_dsi_register(void) 329 { 330 } 331 static inline void __exit msm_dsi_unregister(void) 332 { 333 } 334 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, 335 struct drm_device *dev, 336 struct drm_encoder *encoder) 337 { 338 return -EINVAL; 339 } 340 static inline void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi) 341 { 342 } 343 static inline bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) 344 { 345 return false; 346 } 347 static inline bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi) 348 { 349 return false; 350 } 351 static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi) 352 { 353 return false; 354 } 355 356 static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) 357 { 358 return NULL; 359 } 360 #endif 361 362 #ifdef CONFIG_DRM_MSM_DP 363 int __init msm_dp_register(void); 364 void __exit msm_dp_unregister(void); 365 int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, 366 struct drm_encoder *encoder); 367 void msm_dp_irq_postinstall(struct msm_dp *dp_display); 368 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display); 369 370 void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor); 371 bool msm_dp_wide_bus_available(const struct msm_dp *dp_display); 372 373 #else 374 static inline int __init msm_dp_register(void) 375 { 376 return -EINVAL; 377 } 378 static inline void __exit msm_dp_unregister(void) 379 { 380 } 381 static inline int msm_dp_modeset_init(struct msm_dp *dp_display, 382 struct drm_device *dev, 383 struct drm_encoder *encoder) 384 { 385 return -EINVAL; 386 } 387 388 static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display) 389 { 390 } 391 392 static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display) 393 { 394 } 395 396 static inline void msm_dp_debugfs_init(struct msm_dp *dp_display, 397 struct drm_minor *minor) 398 { 399 } 400 401 static inline bool msm_dp_wide_bus_available(const struct msm_dp *dp_display) 402 { 403 return false; 404 } 405 406 #endif 407 408 #ifdef CONFIG_DRM_MSM_MDP4 409 void msm_mdp4_register(void); 410 void msm_mdp4_unregister(void); 411 #else 412 static inline void msm_mdp4_register(void) {} 413 static inline void msm_mdp4_unregister(void) {} 414 #endif 415 416 #ifdef CONFIG_DRM_MSM_MDP5 417 void msm_mdp_register(void); 418 void msm_mdp_unregister(void); 419 #else 420 static inline void msm_mdp_register(void) {} 421 static inline void msm_mdp_unregister(void) {} 422 #endif 423 424 #ifdef CONFIG_DRM_MSM_DPU 425 void msm_dpu_register(void); 426 void msm_dpu_unregister(void); 427 #else 428 static inline void msm_dpu_register(void) {} 429 static inline void msm_dpu_unregister(void) {} 430 #endif 431 432 #ifdef CONFIG_DRM_MSM_MDSS 433 void msm_mdss_register(void); 434 void msm_mdss_unregister(void); 435 #else 436 static inline void msm_mdss_register(void) {} 437 static inline void msm_mdss_unregister(void) {} 438 #endif 439 440 #ifdef CONFIG_DEBUG_FS 441 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); 442 int msm_debugfs_late_init(struct drm_device *dev); 443 int msm_rd_debugfs_init(struct drm_minor *minor); 444 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv); 445 __printf(3, 4) 446 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, 447 const char *fmt, ...); 448 int msm_perf_debugfs_init(struct drm_minor *minor); 449 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv); 450 #else 451 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; } 452 __printf(3, 4) 453 static inline void msm_rd_dump_submit(struct msm_rd_state *rd, 454 struct msm_gem_submit *submit, 455 const char *fmt, ...) {} 456 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {} 457 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {} 458 #endif 459 460 struct clk *msm_clk_get(struct platform_device *pdev, const char *name); 461 462 struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count, 463 const char *name); 464 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name); 465 void __iomem *msm_ioremap_size(struct platform_device *pdev, const char *name, 466 phys_addr_t *size); 467 void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name); 468 469 struct icc_path *msm_icc_get(struct device *dev, const char *name); 470 471 #define msm_writel(data, addr) writel((data), (addr)) 472 #define msm_readl(addr) readl((addr)) 473 474 static inline void msm_rmw(void __iomem *addr, u32 mask, u32 or) 475 { 476 u32 val = msm_readl(addr); 477 478 val &= ~mask; 479 msm_writel(val | or, addr); 480 } 481 482 /** 483 * struct msm_hrtimer_work - a helper to combine an hrtimer with kthread_work 484 * 485 * @timer: hrtimer to control when the kthread work is triggered 486 * @work: the kthread work 487 * @worker: the kthread worker the work will be scheduled on 488 */ 489 struct msm_hrtimer_work { 490 struct hrtimer timer; 491 struct kthread_work work; 492 struct kthread_worker *worker; 493 }; 494 495 void msm_hrtimer_queue_work(struct msm_hrtimer_work *work, 496 ktime_t wakeup_time, 497 enum hrtimer_mode mode); 498 void msm_hrtimer_work_init(struct msm_hrtimer_work *work, 499 struct kthread_worker *worker, 500 kthread_work_func_t fn, 501 clockid_t clock_id, 502 enum hrtimer_mode mode); 503 504 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) 505 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) 506 507 static inline int align_pitch(int width, int bpp) 508 { 509 int bytespp = (bpp + 7) / 8; 510 /* adreno needs pitch aligned to 32 pixels: */ 511 return bytespp * ALIGN(width, 32); 512 } 513 514 /* for the generated headers: */ 515 #define INVALID_IDX(idx) ({BUG(); 0;}) 516 #define fui(x) ({BUG(); 0;}) 517 #define _mesa_float_to_half(x) ({BUG(); 0;}) 518 519 520 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT) 521 522 /* for conditionally setting boolean flag(s): */ 523 #define COND(bool, val) ((bool) ? (val) : 0) 524 525 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) 526 { 527 ktime_t now = ktime_get(); 528 s64 remaining_jiffies; 529 530 if (ktime_compare(*timeout, now) < 0) { 531 remaining_jiffies = 0; 532 } else { 533 ktime_t rem = ktime_sub(*timeout, now); 534 remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); 535 } 536 537 return clamp(remaining_jiffies, 0LL, (s64)INT_MAX); 538 } 539 540 /* Driver helpers */ 541 542 extern const struct component_master_ops msm_drm_ops; 543 544 int msm_pm_prepare(struct device *dev); 545 void msm_pm_complete(struct device *dev); 546 547 int msm_drv_probe(struct device *dev, 548 int (*kms_init)(struct drm_device *dev)); 549 void msm_drv_shutdown(struct platform_device *pdev); 550 551 552 #endif /* __MSM_DRV_H__ */ 553