1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Herobrine baseboard device tree source
4 *
5 * The set of things in this file is a bit loosely defined. It's roughly
6 * defined as the set of things that the child boards happen to have in
7 * common. Since all of the child boards started from the same original
8 * design this is hopefully a large set of things but as more derivatives
9 * appear things may "bubble down" out of this file. For things that are
10 * part of the reference design but might not exist on child nodes we will
11 * follow the lead of the SoC dtsi files and leave their status as "disabled".
12 *
13 * Copyright 2022 Google LLC.
14 */
15
16#include <dt-bindings/input/gpio-keys.h>
17#include <dt-bindings/input/input.h>
18#include <dt-bindings/leds/common.h>
19
20#include "sc7280-qcard.dtsi"
21#include "sc7280-chrome-common.dtsi"
22
23/ {
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	/*
29	 * FIXED REGULATORS
30	 *
31	 * Sort order:
32	 * 1. parents above children.
33	 * 2. higher voltage above lower voltage.
34	 * 3. alphabetically by node name.
35	 */
36
37	/* This is the top level supply and variable voltage */
38	ppvar_sys: ppvar-sys-regulator {
39		compatible = "regulator-fixed";
40		regulator-name = "ppvar_sys";
41		regulator-always-on;
42		regulator-boot-on;
43	};
44
45	/* This divides ppvar_sys by 2, so voltage is variable */
46	src_vph_pwr: src-vph-pwr-regulator {
47		compatible = "regulator-fixed";
48		regulator-name = "src_vph_pwr";
49
50		/* EC turns on with switchcap_on; always on for AP */
51		regulator-always-on;
52		regulator-boot-on;
53
54		vin-supply = <&ppvar_sys>;
55	};
56
57	pp5000_s5: pp5000-s5-regulator {
58		compatible = "regulator-fixed";
59		regulator-name = "pp5000_s5";
60
61		/* EC turns on with en_pp5000_s5; always on for AP */
62		regulator-always-on;
63		regulator-boot-on;
64		regulator-min-microvolt = <5000000>;
65		regulator-max-microvolt = <5000000>;
66
67		vin-supply = <&ppvar_sys>;
68	};
69
70	pp3300_z1: pp3300-z1-regulator {
71		compatible = "regulator-fixed";
72		regulator-name = "pp3300_z1";
73
74		/* EC turns on with en_pp3300_z1; always on for AP */
75		regulator-always-on;
76		regulator-boot-on;
77		regulator-min-microvolt = <3300000>;
78		regulator-max-microvolt = <3300000>;
79
80		vin-supply = <&ppvar_sys>;
81	};
82
83	pp3300_codec: pp3300-codec-regulator {
84		compatible = "regulator-fixed";
85		regulator-name = "pp3300_codec";
86
87		regulator-min-microvolt = <3300000>;
88		regulator-max-microvolt = <3300000>;
89
90		gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
91		enable-active-high;
92		pinctrl-names = "default";
93		pinctrl-0 = <&en_pp3300_codec>;
94
95		vin-supply = <&pp3300_z1>;
96		status = "disabled";
97	};
98
99	pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
100		compatible = "regulator-fixed";
101		regulator-name = "pp3300_left_in_mlb";
102
103		regulator-min-microvolt = <3300000>;
104		regulator-max-microvolt = <3300000>;
105
106		gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
107		enable-active-high;
108		pinctrl-names = "default";
109		pinctrl-0 = <&en_pp3300_dx_edp>;
110
111		vin-supply = <&pp3300_z1>;
112	};
113
114	pp3300_mcu_fp:
115	pp3300_fp_ls:
116	pp3300_fp_mcu: pp3300-fp-regulator {
117		compatible = "regulator-fixed";
118		regulator-name = "pp3300_fp";
119
120		regulator-min-microvolt = <3300000>;
121		regulator-max-microvolt = <3300000>;
122
123		regulator-boot-on;
124		regulator-always-on;
125
126		/*
127		 * WARNING: it is intentional that GPIO 77 isn't listed here.
128		 * The userspace script for updating the fingerprint firmware
129		 * needs to control the FP regulators during a FW update,
130		 * hence the signal can't be owned by the kernel regulator.
131		 */
132
133		pinctrl-names = "default";
134		pinctrl-0 = <&en_fp_rails>;
135
136		vin-supply = <&pp3300_z1>;
137		status = "disabled";
138	};
139
140	pp3300_hub: pp3300-hub-regulator {
141		compatible = "regulator-fixed";
142		regulator-name = "pp3300_hub";
143
144		regulator-min-microvolt = <3300000>;
145		regulator-max-microvolt = <3300000>;
146
147		/* The BIOS leaves this regulator on */
148		regulator-boot-on;
149
150		gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
151		enable-active-high;
152		pinctrl-names = "default";
153		pinctrl-0 = <&hub_en>;
154
155		vin-supply = <&pp3300_z1>;
156	};
157
158	pp3300_tp: pp3300-tp-regulator {
159		compatible = "regulator-fixed";
160		regulator-name = "pp3300_tp";
161
162		regulator-min-microvolt = <3300000>;
163		regulator-max-microvolt = <3300000>;
164
165		/* AP turns on with PP1800_L18B_S0; always on for AP */
166		regulator-always-on;
167		regulator-boot-on;
168
169		vin-supply = <&pp3300_z1>;
170	};
171
172	pp3300_ssd: pp3300-ssd-regulator {
173		compatible = "regulator-fixed";
174		regulator-name = "pp3300_ssd";
175
176		regulator-min-microvolt = <3300000>;
177		regulator-max-microvolt = <3300000>;
178
179		gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
180		enable-active-high;
181		pinctrl-names = "default";
182		pinctrl-0 = <&ssd_en>;
183
184		/*
185		 * The bootloaer may have left PCIe configured. Powering this
186		 * off while the PCIe clocks are still running isn't great,
187		 * so it's better to default to this regulator being on.
188		 */
189		regulator-boot-on;
190
191		vin-supply = <&pp3300_z1>;
192	};
193
194	pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
195		compatible = "regulator-fixed";
196		regulator-name = "pp2850_vcm_wf_cam";
197
198		regulator-min-microvolt = <2850000>;
199		regulator-max-microvolt = <2850000>;
200
201		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
202		enable-active-high;
203		pinctrl-names = "default";
204		pinctrl-0 = <&wf_cam_en>;
205
206		vin-supply = <&pp3300_z1>;
207		status = "disabled";
208	};
209
210	pp2850_wf_cam: pp2850-wf-cam-regulator {
211		compatible = "regulator-fixed";
212		regulator-name = "pp2850_wf_cam";
213
214		regulator-min-microvolt = <2850000>;
215		regulator-max-microvolt = <2850000>;
216
217		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
218		enable-active-high;
219		/*
220		 * The pinconf can only be referenced once so we put it on the
221		 * first regulator and comment it out here.
222		 *
223		 * pinctrl-names = "default";
224		 * pinctrl-0 = <&wf_cam_en>;
225		 */
226
227		vin-supply = <&pp3300_z1>;
228		status = "disabled";
229	};
230
231	pp1800_fp: pp1800-fp-regulator {
232		compatible = "regulator-fixed";
233		regulator-name = "pp1800_fp";
234
235		regulator-min-microvolt = <1800000>;
236		regulator-max-microvolt = <1800000>;
237
238		regulator-boot-on;
239		regulator-always-on;
240
241		/*
242		 * WARNING: it is intentional that GPIO 77 isn't listed here.
243		 * The userspace script for updating the fingerprint firmware
244		 * needs to control the FP regulators during a FW update,
245		 * hence the signal can't be owned by the kernel regulator.
246		 */
247
248		pinctrl-names = "default";
249		pinctrl-0 = <&en_fp_rails>;
250
251		vin-supply = <&pp1800_l18b_s0>;
252		status = "disabled";
253	};
254
255	pp1800_wf_cam: pp1800-wf-cam-regulator {
256		compatible = "regulator-fixed";
257		regulator-name = "pp1800_wf_cam";
258
259		regulator-min-microvolt = <1800000>;
260		regulator-max-microvolt = <1800000>;
261
262		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
263		enable-active-high;
264		/*
265		 * The pinconf can only be referenced once so we put it on the
266		 * first regulator and comment it out here.
267		 *
268		 * pinctrl-names = "default";
269		 * pinctrl-0 = <&wf_cam_en>;
270		 */
271
272		vin-supply = <&vreg_l19b_s0>;
273		status = "disabled";
274	};
275
276	pp1200_wf_cam: pp1200-wf-cam-regulator {
277		compatible = "regulator-fixed";
278		regulator-name = "pp1200_wf_cam";
279
280		regulator-min-microvolt = <1200000>;
281		regulator-max-microvolt = <1200000>;
282
283		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
284		enable-active-high;
285		/*
286		 * The pinconf can only be referenced once so we put it on the
287		 * first regulator and comment it out here.
288		 *
289		 * pinctrl-names = "default";
290		 * pinctrl-0 = <&wf_cam_en>;
291		 */
292
293		vin-supply = <&pp3300_z1>;
294		status = "disabled";
295	};
296
297	/* BOARD-SPECIFIC TOP LEVEL NODES */
298
299	max98360a: audio-codec-0 {
300		compatible = "maxim,max98360a";
301		pinctrl-names = "default";
302		pinctrl-0 = <&amp_en>;
303		sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
304		#sound-dai-cells = <0>;
305	};
306
307	pwmleds: pwmleds {
308		compatible = "pwm-leds";
309		status = "disabled";
310		keyboard_backlight: keyboard-backlight {
311			label = "cros_ec::kbd_backlight";
312			function = LED_FUNCTION_KBD_BACKLIGHT;
313			pwms = <&cros_ec_pwm 0>;
314			max-brightness = <1023>;
315		};
316	};
317};
318
319/*
320 * ADJUSTMENTS TO QCARD REGULATORS
321 *
322 * Mostly this is just board-local names for regulators that come from
323 * Qcard, but this also has some minor regulator overrides.
324 *
325 * Names are only listed here if regulators go somewhere other than a
326 * testpoint.
327 */
328
329/* From Qcard to our board; ordered by PMIC-ID / rail number */
330
331pp1256_s8b: &vreg_s8b_1p256 {};
332
333pp1800_l18b_s0: &vreg_l18b_1p8 {};
334pp1800_l18b:    &vreg_l18b_1p8 {};
335
336vreg_l19b_s0: &vreg_l19b_1p8 {};
337
338pp1800_alc5682: &vreg_l2c_1p8 {};
339pp1800_l2c:     &vreg_l2c_1p8 {};
340
341vreg_l4c: &vreg_l4c_1p8_3p0 {};
342
343ppvar_l6c: &vreg_l6c_2p96 {};
344
345pp3000_l7c: &vreg_l7c_3p0 {};
346
347pp1800_prox: &vreg_l8c_1p8 {};
348pp1800_l8c:  &vreg_l8c_1p8 {};
349
350pp2950_l9c: &vreg_l9c_2p96 {};
351
352pp1800_lcm:  &vreg_l12c_1p8 {};
353pp1800_mipi: &vreg_l12c_1p8 {};
354pp1800_l12c: &vreg_l12c_1p8 {};
355
356pp3300_lcm:  &vreg_l13c_3p0 {};
357pp3300_mipi: &vreg_l13c_3p0 {};
358pp3300_l13c: &vreg_l13c_3p0 {};
359
360/* From our board to Qcard; ordered same as node definition above */
361
362vreg_edp_bl: &ppvar_sys {};
363
364ts_avdd:      &pp3300_left_in_mlb {};
365vreg_edp_3p3: &pp3300_left_in_mlb {};
366
367/* Regulator overrides from Qcard */
368
369/*
370 * Herobrine boards only use l2c to power an external audio codec (like
371 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
372 */
373&vreg_l2c_1p8 {
374	regulator-min-microvolt = <1800000>;
375};
376
377/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
378
379&edp_panel {
380	/* Our board provides power to the qcard for the eDP panel. */
381	power-supply = <&vreg_edp_3p3>;
382};
383
384ap_sar_sensor_i2c: &i2c1 {
385	clock-frequency = <400000>;
386	status = "disabled";
387
388	ap_sar_sensor0: proximity@28 {
389		compatible = "semtech,sx9324";
390		reg = <0x28>;
391		#io-channel-cells = <1>;
392		pinctrl-names = "default";
393		pinctrl-0 = <&sar0_irq_odl>;
394
395		interrupt-parent = <&tlmm>;
396		interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
397
398		vdd-supply = <&pp1800_prox>;
399
400		label = "proximity-wifi_cellular-0";
401		status = "disabled";
402	};
403
404	ap_sar_sensor1: proximity@2c {
405		compatible = "semtech,sx9324";
406		reg = <0x2c>;
407		#io-channel-cells = <1>;
408		pinctrl-names = "default";
409		pinctrl-0 = <&sar1_irq_odl>;
410
411		interrupt-parent = <&tlmm>;
412		interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
413
414		vdd-supply = <&pp1800_prox>;
415
416		label = "proximity-wifi_cellular-1";
417		status = "disabled";
418	};
419};
420
421ap_i2c_tpm: &i2c14 {
422	status = "okay";
423	clock-frequency = <400000>;
424
425	tpm@50 {
426		compatible = "google,cr50";
427		reg = <0x50>;
428
429		pinctrl-names = "default";
430		pinctrl-0 = <&gsc_ap_int_odl>;
431
432		interrupt-parent = <&tlmm>;
433		interrupts = <104 IRQ_TYPE_EDGE_RISING>;
434	};
435};
436
437&mdss {
438	status = "okay";
439};
440
441&mdss_dp {
442	status = "okay";
443	pinctrl-names = "default";
444	pinctrl-0 = <&dp_hot_plug_det>;
445	data-lanes = <0 1>;
446};
447
448&mdss_mdp {
449	status = "okay";
450};
451
452/* NVMe drive, enabled on a per-board basis */
453&pcie1 {
454	pinctrl-names = "default";
455	pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
456
457	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
458	vddpe-3v3-supply = <&pp3300_ssd>;
459};
460
461&pm8350c_pwm {
462	status = "okay";
463};
464
465&pm8350c_pwm_backlight {
466	status = "okay";
467
468	/* Our board provides power to the qcard for the backlight */
469	power-supply = <&vreg_edp_bl>;
470};
471
472&pmk8350_rtc {
473	status = "disabled";
474};
475
476&qupv3_id_0 {
477	status = "okay";
478};
479
480&qupv3_id_1 {
481	status = "okay";
482};
483
484/* SD Card, enabled on a per-board basis */
485&sdhc_2 {
486	pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
487	pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
488
489	vmmc-supply = <&pp2950_l9c>;
490	vqmmc-supply = <&ppvar_l6c>;
491
492	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
493};
494
495&spi_flash {
496	spi-max-frequency = <50000000>;
497};
498
499/* Fingerprint, enabled on a per-board basis */
500ap_spi_fp: &spi9 {
501	pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
502
503	cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
504
505	cros_ec_fp: ec@0 {
506		compatible = "google,cros-ec-spi";
507		reg = <0>;
508		interrupt-parent = <&tlmm>;
509		interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
510		pinctrl-names = "default";
511		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
512		spi-max-frequency = <3000000>;
513	};
514};
515
516ap_ec_spi: &spi10 {
517	status = "okay";
518	pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
519
520	cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
521
522	cros_ec: ec@0 {
523		compatible = "google,cros-ec-spi";
524		reg = <0>;
525		interrupt-parent = <&tlmm>;
526		interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
527		pinctrl-names = "default";
528		pinctrl-0 = <&ap_ec_int_l>;
529		spi-max-frequency = <3000000>;
530
531		cros_ec_pwm: pwm {
532			compatible = "google,cros-ec-pwm";
533			#pwm-cells = <1>;
534		};
535
536		i2c_tunnel: i2c-tunnel {
537			compatible = "google,cros-ec-i2c-tunnel";
538			google,remote-bus = <0>;
539			#address-cells = <1>;
540			#size-cells = <0>;
541		};
542
543		typec {
544			compatible = "google,cros-ec-typec";
545			#address-cells = <1>;
546			#size-cells = <0>;
547
548			usb_c0: connector@0 {
549				compatible = "usb-c-connector";
550				reg = <0>;
551				label = "left";
552				power-role = "dual";
553				data-role = "host";
554				try-power-role = "source";
555			};
556
557			usb_c1: connector@1 {
558				compatible = "usb-c-connector";
559				reg = <1>;
560				label = "right";
561				power-role = "dual";
562				data-role = "host";
563				try-power-role = "source";
564			};
565		};
566	};
567};
568
569#include <arm/cros-ec-keyboard.dtsi>
570#include <arm/cros-ec-sbs.dtsi>
571
572&keyboard_controller {
573	function-row-physmap = <
574		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */
575		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */
576		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */
577		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */
578		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */
579		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */
580		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */
581		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */
582		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */
583		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */
584	>;
585	linux,keymap = <
586		MATRIX_KEY(0x00, 0x02, KEY_BACK)
587		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
588		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
589		MATRIX_KEY(0x01, 0x02, KEY_SCALE)
590		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
591		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
592		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
593		MATRIX_KEY(0x02, 0x09, KEY_MUTE)
594		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
595		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
596
597		CROS_STD_MAIN_KEYMAP
598	>;
599};
600
601&usb_1 {
602	status = "okay";
603};
604
605&usb_1_dwc3 {
606	dr_mode = "host";
607
608	#address-cells = <1>;
609	#size-cells = <0>;
610
611	/* 2.x hub on port 1 */
612	usb_hub_2_x: hub@1 {
613		compatible = "usbbda,5411";
614		reg = <1>;
615		vdd-supply = <&pp3300_hub>;
616		peer-hub = <&usb_hub_3_x>;
617	};
618
619	/* 3.x hub on port 2 */
620	usb_hub_3_x: hub@2 {
621		compatible = "usbbda,411";
622		reg = <2>;
623		vdd-supply = <&pp3300_hub>;
624		peer-hub = <&usb_hub_2_x>;
625	};
626};
627
628&usb_1_hsphy {
629	status = "okay";
630};
631
632&usb_1_qmpphy {
633	status = "okay";
634};
635
636/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
637
638&dp_hot_plug_det {
639	bias-disable;
640};
641
642&pcie1_clkreq_n {
643	bias-pull-up;
644	drive-strength = <2>;
645};
646
647&qspi_cs0 {
648	bias-disable;
649	drive-strength = <8>;
650};
651
652&qspi_clk {
653	bias-disable;
654	drive-strength = <8>;
655};
656
657&qspi_data01 {
658	/* High-Z when no transfers; nice to park the lines */
659	bias-pull-up;
660	drive-strength = <8>;
661};
662
663/* For ap_tp_i2c */
664&qup_i2c0_data_clk {
665	/* Has external pull */
666	bias-disable;
667	drive-strength = <2>;
668};
669
670/* For ap_i2c_tpm */
671&qup_i2c14_data_clk {
672	/* Has external pull */
673	bias-disable;
674	drive-strength = <2>;
675};
676
677/* For ap_spi_fp */
678&qup_spi9_data_clk {
679	bias-disable;
680	drive-strength = <2>;
681};
682
683/* For ap_spi_fp */
684&qup_spi9_cs_gpio {
685	bias-disable;
686	drive-strength = <2>;
687};
688
689/* For ap_ec_spi */
690&qup_spi10_data_clk {
691	bias-disable;
692	drive-strength = <2>;
693};
694
695/* For ap_ec_spi */
696&qup_spi10_cs_gpio {
697	bias-disable;
698	drive-strength = <2>;
699};
700
701/* For uart_dbg */
702&qup_uart5_rx {
703	bias-pull-up;
704};
705
706/* For uart_dbg */
707&qup_uart5_tx {
708	bias-disable;
709	drive-strength = <2>;
710};
711
712&sdc2_clk {
713	bias-disable;
714	drive-strength = <16>;
715};
716
717&sdc2_cmd {
718	bias-pull-up;
719	drive-strength = <10>;
720};
721
722&sdc2_data {
723	bias-pull-up;
724	drive-strength = <10>;
725};
726
727/* PINCTRL - board-specific pinctrl */
728
729&pm7325_gpios {
730	/*
731	 * On a quick glance it might look like KYPD_VOL_UP_N is used, but
732	 * that only passes through to a debug connector and not to the actual
733	 * volume up key.
734	 */
735	status = "disabled"; /* No GPIOs are connected */
736};
737
738&pmk8350_gpios {
739	status = "disabled"; /* No GPIOs are connected */
740};
741
742&tlmm {
743	/* pinctrl settings for pins that have no real owners. */
744	pinctrl-names = "default";
745	pinctrl-0 = <&bios_flash_wp_od>;
746
747	amp_en: amp-en-pins {
748		pins = "gpio63";
749		function = "gpio";
750		bias-disable;
751		drive-strength = <2>;
752	};
753
754	ap_ec_int_l: ap-ec-int-l-pins {
755		pins = "gpio18";
756		function = "gpio";
757		bias-pull-up;
758	};
759
760	bios_flash_wp_od: bios-flash-wp-od-pins {
761		pins = "gpio16";
762		function = "gpio";
763		/* Has external pull */
764		bias-disable;
765	};
766
767	en_fp_rails: en-fp-rails-pins {
768		pins = "gpio77";
769		function = "gpio";
770		bias-disable;
771		drive-strength = <2>;
772		output-high;
773	};
774
775	en_pp3300_codec: en-pp3300-codec-pins {
776		pins = "gpio105";
777		function = "gpio";
778		bias-disable;
779		drive-strength = <2>;
780	};
781
782	en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
783		pins = "gpio80";
784		function = "gpio";
785		bias-disable;
786		drive-strength = <2>;
787	};
788
789	fp_rst_l: fp-rst-l-pins {
790		pins = "gpio78";
791		function = "gpio";
792		bias-disable;
793		drive-strength = <2>;
794	};
795
796	fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
797		pins = "gpio61";
798		function = "gpio";
799		/* Has external pullup */
800		bias-disable;
801	};
802
803	fpmcu_boot0: fpmcu-boot0-pins {
804		pins = "gpio68";
805		function = "gpio";
806		bias-disable;
807	};
808
809	gsc_ap_int_odl: gsc-ap-int-odl-pins {
810		pins = "gpio104";
811		function = "gpio";
812		bias-pull-up;
813	};
814
815	hp_irq: hp-irq-pins {
816		pins = "gpio101";
817		function = "gpio";
818		bias-pull-up;
819	};
820
821	hub_en: hub-en-pins {
822		pins = "gpio157";
823		function = "gpio";
824		bias-disable;
825		drive-strength = <2>;
826	};
827
828	pe_wake_odl: pe-wake-odl-pins {
829		pins = "gpio3";
830		function = "gpio";
831		/* Has external pull */
832		bias-disable;
833		drive-strength = <2>;
834	};
835
836	/* For ap_spi_fp */
837	qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
838		pins = "gpio39";
839		function = "gpio";
840		output-high;
841	};
842
843	/* For ap_ec_spi */
844	qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
845		pins = "gpio43";
846		function = "gpio";
847		output-high;
848	};
849
850	sar0_irq_odl: sar0-irq-odl-pins {
851		pins = "gpio141";
852		function = "gpio";
853		bias-pull-up;
854	};
855
856	sar1_irq_odl: sar1-irq-odl-pins {
857		pins = "gpio140";
858		function = "gpio";
859		bias-pull-up;
860	};
861
862	sd_cd_odl: sd-cd-odl-pins {
863		pins = "gpio91";
864		function = "gpio";
865		bias-pull-up;
866	};
867
868	ssd_en: ssd-en-pins {
869		pins = "gpio51";
870		function = "gpio";
871		bias-disable;
872		drive-strength = <2>;
873	};
874
875	ssd_rst_l: ssd-rst-l-pins {
876		pins = "gpio2";
877		function = "gpio";
878		bias-disable;
879		drive-strength = <2>;
880		output-low;
881	};
882
883	tp_int_odl: tp-int-odl-pins {
884		pins = "gpio7";
885		function = "gpio";
886		/* Has external pullup */
887		bias-disable;
888	};
889
890	wf_cam_en: wf-cam-en-pins {
891		pins = "gpio119";
892		function = "gpio";
893		/* Has external pulldown */
894		bias-disable;
895		drive-strength = <2>;
896	};
897};
898