1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * HWMON driver for ASUS motherboards that publish some sensor values 4 * via the embedded controller registers. 5 * 6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com> 7 8 * EC provides: 9 * - Chipset temperature 10 * - CPU temperature 11 * - Motherboard temperature 12 * - T_Sensor temperature 13 * - VRM temperature 14 * - Water In temperature 15 * - Water Out temperature 16 * - CPU Optional fan RPM 17 * - Chipset fan RPM 18 * - VRM Heat Sink fan RPM 19 * - Water Flow fan RPM 20 * - CPU current 21 * - CPU core voltage 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/bitops.h> 26 #include <linux/dev_printk.h> 27 #include <linux/dmi.h> 28 #include <linux/hwmon.h> 29 #include <linux/init.h> 30 #include <linux/jiffies.h> 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/platform_device.h> 34 #include <linux/sort.h> 35 #include <linux/units.h> 36 37 #include <asm/unaligned.h> 38 39 static char *mutex_path_override; 40 41 /* Writing to this EC register switches EC bank */ 42 #define ASUS_EC_BANK_REGISTER 0xff 43 #define SENSOR_LABEL_LEN 16 44 45 /* 46 * Arbitrary set max. allowed bank number. Required for sorting banks and 47 * currently is overkill with just 2 banks used at max, but for the sake 48 * of alignment let's set it to a higher value. 49 */ 50 #define ASUS_EC_MAX_BANK 3 51 52 #define ACPI_LOCK_DELAY_MS 500 53 54 /* ACPI mutex for locking access to the EC for the firmware */ 55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX" 56 57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" 58 59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0" 60 61 #define MAX_IDENTICAL_BOARD_VARIATIONS 3 62 63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */ 64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK" 65 66 typedef union { 67 u32 value; 68 struct { 69 u8 index; 70 u8 bank; 71 u8 size; 72 u8 dummy; 73 } components; 74 } sensor_address; 75 76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \ 77 .value = (size << 16) + (bank << 8) + index \ 78 } 79 80 static u32 hwmon_attributes[hwmon_max] = { 81 [hwmon_chip] = HWMON_C_REGISTER_TZ, 82 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, 83 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, 84 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL, 85 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL, 86 }; 87 88 struct ec_sensor_info { 89 char label[SENSOR_LABEL_LEN]; 90 enum hwmon_sensor_types type; 91 sensor_address addr; 92 }; 93 94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \ 95 .label = sensor_label, .type = sensor_type, \ 96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \ 97 } 98 99 enum ec_sensors { 100 /* chipset temperature [℃] */ 101 ec_sensor_temp_chipset, 102 /* CPU temperature [℃] */ 103 ec_sensor_temp_cpu, 104 /* motherboard temperature [℃] */ 105 ec_sensor_temp_mb, 106 /* "T_Sensor" temperature sensor reading [℃] */ 107 ec_sensor_temp_t_sensor, 108 /* VRM temperature [℃] */ 109 ec_sensor_temp_vrm, 110 /* CPU Core voltage [mV] */ 111 ec_sensor_in_cpu_core, 112 /* CPU_Opt fan [RPM] */ 113 ec_sensor_fan_cpu_opt, 114 /* VRM heat sink fan [RPM] */ 115 ec_sensor_fan_vrm_hs, 116 /* Chipset fan [RPM] */ 117 ec_sensor_fan_chipset, 118 /* Water flow sensor reading [RPM] */ 119 ec_sensor_fan_water_flow, 120 /* CPU current [A] */ 121 ec_sensor_curr_cpu, 122 /* "Water_In" temperature sensor reading [℃] */ 123 ec_sensor_temp_water_in, 124 /* "Water_Out" temperature sensor reading [℃] */ 125 ec_sensor_temp_water_out, 126 /* "Water_Block_In" temperature sensor reading [℃] */ 127 ec_sensor_temp_water_block_in, 128 /* "Water_Block_Out" temperature sensor reading [℃] */ 129 ec_sensor_temp_water_block_out, 130 /* "T_sensor_2" temperature sensor reading [℃] */ 131 ec_sensor_temp_t_sensor_2, 132 /* "Extra_1" temperature sensor reading [℃] */ 133 ec_sensor_temp_sensor_extra_1, 134 /* "Extra_2" temperature sensor reading [℃] */ 135 ec_sensor_temp_sensor_extra_2, 136 /* "Extra_3" temperature sensor reading [℃] */ 137 ec_sensor_temp_sensor_extra_3, 138 }; 139 140 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) 141 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu) 142 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb) 143 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor) 144 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm) 145 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core) 146 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt) 147 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs) 148 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset) 149 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow) 150 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) 151 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) 152 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) 153 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) 154 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) 155 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) 156 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) 157 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) 158 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) 159 160 enum board_family { 161 family_unknown, 162 family_amd_400_series, 163 family_amd_500_series, 164 family_intel_300_series, 165 family_intel_600_series 166 }; 167 168 /* All the known sensors for ASUS EC controllers */ 169 static const struct ec_sensor_info sensors_family_amd_400[] = { 170 [ec_sensor_temp_chipset] = 171 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 172 [ec_sensor_temp_cpu] = 173 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 174 [ec_sensor_temp_mb] = 175 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 176 [ec_sensor_temp_t_sensor] = 177 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 178 [ec_sensor_temp_vrm] = 179 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 180 [ec_sensor_in_cpu_core] = 181 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 182 [ec_sensor_fan_cpu_opt] = 183 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc), 184 [ec_sensor_fan_vrm_hs] = 185 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 186 [ec_sensor_fan_chipset] = 187 /* no chipset fans in this generation */ 188 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00), 189 [ec_sensor_fan_water_flow] = 190 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4), 191 [ec_sensor_curr_cpu] = 192 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 193 [ec_sensor_temp_water_in] = 194 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d), 195 [ec_sensor_temp_water_out] = 196 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b), 197 }; 198 199 static const struct ec_sensor_info sensors_family_amd_500[] = { 200 [ec_sensor_temp_chipset] = 201 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 202 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 203 [ec_sensor_temp_mb] = 204 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 205 [ec_sensor_temp_t_sensor] = 206 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 207 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 208 [ec_sensor_in_cpu_core] = 209 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 210 [ec_sensor_fan_cpu_opt] = 211 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 212 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 213 [ec_sensor_fan_chipset] = 214 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4), 215 [ec_sensor_fan_water_flow] = 216 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 217 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 218 [ec_sensor_temp_water_in] = 219 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 220 [ec_sensor_temp_water_out] = 221 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 222 [ec_sensor_temp_water_block_in] = 223 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), 224 [ec_sensor_temp_water_block_out] = 225 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), 226 [ec_sensor_temp_sensor_extra_1] = 227 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), 228 [ec_sensor_temp_t_sensor_2] = 229 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), 230 [ec_sensor_temp_sensor_extra_2] = 231 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), 232 [ec_sensor_temp_sensor_extra_3] = 233 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), 234 }; 235 236 static const struct ec_sensor_info sensors_family_intel_300[] = { 237 [ec_sensor_temp_chipset] = 238 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 239 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 240 [ec_sensor_temp_mb] = 241 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 242 [ec_sensor_temp_t_sensor] = 243 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 244 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 245 [ec_sensor_fan_cpu_opt] = 246 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 247 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 248 [ec_sensor_fan_water_flow] = 249 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 250 [ec_sensor_temp_water_in] = 251 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 252 [ec_sensor_temp_water_out] = 253 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 254 }; 255 256 static const struct ec_sensor_info sensors_family_intel_600[] = { 257 [ec_sensor_temp_t_sensor] = 258 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 259 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 260 }; 261 262 /* Shortcuts for common combinations */ 263 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \ 264 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) 265 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT) 266 #define SENSOR_SET_WATER_BLOCK \ 267 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) 268 269 struct ec_board_info { 270 unsigned long sensors; 271 /* 272 * Defines which mutex to use for guarding access to the state and the 273 * hardware. Can be either a full path to an AML mutex or the 274 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock, 275 * or left empty to use a regular mutex object, in which case access to 276 * the hardware is not guarded. 277 */ 278 const char *mutex_path; 279 enum board_family family; 280 }; 281 282 static const struct ec_board_info board_info_prime_x470_pro = { 283 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 284 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 285 SENSOR_FAN_CPU_OPT | 286 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 287 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 288 .family = family_amd_400_series, 289 }; 290 291 static const struct ec_board_info board_info_prime_x570_pro = { 292 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 293 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 294 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 295 .family = family_amd_500_series, 296 }; 297 298 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = { 299 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 300 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT | 301 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 302 .family = family_amd_500_series, 303 }; 304 305 static const struct ec_board_info board_info_pro_ws_x570_ace = { 306 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 307 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET | 308 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 309 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 310 .family = family_amd_500_series, 311 }; 312 313 static const struct ec_board_info board_info_crosshair_viii_dark_hero = { 314 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 315 SENSOR_TEMP_T_SENSOR | 316 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 317 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW | 318 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 319 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 320 .family = family_amd_500_series, 321 }; 322 323 static const struct ec_board_info board_info_crosshair_viii_hero = { 324 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 325 SENSOR_TEMP_T_SENSOR | 326 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 327 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | 328 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | 329 SENSOR_IN_CPU_CORE, 330 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 331 .family = family_amd_500_series, 332 }; 333 334 static const struct ec_board_info board_info_maximus_xi_hero = { 335 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 336 SENSOR_TEMP_T_SENSOR | 337 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 338 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW, 339 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 340 .family = family_intel_300_series, 341 }; 342 343 static const struct ec_board_info board_info_crosshair_viii_impact = { 344 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 345 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 346 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 347 SENSOR_IN_CPU_CORE, 348 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 349 .family = family_amd_500_series, 350 }; 351 352 static const struct ec_board_info board_info_strix_b550_e_gaming = { 353 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 354 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 355 SENSOR_FAN_CPU_OPT, 356 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 357 .family = family_amd_500_series, 358 }; 359 360 static const struct ec_board_info board_info_strix_b550_i_gaming = { 361 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 362 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 363 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU | 364 SENSOR_IN_CPU_CORE, 365 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 366 .family = family_amd_500_series, 367 }; 368 369 static const struct ec_board_info board_info_strix_x570_e_gaming = { 370 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 371 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 372 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 373 SENSOR_IN_CPU_CORE, 374 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 375 .family = family_amd_500_series, 376 }; 377 378 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = { 379 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 380 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU | 381 SENSOR_IN_CPU_CORE, 382 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 383 .family = family_amd_500_series, 384 }; 385 386 static const struct ec_board_info board_info_strix_x570_f_gaming = { 387 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 388 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 389 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 390 .family = family_amd_500_series, 391 }; 392 393 static const struct ec_board_info board_info_strix_x570_i_gaming = { 394 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 395 SENSOR_TEMP_T_SENSOR | 396 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET | 397 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 398 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 399 .family = family_amd_500_series, 400 }; 401 402 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = { 403 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM, 404 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 405 .family = family_intel_600_series, 406 }; 407 408 static const struct ec_board_info board_info_zenith_ii_extreme = { 409 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | 410 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 411 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | 412 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | 413 SENSOR_SET_WATER_BLOCK | 414 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | 415 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, 416 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, 417 .family = family_amd_500_series, 418 }; 419 420 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \ 421 { \ 422 .matches = { \ 423 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \ 424 "ASUSTeK COMPUTER INC."), \ 425 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \ 426 }, \ 427 .driver_data = (void *)board_info, \ 428 } 429 430 static const struct dmi_system_id dmi_table[] = { 431 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO", 432 &board_info_prime_x470_pro), 433 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO", 434 &board_info_prime_x570_pro), 435 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI", 436 &board_info_pro_art_x570_creator_wifi), 437 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE", 438 &board_info_pro_ws_x570_ace), 439 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO", 440 &board_info_crosshair_viii_dark_hero), 441 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA", 442 &board_info_crosshair_viii_hero), 443 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO", 444 &board_info_crosshair_viii_hero), 445 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)", 446 &board_info_crosshair_viii_hero), 447 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO", 448 &board_info_maximus_xi_hero), 449 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)", 450 &board_info_maximus_xi_hero), 451 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT", 452 &board_info_crosshair_viii_impact), 453 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING", 454 &board_info_strix_b550_e_gaming), 455 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING", 456 &board_info_strix_b550_i_gaming), 457 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING", 458 &board_info_strix_x570_e_gaming), 459 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II", 460 &board_info_strix_x570_e_gaming_wifi_ii), 461 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING", 462 &board_info_strix_x570_f_gaming), 463 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING", 464 &board_info_strix_x570_i_gaming), 465 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4", 466 &board_info_strix_z690_a_gaming_wifi_d4), 467 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME", 468 &board_info_zenith_ii_extreme), 469 {}, 470 }; 471 472 struct ec_sensor { 473 unsigned int info_index; 474 s32 cached_value; 475 }; 476 477 struct lock_data { 478 union { 479 acpi_handle aml; 480 /* global lock handle */ 481 u32 glk; 482 } mutex; 483 bool (*lock)(struct lock_data *data); 484 bool (*unlock)(struct lock_data *data); 485 }; 486 487 /* 488 * The next function pairs implement options for locking access to the 489 * state and the EC 490 */ 491 static bool lock_via_acpi_mutex(struct lock_data *data) 492 { 493 /* 494 * ASUS DSDT does not specify that access to the EC has to be guarded, 495 * but firmware does access it via ACPI 496 */ 497 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml, 498 NULL, ACPI_LOCK_DELAY_MS)); 499 } 500 501 static bool unlock_acpi_mutex(struct lock_data *data) 502 { 503 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL)); 504 } 505 506 static bool lock_via_global_acpi_lock(struct lock_data *data) 507 { 508 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, 509 &data->mutex.glk)); 510 } 511 512 static bool unlock_global_acpi_lock(struct lock_data *data) 513 { 514 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk)); 515 } 516 517 struct ec_sensors_data { 518 const struct ec_board_info *board_info; 519 const struct ec_sensor_info *sensors_info; 520 struct ec_sensor *sensors; 521 /* EC registers to read from */ 522 u16 *registers; 523 u8 *read_buffer; 524 /* sorted list of unique register banks */ 525 u8 banks[ASUS_EC_MAX_BANK + 1]; 526 /* in jiffies */ 527 unsigned long last_updated; 528 struct lock_data lock_data; 529 /* number of board EC sensors */ 530 u8 nr_sensors; 531 /* 532 * number of EC registers to read 533 * (sensor might span more than 1 register) 534 */ 535 u8 nr_registers; 536 /* number of unique register banks */ 537 u8 nr_banks; 538 }; 539 540 static u8 register_bank(u16 reg) 541 { 542 return reg >> 8; 543 } 544 545 static u8 register_index(u16 reg) 546 { 547 return reg & 0x00ff; 548 } 549 550 static bool is_sensor_data_signed(const struct ec_sensor_info *si) 551 { 552 /* 553 * guessed from WMI functions in DSDT code for boards 554 * of the X470 generation 555 */ 556 return si->type == hwmon_temp; 557 } 558 559 static const struct ec_sensor_info * 560 get_sensor_info(const struct ec_sensors_data *state, int index) 561 { 562 return state->sensors_info + state->sensors[index].info_index; 563 } 564 565 static int find_ec_sensor_index(const struct ec_sensors_data *ec, 566 enum hwmon_sensor_types type, int channel) 567 { 568 unsigned int i; 569 570 for (i = 0; i < ec->nr_sensors; i++) { 571 if (get_sensor_info(ec, i)->type == type) { 572 if (channel == 0) 573 return i; 574 channel--; 575 } 576 } 577 return -ENOENT; 578 } 579 580 static int bank_compare(const void *a, const void *b) 581 { 582 return *((const s8 *)a) - *((const s8 *)b); 583 } 584 585 static void setup_sensor_data(struct ec_sensors_data *ec) 586 { 587 struct ec_sensor *s = ec->sensors; 588 bool bank_found; 589 int i, j; 590 u8 bank; 591 592 ec->nr_banks = 0; 593 ec->nr_registers = 0; 594 595 for_each_set_bit(i, &ec->board_info->sensors, 596 BITS_PER_TYPE(ec->board_info->sensors)) { 597 s->info_index = i; 598 s->cached_value = 0; 599 ec->nr_registers += 600 ec->sensors_info[s->info_index].addr.components.size; 601 bank_found = false; 602 bank = ec->sensors_info[s->info_index].addr.components.bank; 603 for (j = 0; j < ec->nr_banks; j++) { 604 if (ec->banks[j] == bank) { 605 bank_found = true; 606 break; 607 } 608 } 609 if (!bank_found) { 610 ec->banks[ec->nr_banks++] = bank; 611 } 612 s++; 613 } 614 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL); 615 } 616 617 static void fill_ec_registers(struct ec_sensors_data *ec) 618 { 619 const struct ec_sensor_info *si; 620 unsigned int i, j, register_idx = 0; 621 622 for (i = 0; i < ec->nr_sensors; ++i) { 623 si = get_sensor_info(ec, i); 624 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) { 625 ec->registers[register_idx] = 626 (si->addr.components.bank << 8) + 627 si->addr.components.index + j; 628 } 629 } 630 } 631 632 static int setup_lock_data(struct device *dev) 633 { 634 const char *mutex_path; 635 int status; 636 struct ec_sensors_data *state = dev_get_drvdata(dev); 637 638 mutex_path = mutex_path_override ? 639 mutex_path_override : state->board_info->mutex_path; 640 641 if (!mutex_path || !strlen(mutex_path)) { 642 dev_err(dev, "Hardware access guard mutex name is empty"); 643 return -EINVAL; 644 } 645 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) { 646 state->lock_data.mutex.glk = 0; 647 state->lock_data.lock = lock_via_global_acpi_lock; 648 state->lock_data.unlock = unlock_global_acpi_lock; 649 } else { 650 status = acpi_get_handle(NULL, (acpi_string)mutex_path, 651 &state->lock_data.mutex.aml); 652 if (ACPI_FAILURE(status)) { 653 dev_err(dev, 654 "Failed to get hardware access guard AML mutex '%s': error %d", 655 mutex_path, status); 656 return -ENOENT; 657 } 658 state->lock_data.lock = lock_via_acpi_mutex; 659 state->lock_data.unlock = unlock_acpi_mutex; 660 } 661 return 0; 662 } 663 664 static int asus_ec_bank_switch(u8 bank, u8 *old) 665 { 666 int status = 0; 667 668 if (old) { 669 status = ec_read(ASUS_EC_BANK_REGISTER, old); 670 } 671 if (status || (old && (*old == bank))) 672 return status; 673 return ec_write(ASUS_EC_BANK_REGISTER, bank); 674 } 675 676 static int asus_ec_block_read(const struct device *dev, 677 struct ec_sensors_data *ec) 678 { 679 int ireg, ibank, status; 680 u8 bank, reg_bank, prev_bank; 681 682 bank = 0; 683 status = asus_ec_bank_switch(bank, &prev_bank); 684 if (status) { 685 dev_warn(dev, "EC bank switch failed"); 686 return status; 687 } 688 689 if (prev_bank) { 690 /* oops... somebody else is working with the EC too */ 691 dev_warn(dev, 692 "Concurrent access to the ACPI EC detected.\nRace condition possible."); 693 } 694 695 /* read registers minimizing bank switches. */ 696 for (ibank = 0; ibank < ec->nr_banks; ibank++) { 697 if (bank != ec->banks[ibank]) { 698 bank = ec->banks[ibank]; 699 if (asus_ec_bank_switch(bank, NULL)) { 700 dev_warn(dev, "EC bank switch to %d failed", 701 bank); 702 break; 703 } 704 } 705 for (ireg = 0; ireg < ec->nr_registers; ireg++) { 706 reg_bank = register_bank(ec->registers[ireg]); 707 if (reg_bank < bank) { 708 continue; 709 } 710 ec_read(register_index(ec->registers[ireg]), 711 ec->read_buffer + ireg); 712 } 713 } 714 715 status = asus_ec_bank_switch(prev_bank, NULL); 716 return status; 717 } 718 719 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data) 720 { 721 if (is_sensor_data_signed(si)) { 722 switch (si->addr.components.size) { 723 case 1: 724 return (s8)*data; 725 case 2: 726 return (s16)get_unaligned_be16(data); 727 case 4: 728 return (s32)get_unaligned_be32(data); 729 default: 730 return 0; 731 } 732 } else { 733 switch (si->addr.components.size) { 734 case 1: 735 return *data; 736 case 2: 737 return get_unaligned_be16(data); 738 case 4: 739 return get_unaligned_be32(data); 740 default: 741 return 0; 742 } 743 } 744 } 745 746 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data) 747 { 748 const struct ec_sensor_info *si; 749 struct ec_sensor *s, *sensor_end; 750 751 sensor_end = ec->sensors + ec->nr_sensors; 752 for (s = ec->sensors; s != sensor_end; s++) { 753 si = ec->sensors_info + s->info_index; 754 s->cached_value = get_sensor_value(si, data); 755 data += si->addr.components.size; 756 } 757 } 758 759 static int update_ec_sensors(const struct device *dev, 760 struct ec_sensors_data *ec) 761 { 762 int status; 763 764 if (!ec->lock_data.lock(&ec->lock_data)) { 765 dev_warn(dev, "Failed to acquire mutex"); 766 return -EBUSY; 767 } 768 769 status = asus_ec_block_read(dev, ec); 770 771 if (!status) { 772 update_sensor_values(ec, ec->read_buffer); 773 } 774 775 if (!ec->lock_data.unlock(&ec->lock_data)) 776 dev_err(dev, "Failed to release mutex"); 777 778 return status; 779 } 780 781 static long scale_sensor_value(s32 value, int data_type) 782 { 783 switch (data_type) { 784 case hwmon_curr: 785 case hwmon_temp: 786 return value * MILLI; 787 default: 788 return value; 789 } 790 } 791 792 static int get_cached_value_or_update(const struct device *dev, 793 int sensor_index, 794 struct ec_sensors_data *state, s32 *value) 795 { 796 if (time_after(jiffies, state->last_updated + HZ)) { 797 if (update_ec_sensors(dev, state)) { 798 dev_err(dev, "update_ec_sensors() failure\n"); 799 return -EIO; 800 } 801 802 state->last_updated = jiffies; 803 } 804 805 *value = state->sensors[sensor_index].cached_value; 806 return 0; 807 } 808 809 /* 810 * Now follow the functions that implement the hwmon interface 811 */ 812 813 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 814 u32 attr, int channel, long *val) 815 { 816 int ret; 817 s32 value = 0; 818 819 struct ec_sensors_data *state = dev_get_drvdata(dev); 820 int sidx = find_ec_sensor_index(state, type, channel); 821 822 if (sidx < 0) { 823 return sidx; 824 } 825 826 ret = get_cached_value_or_update(dev, sidx, state, &value); 827 if (!ret) { 828 *val = scale_sensor_value(value, 829 get_sensor_info(state, sidx)->type); 830 } 831 832 return ret; 833 } 834 835 static int asus_ec_hwmon_read_string(struct device *dev, 836 enum hwmon_sensor_types type, u32 attr, 837 int channel, const char **str) 838 { 839 struct ec_sensors_data *state = dev_get_drvdata(dev); 840 int sensor_index = find_ec_sensor_index(state, type, channel); 841 *str = get_sensor_info(state, sensor_index)->label; 842 843 return 0; 844 } 845 846 static umode_t asus_ec_hwmon_is_visible(const void *drvdata, 847 enum hwmon_sensor_types type, u32 attr, 848 int channel) 849 { 850 const struct ec_sensors_data *state = drvdata; 851 852 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0; 853 } 854 855 static int 856 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan, 857 struct device *dev, int num, 858 enum hwmon_sensor_types type, u32 config) 859 { 860 int i; 861 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL); 862 863 if (!cfg) 864 return -ENOMEM; 865 866 asus_ec_hwmon_chan->type = type; 867 asus_ec_hwmon_chan->config = cfg; 868 for (i = 0; i < num; i++, cfg++) 869 *cfg = config; 870 871 return 0; 872 } 873 874 static const struct hwmon_ops asus_ec_hwmon_ops = { 875 .is_visible = asus_ec_hwmon_is_visible, 876 .read = asus_ec_hwmon_read, 877 .read_string = asus_ec_hwmon_read_string, 878 }; 879 880 static struct hwmon_chip_info asus_ec_chip_info = { 881 .ops = &asus_ec_hwmon_ops, 882 }; 883 884 static const struct ec_board_info *get_board_info(void) 885 { 886 const struct dmi_system_id *dmi_entry; 887 888 dmi_entry = dmi_first_match(dmi_table); 889 return dmi_entry ? dmi_entry->driver_data : NULL; 890 } 891 892 static int asus_ec_probe(struct platform_device *pdev) 893 { 894 const struct hwmon_channel_info **ptr_asus_ec_ci; 895 int nr_count[hwmon_max] = { 0 }, nr_types = 0; 896 struct hwmon_channel_info *asus_ec_hwmon_chan; 897 const struct ec_board_info *pboard_info; 898 const struct hwmon_chip_info *chip_info; 899 struct device *dev = &pdev->dev; 900 struct ec_sensors_data *ec_data; 901 const struct ec_sensor_info *si; 902 enum hwmon_sensor_types type; 903 struct device *hwdev; 904 unsigned int i; 905 int status; 906 907 pboard_info = get_board_info(); 908 if (!pboard_info) 909 return -ENODEV; 910 911 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data), 912 GFP_KERNEL); 913 if (!ec_data) 914 return -ENOMEM; 915 916 dev_set_drvdata(dev, ec_data); 917 ec_data->board_info = pboard_info; 918 919 switch (ec_data->board_info->family) { 920 case family_amd_400_series: 921 ec_data->sensors_info = sensors_family_amd_400; 922 break; 923 case family_amd_500_series: 924 ec_data->sensors_info = sensors_family_amd_500; 925 break; 926 case family_intel_300_series: 927 ec_data->sensors_info = sensors_family_intel_300; 928 break; 929 case family_intel_600_series: 930 ec_data->sensors_info = sensors_family_intel_600; 931 break; 932 default: 933 dev_err(dev, "Unknown board family: %d", 934 ec_data->board_info->family); 935 return -EINVAL; 936 } 937 938 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors); 939 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors, 940 sizeof(struct ec_sensor), GFP_KERNEL); 941 942 status = setup_lock_data(dev); 943 if (status) { 944 dev_err(dev, "Failed to setup state/EC locking: %d", status); 945 return status; 946 } 947 948 setup_sensor_data(ec_data); 949 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers, 950 sizeof(u16), GFP_KERNEL); 951 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers, 952 sizeof(u8), GFP_KERNEL); 953 954 if (!ec_data->registers || !ec_data->read_buffer) 955 return -ENOMEM; 956 957 fill_ec_registers(ec_data); 958 959 for (i = 0; i < ec_data->nr_sensors; ++i) { 960 si = get_sensor_info(ec_data, i); 961 if (!nr_count[si->type]) 962 ++nr_types; 963 ++nr_count[si->type]; 964 } 965 966 if (nr_count[hwmon_temp]) 967 nr_count[hwmon_chip]++, nr_types++; 968 969 asus_ec_hwmon_chan = devm_kcalloc( 970 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL); 971 if (!asus_ec_hwmon_chan) 972 return -ENOMEM; 973 974 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1, 975 sizeof(*ptr_asus_ec_ci), GFP_KERNEL); 976 if (!ptr_asus_ec_ci) 977 return -ENOMEM; 978 979 asus_ec_chip_info.info = ptr_asus_ec_ci; 980 chip_info = &asus_ec_chip_info; 981 982 for (type = 0; type < hwmon_max; ++type) { 983 if (!nr_count[type]) 984 continue; 985 986 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev, 987 nr_count[type], type, 988 hwmon_attributes[type]); 989 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++; 990 } 991 992 dev_info(dev, "board has %d EC sensors that span %d registers", 993 ec_data->nr_sensors, ec_data->nr_registers); 994 995 hwdev = devm_hwmon_device_register_with_info(dev, "asusec", 996 ec_data, chip_info, NULL); 997 998 return PTR_ERR_OR_ZERO(hwdev); 999 } 1000 1001 MODULE_DEVICE_TABLE(dmi, dmi_table); 1002 1003 static struct platform_driver asus_ec_sensors_platform_driver = { 1004 .driver = { 1005 .name = "asus-ec-sensors", 1006 }, 1007 .probe = asus_ec_probe, 1008 }; 1009 1010 static struct platform_device *asus_ec_sensors_platform_device; 1011 1012 static int __init asus_ec_init(void) 1013 { 1014 asus_ec_sensors_platform_device = 1015 platform_create_bundle(&asus_ec_sensors_platform_driver, 1016 asus_ec_probe, NULL, 0, NULL, 0); 1017 1018 if (IS_ERR(asus_ec_sensors_platform_device)) 1019 return PTR_ERR(asus_ec_sensors_platform_device); 1020 1021 return 0; 1022 } 1023 1024 static void __exit asus_ec_exit(void) 1025 { 1026 platform_device_unregister(asus_ec_sensors_platform_device); 1027 platform_driver_unregister(&asus_ec_sensors_platform_driver); 1028 } 1029 1030 module_init(asus_ec_init); 1031 module_exit(asus_ec_exit); 1032 1033 module_param_named(mutex_path, mutex_path_override, charp, 0); 1034 MODULE_PARM_DESC(mutex_path, 1035 "Override ACPI mutex path used to guard access to hardware"); 1036 1037 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>"); 1038 MODULE_DESCRIPTION( 1039 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards"); 1040 MODULE_LICENSE("GPL"); 1041