70f864d1 | 14-Feb-2023 |
Sergio Paracuellos <sergio.paracuellos@gmail.com> |
mips: dts: ralink: mt7621: add phandle to system controller node for watchdog
To allow to access system controller registers from watchdog driver code add a phandle in the watchdog 'wdt' node. This
mips: dts: ralink: mt7621: add phandle to system controller node for watchdog
To allow to access system controller registers from watchdog driver code add a phandle in the watchdog 'wdt' node. This avoid using arch dependent operations in driver code.
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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bae83341 | 11-Feb-2023 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: add port@5 as CPU port
On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set
mips: dts: ralink: mt7621: add port@5 as CPU port
On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Revert PHY muxing on GB-PC1.
There's an external PHY connected to the second MAC of the SoC on GB-PC2, therefore, disable port@5 for this device.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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43b46e6b | 30-Nov-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: remove label = "cpu" from DSA dt-binding
This is not used by the DSA dt-binding, so remove it from all devicetrees.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Par
mips: dts: remove label = "cpu" from DSA dt-binding
This is not used by the DSA dt-binding, so remove it from all devicetrees.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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cda52fe3 | 29-Nov-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: ralink: mt7621: change DSA port labels to generic naming
Change the labels of the DSA ports to generic naming for switch ports.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by
mips: ralink: mt7621: change DSA port labels to generic naming
Change the labels of the DSA ports to generic naming for switch ports.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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394c3032 | 20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: add GB-PC2 LEDs
Add the missing LEDs for GB-PC2. The ethblack-green, ethblue-green, power and system LEDs weren't added previously, because they don't exist on the device
mips: dts: ralink: mt7621: add GB-PC2 LEDs
Add the missing LEDs for GB-PC2. The ethblack-green, ethblue-green, power and system LEDs weren't added previously, because they don't exist on the device schematics. Tests on a GB-PC2 by me and Petr proved otherwise.
The i2c bus cannot be used on GB-PC2 as its pins are wired to LEDs instead, and GB-PC1 does not use it. Therefore, do not enable it on both devices.
Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf Tested-by: Petr Louda <petr.louda@outlook.cz> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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247825f9 | 20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: fix external phy on GB-PC2
The address of the external phy on the mdio bus is 5. Update the devicetree for GB-PC2 accordingly.
Fixes: 5bc148649cf3 ("staging: mt7621-dts:
mips: dts: ralink: mt7621: fix external phy on GB-PC2
The address of the external phy on the mdio bus is 5. Update the devicetree for GB-PC2 accordingly.
Fixes: 5bc148649cf3 ("staging: mt7621-dts: fix GB-PC2 devicetree") Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2b653a37 | 20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: change mt7530 switch address
In the case of muxing phy0 of the MT7530 switch, the switch and the phy will have the same address on the mdio bus, 0. This causes the etherne
mips: dts: ralink: mt7621: change mt7530 switch address
In the case of muxing phy0 of the MT7530 switch, the switch and the phy will have the same address on the mdio bus, 0. This causes the ethernet driver to fail since devices on the mdio bus cannot share an address.
Any address can be used for the switch, therefore, change the switch address to 0x1f.
Suggested-by: Sungbo Eo <mans0n@gorani.run> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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97721e84 | 20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: change phy-mode of gmac1 to rgmii
Change phy-mode of gmac1 to rgmii on mt7621.dtsi. Same code path is followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c.
Sign
mips: dts: ralink: mt7621: change phy-mode of gmac1 to rgmii
Change phy-mode of gmac1 to rgmii on mt7621.dtsi. Same code path is followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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08b9eaf4 | 20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: remove interrupt-parent from switch node
The interrupt-parent property is inherited from the ethernet node as it's a parent node of the switch node. Therefore, remove the
mips: dts: ralink: mt7621: remove interrupt-parent from switch node
The interrupt-parent property is inherited from the ethernet node as it's a parent node of the switch node. Therefore, remove the unnecessary interrupt-parent property from the switch node.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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d9a683f5 | 11-Apr-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: remove defining gpio function for pin groups
All pin groups function as gpio unless set otherwise. Therefore, remove this unnecessary binding.
Tested on UniElec U7621-06-
mips: dts: ralink: mt7621: remove defining gpio function for pin groups
All pin groups function as gpio unless set otherwise. Therefore, remove this unnecessary binding.
Tested on UniElec U7621-06-16M on OpenWrt.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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6faf0dbd | 11-Apr-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: mux phy4 to gmac1 for GB-PC1
Mux the MT7530 switch's phy4 to the SoC's gmac1 on the GB-PC1 devicetree. This achieves 2 Gbps total bandwidth to the CPU using the second RGM
mips: dts: ralink: mt7621: mux phy4 to gmac1 for GB-PC1
Mux the MT7530 switch's phy4 to the SoC's gmac1 on the GB-PC1 devicetree. This achieves 2 Gbps total bandwidth to the CPU using the second RGMII.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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e8c19201 | 14-Jan-2020 |
Reto Schneider <reto.schneider@husqvarnagroup.com> |
MIPS: ralink: dts: gardena_smart_gateway_mt7688: Limit UART1
The radio module asserts CTS when its RX buffer has 10 bytes left. Putting just 8 instead of 16 bytes into the UART1 TX buffer on the Lin
MIPS: ralink: dts: gardena_smart_gateway_mt7688: Limit UART1
The radio module asserts CTS when its RX buffer has 10 bytes left. Putting just 8 instead of 16 bytes into the UART1 TX buffer on the Linux side ensures to not overflow the RX buffer on the radio module side.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Paul Burton <paul.burton@mips.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org
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a5d193cb | 14-Jan-2020 |
Reto Schneider <reto.schneider@husqvarnagroup.com> |
MIPS: ralink: dts: gardena_smart_gateway_mt7688: Enable WMAC
This patch enables the WMAC controller on the GARDENA smart Gateway and configures the board specific factory EEPROM setting for this dri
MIPS: ralink: dts: gardena_smart_gateway_mt7688: Enable WMAC
This patch enables the WMAC controller on the GARDENA smart Gateway and configures the board specific factory EEPROM setting for this driver.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Paul Burton <paul.burton@mips.com> Cc: John Crispin <john@phrozen.org> Cc: Felix Fietkau <nbd@nbd.name> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org
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