1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP/ 30 * LSM6DSTX/LSM6DSO16IS/ISM330IS: 31 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416, 32 * 833 33 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 34 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 35 * - FIFO size: 3KB 36 * 37 * - LSM6DSV/LSM6DSV16X: 38 * - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240, 39 * 480, 960 40 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 41 * - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000 42 * - FIFO size: 3KB 43 * 44 * - LSM9DS1/LSM6DS0: 45 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 46 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 47 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 48 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 49 * - FIFO size: 32 50 * 51 * Copyright 2016 STMicroelectronics Inc. 52 * 53 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 54 * Denis Ciocca <denis.ciocca@st.com> 55 */ 56 57 #include <linux/kernel.h> 58 #include <linux/module.h> 59 #include <linux/acpi.h> 60 #include <linux/delay.h> 61 #include <linux/iio/events.h> 62 #include <linux/iio/iio.h> 63 #include <linux/iio/sysfs.h> 64 #include <linux/iio/triggered_buffer.h> 65 #include <linux/iio/trigger_consumer.h> 66 #include <linux/interrupt.h> 67 #include <linux/irq.h> 68 #include <linux/minmax.h> 69 #include <linux/pm.h> 70 #include <linux/property.h> 71 #include <linux/regmap.h> 72 #include <linux/bitfield.h> 73 74 #include <linux/platform_data/st_sensors_pdata.h> 75 76 #include "st_lsm6dsx.h" 77 78 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 79 80 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ 81 82 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 83 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 84 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 85 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 86 IIO_CHAN_SOFT_TIMESTAMP(3), 87 }; 88 89 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 90 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 91 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 92 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 93 IIO_CHAN_SOFT_TIMESTAMP(3), 94 }; 95 96 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 97 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 98 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 99 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 100 IIO_CHAN_SOFT_TIMESTAMP(3), 101 }; 102 103 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 104 { 105 .reset = { 106 .addr = 0x22, 107 .mask = BIT(0), 108 }, 109 .boot = { 110 .addr = 0x22, 111 .mask = BIT(7), 112 }, 113 .bdu = { 114 .addr = 0x22, 115 .mask = BIT(6), 116 }, 117 .id = { 118 { 119 .hw_id = ST_LSM9DS1_ID, 120 .name = ST_LSM9DS1_DEV_NAME, 121 .wai = 0x68, 122 }, { 123 .hw_id = ST_LSM6DS0_ID, 124 .name = ST_LSM6DS0_DEV_NAME, 125 .wai = 0x68, 126 }, 127 }, 128 .channels = { 129 [ST_LSM6DSX_ID_ACC] = { 130 .chan = st_lsm6dsx_acc_channels, 131 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 132 }, 133 [ST_LSM6DSX_ID_GYRO] = { 134 .chan = st_lsm6ds0_gyro_channels, 135 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 136 }, 137 }, 138 .odr_table = { 139 [ST_LSM6DSX_ID_ACC] = { 140 .reg = { 141 .addr = 0x20, 142 .mask = GENMASK(7, 5), 143 }, 144 .odr_avl[0] = { 10000, 0x01 }, 145 .odr_avl[1] = { 50000, 0x02 }, 146 .odr_avl[2] = { 119000, 0x03 }, 147 .odr_avl[3] = { 238000, 0x04 }, 148 .odr_avl[4] = { 476000, 0x05 }, 149 .odr_avl[5] = { 952000, 0x06 }, 150 .odr_len = 6, 151 }, 152 [ST_LSM6DSX_ID_GYRO] = { 153 .reg = { 154 .addr = 0x10, 155 .mask = GENMASK(7, 5), 156 }, 157 .odr_avl[0] = { 14900, 0x01 }, 158 .odr_avl[1] = { 59500, 0x02 }, 159 .odr_avl[2] = { 119000, 0x03 }, 160 .odr_avl[3] = { 238000, 0x04 }, 161 .odr_avl[4] = { 476000, 0x05 }, 162 .odr_avl[5] = { 952000, 0x06 }, 163 .odr_len = 6, 164 }, 165 }, 166 .fs_table = { 167 [ST_LSM6DSX_ID_ACC] = { 168 .reg = { 169 .addr = 0x20, 170 .mask = GENMASK(4, 3), 171 }, 172 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 173 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 174 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 175 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 }, 176 .fs_len = 4, 177 }, 178 [ST_LSM6DSX_ID_GYRO] = { 179 .reg = { 180 .addr = 0x10, 181 .mask = GENMASK(4, 3), 182 }, 183 184 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 185 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 186 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 187 .fs_len = 3, 188 }, 189 }, 190 .irq_config = { 191 .irq1 = { 192 .addr = 0x0c, 193 .mask = BIT(3), 194 }, 195 .irq2 = { 196 .addr = 0x0d, 197 .mask = BIT(3), 198 }, 199 .hla = { 200 .addr = 0x22, 201 .mask = BIT(5), 202 }, 203 .od = { 204 .addr = 0x22, 205 .mask = BIT(4), 206 }, 207 }, 208 .fifo_ops = { 209 .max_size = 32, 210 }, 211 }, 212 { 213 .reset = { 214 .addr = 0x12, 215 .mask = BIT(0), 216 }, 217 .boot = { 218 .addr = 0x12, 219 .mask = BIT(7), 220 }, 221 .bdu = { 222 .addr = 0x12, 223 .mask = BIT(6), 224 }, 225 .id = { 226 { 227 .hw_id = ST_LSM6DS3_ID, 228 .name = ST_LSM6DS3_DEV_NAME, 229 .wai = 0x69, 230 }, 231 }, 232 .channels = { 233 [ST_LSM6DSX_ID_ACC] = { 234 .chan = st_lsm6dsx_acc_channels, 235 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 236 }, 237 [ST_LSM6DSX_ID_GYRO] = { 238 .chan = st_lsm6dsx_gyro_channels, 239 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 240 }, 241 }, 242 .odr_table = { 243 [ST_LSM6DSX_ID_ACC] = { 244 .reg = { 245 .addr = 0x10, 246 .mask = GENMASK(7, 4), 247 }, 248 .odr_avl[0] = { 12500, 0x01 }, 249 .odr_avl[1] = { 26000, 0x02 }, 250 .odr_avl[2] = { 52000, 0x03 }, 251 .odr_avl[3] = { 104000, 0x04 }, 252 .odr_avl[4] = { 208000, 0x05 }, 253 .odr_avl[5] = { 416000, 0x06 }, 254 .odr_len = 6, 255 }, 256 [ST_LSM6DSX_ID_GYRO] = { 257 .reg = { 258 .addr = 0x11, 259 .mask = GENMASK(7, 4), 260 }, 261 .odr_avl[0] = { 12500, 0x01 }, 262 .odr_avl[1] = { 26000, 0x02 }, 263 .odr_avl[2] = { 52000, 0x03 }, 264 .odr_avl[3] = { 104000, 0x04 }, 265 .odr_avl[4] = { 208000, 0x05 }, 266 .odr_avl[5] = { 416000, 0x06 }, 267 .odr_len = 6, 268 }, 269 }, 270 .fs_table = { 271 [ST_LSM6DSX_ID_ACC] = { 272 .reg = { 273 .addr = 0x10, 274 .mask = GENMASK(3, 2), 275 }, 276 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 277 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 278 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 279 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 280 .fs_len = 4, 281 }, 282 [ST_LSM6DSX_ID_GYRO] = { 283 .reg = { 284 .addr = 0x11, 285 .mask = GENMASK(3, 2), 286 }, 287 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 288 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 289 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 290 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 291 .fs_len = 4, 292 }, 293 }, 294 .irq_config = { 295 .irq1 = { 296 .addr = 0x0d, 297 .mask = BIT(3), 298 }, 299 .irq2 = { 300 .addr = 0x0e, 301 .mask = BIT(3), 302 }, 303 .lir = { 304 .addr = 0x58, 305 .mask = BIT(0), 306 }, 307 .irq1_func = { 308 .addr = 0x5e, 309 .mask = BIT(5), 310 }, 311 .irq2_func = { 312 .addr = 0x5f, 313 .mask = BIT(5), 314 }, 315 .hla = { 316 .addr = 0x12, 317 .mask = BIT(5), 318 }, 319 .od = { 320 .addr = 0x12, 321 .mask = BIT(4), 322 }, 323 }, 324 .decimator = { 325 [ST_LSM6DSX_ID_ACC] = { 326 .addr = 0x08, 327 .mask = GENMASK(2, 0), 328 }, 329 [ST_LSM6DSX_ID_GYRO] = { 330 .addr = 0x08, 331 .mask = GENMASK(5, 3), 332 }, 333 }, 334 .fifo_ops = { 335 .update_fifo = st_lsm6dsx_update_fifo, 336 .read_fifo = st_lsm6dsx_read_fifo, 337 .fifo_th = { 338 .addr = 0x06, 339 .mask = GENMASK(11, 0), 340 }, 341 .fifo_diff = { 342 .addr = 0x3a, 343 .mask = GENMASK(11, 0), 344 }, 345 .max_size = 1365, 346 .th_wl = 3, /* 1LSB = 2B */ 347 }, 348 .ts_settings = { 349 .timer_en = { 350 .addr = 0x58, 351 .mask = BIT(7), 352 }, 353 .hr_timer = { 354 .addr = 0x5c, 355 .mask = BIT(4), 356 }, 357 .fifo_en = { 358 .addr = 0x07, 359 .mask = BIT(7), 360 }, 361 .decimator = { 362 .addr = 0x09, 363 .mask = GENMASK(5, 3), 364 }, 365 }, 366 .event_settings = { 367 .wakeup_reg = { 368 .addr = 0x5B, 369 .mask = GENMASK(5, 0), 370 }, 371 .wakeup_src_reg = 0x1b, 372 .wakeup_src_status_mask = BIT(3), 373 .wakeup_src_z_mask = BIT(0), 374 .wakeup_src_y_mask = BIT(1), 375 .wakeup_src_x_mask = BIT(2), 376 }, 377 }, 378 { 379 .reset = { 380 .addr = 0x12, 381 .mask = BIT(0), 382 }, 383 .boot = { 384 .addr = 0x12, 385 .mask = BIT(7), 386 }, 387 .bdu = { 388 .addr = 0x12, 389 .mask = BIT(6), 390 }, 391 .id = { 392 { 393 .hw_id = ST_LSM6DS3H_ID, 394 .name = ST_LSM6DS3H_DEV_NAME, 395 .wai = 0x69, 396 }, 397 }, 398 .channels = { 399 [ST_LSM6DSX_ID_ACC] = { 400 .chan = st_lsm6dsx_acc_channels, 401 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 402 }, 403 [ST_LSM6DSX_ID_GYRO] = { 404 .chan = st_lsm6dsx_gyro_channels, 405 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 406 }, 407 }, 408 .odr_table = { 409 [ST_LSM6DSX_ID_ACC] = { 410 .reg = { 411 .addr = 0x10, 412 .mask = GENMASK(7, 4), 413 }, 414 .odr_avl[0] = { 12500, 0x01 }, 415 .odr_avl[1] = { 26000, 0x02 }, 416 .odr_avl[2] = { 52000, 0x03 }, 417 .odr_avl[3] = { 104000, 0x04 }, 418 .odr_avl[4] = { 208000, 0x05 }, 419 .odr_avl[5] = { 416000, 0x06 }, 420 .odr_len = 6, 421 }, 422 [ST_LSM6DSX_ID_GYRO] = { 423 .reg = { 424 .addr = 0x11, 425 .mask = GENMASK(7, 4), 426 }, 427 .odr_avl[0] = { 12500, 0x01 }, 428 .odr_avl[1] = { 26000, 0x02 }, 429 .odr_avl[2] = { 52000, 0x03 }, 430 .odr_avl[3] = { 104000, 0x04 }, 431 .odr_avl[4] = { 208000, 0x05 }, 432 .odr_avl[5] = { 416000, 0x06 }, 433 .odr_len = 6, 434 }, 435 }, 436 .fs_table = { 437 [ST_LSM6DSX_ID_ACC] = { 438 .reg = { 439 .addr = 0x10, 440 .mask = GENMASK(3, 2), 441 }, 442 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 443 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 444 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 445 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 446 .fs_len = 4, 447 }, 448 [ST_LSM6DSX_ID_GYRO] = { 449 .reg = { 450 .addr = 0x11, 451 .mask = GENMASK(3, 2), 452 }, 453 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 454 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 455 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 456 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 457 .fs_len = 4, 458 }, 459 }, 460 .irq_config = { 461 .irq1 = { 462 .addr = 0x0d, 463 .mask = BIT(3), 464 }, 465 .irq2 = { 466 .addr = 0x0e, 467 .mask = BIT(3), 468 }, 469 .lir = { 470 .addr = 0x58, 471 .mask = BIT(0), 472 }, 473 .irq1_func = { 474 .addr = 0x5e, 475 .mask = BIT(5), 476 }, 477 .irq2_func = { 478 .addr = 0x5f, 479 .mask = BIT(5), 480 }, 481 .hla = { 482 .addr = 0x12, 483 .mask = BIT(5), 484 }, 485 .od = { 486 .addr = 0x12, 487 .mask = BIT(4), 488 }, 489 }, 490 .decimator = { 491 [ST_LSM6DSX_ID_ACC] = { 492 .addr = 0x08, 493 .mask = GENMASK(2, 0), 494 }, 495 [ST_LSM6DSX_ID_GYRO] = { 496 .addr = 0x08, 497 .mask = GENMASK(5, 3), 498 }, 499 }, 500 .fifo_ops = { 501 .update_fifo = st_lsm6dsx_update_fifo, 502 .read_fifo = st_lsm6dsx_read_fifo, 503 .fifo_th = { 504 .addr = 0x06, 505 .mask = GENMASK(11, 0), 506 }, 507 .fifo_diff = { 508 .addr = 0x3a, 509 .mask = GENMASK(11, 0), 510 }, 511 .max_size = 682, 512 .th_wl = 3, /* 1LSB = 2B */ 513 }, 514 .ts_settings = { 515 .timer_en = { 516 .addr = 0x58, 517 .mask = BIT(7), 518 }, 519 .hr_timer = { 520 .addr = 0x5c, 521 .mask = BIT(4), 522 }, 523 .fifo_en = { 524 .addr = 0x07, 525 .mask = BIT(7), 526 }, 527 .decimator = { 528 .addr = 0x09, 529 .mask = GENMASK(5, 3), 530 }, 531 }, 532 .event_settings = { 533 .wakeup_reg = { 534 .addr = 0x5B, 535 .mask = GENMASK(5, 0), 536 }, 537 .wakeup_src_reg = 0x1b, 538 .wakeup_src_status_mask = BIT(3), 539 .wakeup_src_z_mask = BIT(0), 540 .wakeup_src_y_mask = BIT(1), 541 .wakeup_src_x_mask = BIT(2), 542 }, 543 }, 544 { 545 .reset = { 546 .addr = 0x12, 547 .mask = BIT(0), 548 }, 549 .boot = { 550 .addr = 0x12, 551 .mask = BIT(7), 552 }, 553 .bdu = { 554 .addr = 0x12, 555 .mask = BIT(6), 556 }, 557 .id = { 558 { 559 .hw_id = ST_LSM6DSL_ID, 560 .name = ST_LSM6DSL_DEV_NAME, 561 .wai = 0x6a, 562 }, { 563 .hw_id = ST_LSM6DSM_ID, 564 .name = ST_LSM6DSM_DEV_NAME, 565 .wai = 0x6a, 566 }, { 567 .hw_id = ST_ISM330DLC_ID, 568 .name = ST_ISM330DLC_DEV_NAME, 569 .wai = 0x6a, 570 }, { 571 .hw_id = ST_LSM6DS3TRC_ID, 572 .name = ST_LSM6DS3TRC_DEV_NAME, 573 .wai = 0x6a, 574 }, 575 }, 576 .channels = { 577 [ST_LSM6DSX_ID_ACC] = { 578 .chan = st_lsm6dsx_acc_channels, 579 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 580 }, 581 [ST_LSM6DSX_ID_GYRO] = { 582 .chan = st_lsm6dsx_gyro_channels, 583 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 584 }, 585 }, 586 .odr_table = { 587 [ST_LSM6DSX_ID_ACC] = { 588 .reg = { 589 .addr = 0x10, 590 .mask = GENMASK(7, 4), 591 }, 592 .odr_avl[0] = { 12500, 0x01 }, 593 .odr_avl[1] = { 26000, 0x02 }, 594 .odr_avl[2] = { 52000, 0x03 }, 595 .odr_avl[3] = { 104000, 0x04 }, 596 .odr_avl[4] = { 208000, 0x05 }, 597 .odr_avl[5] = { 416000, 0x06 }, 598 .odr_len = 6, 599 }, 600 [ST_LSM6DSX_ID_GYRO] = { 601 .reg = { 602 .addr = 0x11, 603 .mask = GENMASK(7, 4), 604 }, 605 .odr_avl[0] = { 12500, 0x01 }, 606 .odr_avl[1] = { 26000, 0x02 }, 607 .odr_avl[2] = { 52000, 0x03 }, 608 .odr_avl[3] = { 104000, 0x04 }, 609 .odr_avl[4] = { 208000, 0x05 }, 610 .odr_avl[5] = { 416000, 0x06 }, 611 .odr_len = 6, 612 }, 613 }, 614 .fs_table = { 615 [ST_LSM6DSX_ID_ACC] = { 616 .reg = { 617 .addr = 0x10, 618 .mask = GENMASK(3, 2), 619 }, 620 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 621 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 622 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 623 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 624 .fs_len = 4, 625 }, 626 [ST_LSM6DSX_ID_GYRO] = { 627 .reg = { 628 .addr = 0x11, 629 .mask = GENMASK(3, 2), 630 }, 631 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 632 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 633 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 634 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 635 .fs_len = 4, 636 }, 637 }, 638 .samples_to_discard = { 639 [ST_LSM6DSX_ID_ACC] = { 640 .val[0] = { 12500, 1 }, 641 .val[1] = { 26000, 1 }, 642 .val[2] = { 52000, 1 }, 643 .val[3] = { 104000, 2 }, 644 .val[4] = { 208000, 2 }, 645 .val[5] = { 416000, 2 }, 646 }, 647 [ST_LSM6DSX_ID_GYRO] = { 648 .val[0] = { 12500, 2 }, 649 .val[1] = { 26000, 5 }, 650 .val[2] = { 52000, 7 }, 651 .val[3] = { 104000, 12 }, 652 .val[4] = { 208000, 20 }, 653 .val[5] = { 416000, 36 }, 654 }, 655 }, 656 .irq_config = { 657 .irq1 = { 658 .addr = 0x0d, 659 .mask = BIT(3), 660 }, 661 .irq2 = { 662 .addr = 0x0e, 663 .mask = BIT(3), 664 }, 665 .lir = { 666 .addr = 0x58, 667 .mask = BIT(0), 668 }, 669 .irq1_func = { 670 .addr = 0x5e, 671 .mask = BIT(5), 672 }, 673 .irq2_func = { 674 .addr = 0x5f, 675 .mask = BIT(5), 676 }, 677 .hla = { 678 .addr = 0x12, 679 .mask = BIT(5), 680 }, 681 .od = { 682 .addr = 0x12, 683 .mask = BIT(4), 684 }, 685 }, 686 .decimator = { 687 [ST_LSM6DSX_ID_ACC] = { 688 .addr = 0x08, 689 .mask = GENMASK(2, 0), 690 }, 691 [ST_LSM6DSX_ID_GYRO] = { 692 .addr = 0x08, 693 .mask = GENMASK(5, 3), 694 }, 695 [ST_LSM6DSX_ID_EXT0] = { 696 .addr = 0x09, 697 .mask = GENMASK(2, 0), 698 }, 699 }, 700 .fifo_ops = { 701 .update_fifo = st_lsm6dsx_update_fifo, 702 .read_fifo = st_lsm6dsx_read_fifo, 703 .fifo_th = { 704 .addr = 0x06, 705 .mask = GENMASK(10, 0), 706 }, 707 .fifo_diff = { 708 .addr = 0x3a, 709 .mask = GENMASK(10, 0), 710 }, 711 .max_size = 682, 712 .th_wl = 3, /* 1LSB = 2B */ 713 }, 714 .ts_settings = { 715 .timer_en = { 716 .addr = 0x19, 717 .mask = BIT(5), 718 }, 719 .hr_timer = { 720 .addr = 0x5c, 721 .mask = BIT(4), 722 }, 723 .fifo_en = { 724 .addr = 0x07, 725 .mask = BIT(7), 726 }, 727 .decimator = { 728 .addr = 0x09, 729 .mask = GENMASK(5, 3), 730 }, 731 }, 732 .shub_settings = { 733 .page_mux = { 734 .addr = 0x01, 735 .mask = BIT(7), 736 }, 737 .master_en = { 738 .addr = 0x1a, 739 .mask = BIT(0), 740 }, 741 .pullup_en = { 742 .addr = 0x1a, 743 .mask = BIT(3), 744 }, 745 .aux_sens = { 746 .addr = 0x04, 747 .mask = GENMASK(5, 4), 748 }, 749 .wr_once = { 750 .addr = 0x07, 751 .mask = BIT(5), 752 }, 753 .emb_func = { 754 .addr = 0x19, 755 .mask = BIT(2), 756 }, 757 .num_ext_dev = 1, 758 .shub_out = { 759 .addr = 0x2e, 760 }, 761 .slv0_addr = 0x02, 762 .dw_slv0_addr = 0x0e, 763 .pause = 0x7, 764 }, 765 .event_settings = { 766 .enable_reg = { 767 .addr = 0x58, 768 .mask = BIT(7), 769 }, 770 .wakeup_reg = { 771 .addr = 0x5B, 772 .mask = GENMASK(5, 0), 773 }, 774 .wakeup_src_reg = 0x1b, 775 .wakeup_src_status_mask = BIT(3), 776 .wakeup_src_z_mask = BIT(0), 777 .wakeup_src_y_mask = BIT(1), 778 .wakeup_src_x_mask = BIT(2), 779 }, 780 }, 781 { 782 .reset = { 783 .addr = 0x12, 784 .mask = BIT(0), 785 }, 786 .boot = { 787 .addr = 0x12, 788 .mask = BIT(7), 789 }, 790 .bdu = { 791 .addr = 0x12, 792 .mask = BIT(6), 793 }, 794 .id = { 795 { 796 .hw_id = ST_LSM6DSR_ID, 797 .name = ST_LSM6DSR_DEV_NAME, 798 .wai = 0x6b, 799 }, { 800 .hw_id = ST_ISM330DHCX_ID, 801 .name = ST_ISM330DHCX_DEV_NAME, 802 .wai = 0x6b, 803 }, { 804 .hw_id = ST_LSM6DSRX_ID, 805 .name = ST_LSM6DSRX_DEV_NAME, 806 .wai = 0x6b, 807 }, { 808 .hw_id = ST_LSM6DSO_ID, 809 .name = ST_LSM6DSO_DEV_NAME, 810 .wai = 0x6c, 811 }, { 812 .hw_id = ST_LSM6DSOX_ID, 813 .name = ST_LSM6DSOX_DEV_NAME, 814 .wai = 0x6c, 815 }, { 816 .hw_id = ST_LSM6DST_ID, 817 .name = ST_LSM6DST_DEV_NAME, 818 .wai = 0x6d, 819 }, { 820 .hw_id = ST_ASM330LHHX_ID, 821 .name = ST_ASM330LHHX_DEV_NAME, 822 .wai = 0x6b, 823 }, { 824 .hw_id = ST_LSM6DSTX_ID, 825 .name = ST_LSM6DSTX_DEV_NAME, 826 .wai = 0x6d, 827 }, 828 }, 829 .channels = { 830 [ST_LSM6DSX_ID_ACC] = { 831 .chan = st_lsm6dsx_acc_channels, 832 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 833 }, 834 [ST_LSM6DSX_ID_GYRO] = { 835 .chan = st_lsm6dsx_gyro_channels, 836 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 837 }, 838 }, 839 .drdy_mask = { 840 .addr = 0x13, 841 .mask = BIT(3), 842 }, 843 .odr_table = { 844 [ST_LSM6DSX_ID_ACC] = { 845 .reg = { 846 .addr = 0x10, 847 .mask = GENMASK(7, 4), 848 }, 849 .odr_avl[0] = { 12500, 0x01 }, 850 .odr_avl[1] = { 26000, 0x02 }, 851 .odr_avl[2] = { 52000, 0x03 }, 852 .odr_avl[3] = { 104000, 0x04 }, 853 .odr_avl[4] = { 208000, 0x05 }, 854 .odr_avl[5] = { 416000, 0x06 }, 855 .odr_avl[6] = { 833000, 0x07 }, 856 .odr_len = 7, 857 }, 858 [ST_LSM6DSX_ID_GYRO] = { 859 .reg = { 860 .addr = 0x11, 861 .mask = GENMASK(7, 4), 862 }, 863 .odr_avl[0] = { 12500, 0x01 }, 864 .odr_avl[1] = { 26000, 0x02 }, 865 .odr_avl[2] = { 52000, 0x03 }, 866 .odr_avl[3] = { 104000, 0x04 }, 867 .odr_avl[4] = { 208000, 0x05 }, 868 .odr_avl[5] = { 416000, 0x06 }, 869 .odr_avl[6] = { 833000, 0x07 }, 870 .odr_len = 7, 871 }, 872 }, 873 .fs_table = { 874 [ST_LSM6DSX_ID_ACC] = { 875 .reg = { 876 .addr = 0x10, 877 .mask = GENMASK(3, 2), 878 }, 879 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 880 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 881 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 882 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 883 .fs_len = 4, 884 }, 885 [ST_LSM6DSX_ID_GYRO] = { 886 .reg = { 887 .addr = 0x11, 888 .mask = GENMASK(3, 2), 889 }, 890 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 891 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 892 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 893 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 894 .fs_len = 4, 895 }, 896 }, 897 .irq_config = { 898 .irq1 = { 899 .addr = 0x0d, 900 .mask = BIT(3), 901 }, 902 .irq2 = { 903 .addr = 0x0e, 904 .mask = BIT(3), 905 }, 906 .lir = { 907 .addr = 0x56, 908 .mask = BIT(0), 909 }, 910 .clear_on_read = { 911 .addr = 0x56, 912 .mask = BIT(6), 913 }, 914 .irq1_func = { 915 .addr = 0x5e, 916 .mask = BIT(5), 917 }, 918 .irq2_func = { 919 .addr = 0x5f, 920 .mask = BIT(5), 921 }, 922 .hla = { 923 .addr = 0x12, 924 .mask = BIT(5), 925 }, 926 .od = { 927 .addr = 0x12, 928 .mask = BIT(4), 929 }, 930 }, 931 .batch = { 932 [ST_LSM6DSX_ID_ACC] = { 933 .addr = 0x09, 934 .mask = GENMASK(3, 0), 935 }, 936 [ST_LSM6DSX_ID_GYRO] = { 937 .addr = 0x09, 938 .mask = GENMASK(7, 4), 939 }, 940 }, 941 .fifo_ops = { 942 .update_fifo = st_lsm6dsx_update_fifo, 943 .read_fifo = st_lsm6dsx_read_tagged_fifo, 944 .fifo_th = { 945 .addr = 0x07, 946 .mask = GENMASK(8, 0), 947 }, 948 .fifo_diff = { 949 .addr = 0x3a, 950 .mask = GENMASK(9, 0), 951 }, 952 .max_size = 512, 953 .th_wl = 1, 954 }, 955 .ts_settings = { 956 .timer_en = { 957 .addr = 0x19, 958 .mask = BIT(5), 959 }, 960 .decimator = { 961 .addr = 0x0a, 962 .mask = GENMASK(7, 6), 963 }, 964 .freq_fine = 0x63, 965 }, 966 .shub_settings = { 967 .page_mux = { 968 .addr = 0x01, 969 .mask = BIT(6), 970 }, 971 .master_en = { 972 .sec_page = true, 973 .addr = 0x14, 974 .mask = BIT(2), 975 }, 976 .pullup_en = { 977 .sec_page = true, 978 .addr = 0x14, 979 .mask = BIT(3), 980 }, 981 .aux_sens = { 982 .addr = 0x14, 983 .mask = GENMASK(1, 0), 984 }, 985 .wr_once = { 986 .addr = 0x14, 987 .mask = BIT(6), 988 }, 989 .num_ext_dev = 3, 990 .shub_out = { 991 .sec_page = true, 992 .addr = 0x02, 993 }, 994 .slv0_addr = 0x15, 995 .dw_slv0_addr = 0x21, 996 .batch_en = BIT(3), 997 }, 998 .event_settings = { 999 .enable_reg = { 1000 .addr = 0x58, 1001 .mask = BIT(7), 1002 }, 1003 .wakeup_reg = { 1004 .addr = 0x5b, 1005 .mask = GENMASK(5, 0), 1006 }, 1007 .wakeup_src_reg = 0x1b, 1008 .wakeup_src_status_mask = BIT(3), 1009 .wakeup_src_z_mask = BIT(0), 1010 .wakeup_src_y_mask = BIT(1), 1011 .wakeup_src_x_mask = BIT(2), 1012 }, 1013 }, 1014 { 1015 .reset = { 1016 .addr = 0x12, 1017 .mask = BIT(0), 1018 }, 1019 .boot = { 1020 .addr = 0x12, 1021 .mask = BIT(7), 1022 }, 1023 .bdu = { 1024 .addr = 0x12, 1025 .mask = BIT(6), 1026 }, 1027 .id = { 1028 { 1029 .hw_id = ST_ASM330LHH_ID, 1030 .name = ST_ASM330LHH_DEV_NAME, 1031 .wai = 0x6b, 1032 }, { 1033 .hw_id = ST_LSM6DSOP_ID, 1034 .name = ST_LSM6DSOP_DEV_NAME, 1035 .wai = 0x6c, 1036 }, { 1037 .hw_id = ST_ASM330LHB_ID, 1038 .name = ST_ASM330LHB_DEV_NAME, 1039 .wai = 0x6b, 1040 }, 1041 }, 1042 .channels = { 1043 [ST_LSM6DSX_ID_ACC] = { 1044 .chan = st_lsm6dsx_acc_channels, 1045 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1046 }, 1047 [ST_LSM6DSX_ID_GYRO] = { 1048 .chan = st_lsm6dsx_gyro_channels, 1049 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1050 }, 1051 }, 1052 .drdy_mask = { 1053 .addr = 0x13, 1054 .mask = BIT(3), 1055 }, 1056 .odr_table = { 1057 [ST_LSM6DSX_ID_ACC] = { 1058 .reg = { 1059 .addr = 0x10, 1060 .mask = GENMASK(7, 4), 1061 }, 1062 .odr_avl[0] = { 12500, 0x01 }, 1063 .odr_avl[1] = { 26000, 0x02 }, 1064 .odr_avl[2] = { 52000, 0x03 }, 1065 .odr_avl[3] = { 104000, 0x04 }, 1066 .odr_avl[4] = { 208000, 0x05 }, 1067 .odr_avl[5] = { 416000, 0x06 }, 1068 .odr_avl[6] = { 833000, 0x07 }, 1069 .odr_len = 7, 1070 }, 1071 [ST_LSM6DSX_ID_GYRO] = { 1072 .reg = { 1073 .addr = 0x11, 1074 .mask = GENMASK(7, 4), 1075 }, 1076 .odr_avl[0] = { 12500, 0x01 }, 1077 .odr_avl[1] = { 26000, 0x02 }, 1078 .odr_avl[2] = { 52000, 0x03 }, 1079 .odr_avl[3] = { 104000, 0x04 }, 1080 .odr_avl[4] = { 208000, 0x05 }, 1081 .odr_avl[5] = { 416000, 0x06 }, 1082 .odr_avl[6] = { 833000, 0x07 }, 1083 .odr_len = 7, 1084 }, 1085 }, 1086 .fs_table = { 1087 [ST_LSM6DSX_ID_ACC] = { 1088 .reg = { 1089 .addr = 0x10, 1090 .mask = GENMASK(3, 2), 1091 }, 1092 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1093 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 1094 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 1095 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 1096 .fs_len = 4, 1097 }, 1098 [ST_LSM6DSX_ID_GYRO] = { 1099 .reg = { 1100 .addr = 0x11, 1101 .mask = GENMASK(3, 2), 1102 }, 1103 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 1104 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 1105 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 1106 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 1107 .fs_len = 4, 1108 }, 1109 }, 1110 .irq_config = { 1111 .irq1 = { 1112 .addr = 0x0d, 1113 .mask = BIT(3), 1114 }, 1115 .irq2 = { 1116 .addr = 0x0e, 1117 .mask = BIT(3), 1118 }, 1119 .lir = { 1120 .addr = 0x56, 1121 .mask = BIT(0), 1122 }, 1123 .clear_on_read = { 1124 .addr = 0x56, 1125 .mask = BIT(6), 1126 }, 1127 .irq1_func = { 1128 .addr = 0x5e, 1129 .mask = BIT(5), 1130 }, 1131 .irq2_func = { 1132 .addr = 0x5f, 1133 .mask = BIT(5), 1134 }, 1135 .hla = { 1136 .addr = 0x12, 1137 .mask = BIT(5), 1138 }, 1139 .od = { 1140 .addr = 0x12, 1141 .mask = BIT(4), 1142 }, 1143 }, 1144 .batch = { 1145 [ST_LSM6DSX_ID_ACC] = { 1146 .addr = 0x09, 1147 .mask = GENMASK(3, 0), 1148 }, 1149 [ST_LSM6DSX_ID_GYRO] = { 1150 .addr = 0x09, 1151 .mask = GENMASK(7, 4), 1152 }, 1153 }, 1154 .fifo_ops = { 1155 .update_fifo = st_lsm6dsx_update_fifo, 1156 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1157 .fifo_th = { 1158 .addr = 0x07, 1159 .mask = GENMASK(8, 0), 1160 }, 1161 .fifo_diff = { 1162 .addr = 0x3a, 1163 .mask = GENMASK(9, 0), 1164 }, 1165 .max_size = 512, 1166 .th_wl = 1, 1167 }, 1168 .ts_settings = { 1169 .timer_en = { 1170 .addr = 0x19, 1171 .mask = BIT(5), 1172 }, 1173 .decimator = { 1174 .addr = 0x0a, 1175 .mask = GENMASK(7, 6), 1176 }, 1177 .freq_fine = 0x63, 1178 }, 1179 .event_settings = { 1180 .enable_reg = { 1181 .addr = 0x58, 1182 .mask = BIT(7), 1183 }, 1184 .wakeup_reg = { 1185 .addr = 0x5B, 1186 .mask = GENMASK(5, 0), 1187 }, 1188 .wakeup_src_reg = 0x1b, 1189 .wakeup_src_status_mask = BIT(3), 1190 .wakeup_src_z_mask = BIT(0), 1191 .wakeup_src_y_mask = BIT(1), 1192 .wakeup_src_x_mask = BIT(2), 1193 }, 1194 }, 1195 { 1196 .reset = { 1197 .addr = 0x12, 1198 .mask = BIT(0), 1199 }, 1200 .boot = { 1201 .addr = 0x12, 1202 .mask = BIT(7), 1203 }, 1204 .bdu = { 1205 .addr = 0x12, 1206 .mask = BIT(6), 1207 }, 1208 .id = { 1209 { 1210 .hw_id = ST_LSM6DSV_ID, 1211 .name = ST_LSM6DSV_DEV_NAME, 1212 .wai = 0x70, 1213 }, { 1214 .hw_id = ST_LSM6DSV16X_ID, 1215 .name = ST_LSM6DSV16X_DEV_NAME, 1216 .wai = 0x70, 1217 }, 1218 }, 1219 .channels = { 1220 [ST_LSM6DSX_ID_ACC] = { 1221 .chan = st_lsm6dsx_acc_channels, 1222 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1223 }, 1224 [ST_LSM6DSX_ID_GYRO] = { 1225 .chan = st_lsm6dsx_gyro_channels, 1226 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1227 }, 1228 }, 1229 .drdy_mask = { 1230 .addr = 0x13, 1231 .mask = BIT(3), 1232 }, 1233 .odr_table = { 1234 [ST_LSM6DSX_ID_ACC] = { 1235 .reg = { 1236 .addr = 0x10, 1237 .mask = GENMASK(3, 0), 1238 }, 1239 .odr_avl[0] = { 7500, 0x02 }, 1240 .odr_avl[1] = { 15000, 0x03 }, 1241 .odr_avl[2] = { 30000, 0x04 }, 1242 .odr_avl[3] = { 60000, 0x05 }, 1243 .odr_avl[4] = { 120000, 0x06 }, 1244 .odr_avl[5] = { 240000, 0x07 }, 1245 .odr_avl[6] = { 480000, 0x08 }, 1246 .odr_avl[7] = { 960000, 0x09 }, 1247 .odr_len = 8, 1248 }, 1249 [ST_LSM6DSX_ID_GYRO] = { 1250 .reg = { 1251 .addr = 0x11, 1252 .mask = GENMASK(3, 0), 1253 }, 1254 .odr_avl[0] = { 7500, 0x02 }, 1255 .odr_avl[1] = { 15000, 0x03 }, 1256 .odr_avl[2] = { 30000, 0x04 }, 1257 .odr_avl[3] = { 60000, 0x05 }, 1258 .odr_avl[4] = { 120000, 0x06 }, 1259 .odr_avl[5] = { 240000, 0x07 }, 1260 .odr_avl[6] = { 480000, 0x08 }, 1261 .odr_avl[7] = { 960000, 0x09 }, 1262 .odr_len = 8, 1263 }, 1264 }, 1265 .fs_table = { 1266 [ST_LSM6DSX_ID_ACC] = { 1267 .reg = { 1268 .addr = 0x17, 1269 .mask = GENMASK(1, 0), 1270 }, 1271 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1272 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 }, 1273 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 }, 1274 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 }, 1275 .fs_len = 4, 1276 }, 1277 [ST_LSM6DSX_ID_GYRO] = { 1278 .reg = { 1279 .addr = 0x15, 1280 .mask = GENMASK(3, 0), 1281 }, 1282 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 }, 1283 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 }, 1284 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 }, 1285 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 }, 1286 .fs_len = 4, 1287 }, 1288 }, 1289 .irq_config = { 1290 .irq1 = { 1291 .addr = 0x0d, 1292 .mask = BIT(3), 1293 }, 1294 .irq2 = { 1295 .addr = 0x0e, 1296 .mask = BIT(3), 1297 }, 1298 .lir = { 1299 .addr = 0x56, 1300 .mask = BIT(0), 1301 }, 1302 .irq1_func = { 1303 .addr = 0x5e, 1304 .mask = BIT(5), 1305 }, 1306 .irq2_func = { 1307 .addr = 0x5f, 1308 .mask = BIT(5), 1309 }, 1310 .hla = { 1311 .addr = 0x03, 1312 .mask = BIT(4), 1313 }, 1314 .od = { 1315 .addr = 0x03, 1316 .mask = BIT(3), 1317 }, 1318 }, 1319 .batch = { 1320 [ST_LSM6DSX_ID_ACC] = { 1321 .addr = 0x09, 1322 .mask = GENMASK(3, 0), 1323 }, 1324 [ST_LSM6DSX_ID_GYRO] = { 1325 .addr = 0x09, 1326 .mask = GENMASK(7, 4), 1327 }, 1328 }, 1329 .fifo_ops = { 1330 .update_fifo = st_lsm6dsx_update_fifo, 1331 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1332 .fifo_th = { 1333 .addr = 0x07, 1334 .mask = GENMASK(7, 0), 1335 }, 1336 .fifo_diff = { 1337 .addr = 0x1b, 1338 .mask = GENMASK(8, 0), 1339 }, 1340 .max_size = 512, 1341 .th_wl = 1, 1342 }, 1343 .ts_settings = { 1344 .timer_en = { 1345 .addr = 0x50, 1346 .mask = BIT(6), 1347 }, 1348 .decimator = { 1349 .addr = 0x0a, 1350 .mask = GENMASK(7, 6), 1351 }, 1352 .freq_fine = 0x4f, 1353 }, 1354 .shub_settings = { 1355 .page_mux = { 1356 .addr = 0x01, 1357 .mask = BIT(6), 1358 }, 1359 .master_en = { 1360 .sec_page = true, 1361 .addr = 0x14, 1362 .mask = BIT(2), 1363 }, 1364 .pullup_en = { 1365 .addr = 0x03, 1366 .mask = BIT(6), 1367 }, 1368 .aux_sens = { 1369 .addr = 0x14, 1370 .mask = GENMASK(1, 0), 1371 }, 1372 .wr_once = { 1373 .addr = 0x14, 1374 .mask = BIT(6), 1375 }, 1376 .num_ext_dev = 3, 1377 .shub_out = { 1378 .sec_page = true, 1379 .addr = 0x02, 1380 }, 1381 .slv0_addr = 0x15, 1382 .dw_slv0_addr = 0x21, 1383 .batch_en = BIT(3), 1384 }, 1385 .event_settings = { 1386 .enable_reg = { 1387 .addr = 0x50, 1388 .mask = BIT(7), 1389 }, 1390 .wakeup_reg = { 1391 .addr = 0x5b, 1392 .mask = GENMASK(5, 0), 1393 }, 1394 .wakeup_src_reg = 0x45, 1395 .wakeup_src_status_mask = BIT(3), 1396 .wakeup_src_z_mask = BIT(0), 1397 .wakeup_src_y_mask = BIT(1), 1398 .wakeup_src_x_mask = BIT(2), 1399 }, 1400 }, 1401 { 1402 .reset = { 1403 .addr = 0x12, 1404 .mask = BIT(0), 1405 }, 1406 .boot = { 1407 .addr = 0x12, 1408 .mask = BIT(7), 1409 }, 1410 .bdu = { 1411 .addr = 0x12, 1412 .mask = BIT(6), 1413 }, 1414 .id = { 1415 { 1416 .hw_id = ST_LSM6DSO16IS_ID, 1417 .name = ST_LSM6DSO16IS_DEV_NAME, 1418 .wai = 0x22, 1419 }, { 1420 .hw_id = ST_ISM330IS_ID, 1421 .name = ST_ISM330IS_DEV_NAME, 1422 .wai = 0x22, 1423 } 1424 }, 1425 .channels = { 1426 [ST_LSM6DSX_ID_ACC] = { 1427 .chan = st_lsm6dsx_acc_channels, 1428 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1429 }, 1430 [ST_LSM6DSX_ID_GYRO] = { 1431 .chan = st_lsm6dsx_gyro_channels, 1432 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1433 }, 1434 }, 1435 .odr_table = { 1436 [ST_LSM6DSX_ID_ACC] = { 1437 .reg = { 1438 .addr = 0x10, 1439 .mask = GENMASK(7, 4), 1440 }, 1441 .odr_avl[0] = { 12500, 0x01 }, 1442 .odr_avl[1] = { 26000, 0x02 }, 1443 .odr_avl[2] = { 52000, 0x03 }, 1444 .odr_avl[3] = { 104000, 0x04 }, 1445 .odr_avl[4] = { 208000, 0x05 }, 1446 .odr_avl[5] = { 416000, 0x06 }, 1447 .odr_avl[6] = { 833000, 0x07 }, 1448 .odr_len = 7, 1449 }, 1450 [ST_LSM6DSX_ID_GYRO] = { 1451 .reg = { 1452 .addr = 0x11, 1453 .mask = GENMASK(7, 4), 1454 }, 1455 .odr_avl[0] = { 12500, 0x01 }, 1456 .odr_avl[1] = { 26000, 0x02 }, 1457 .odr_avl[2] = { 52000, 0x03 }, 1458 .odr_avl[3] = { 104000, 0x04 }, 1459 .odr_avl[4] = { 208000, 0x05 }, 1460 .odr_avl[5] = { 416000, 0x06 }, 1461 .odr_avl[6] = { 833000, 0x07 }, 1462 .odr_len = 7, 1463 }, 1464 }, 1465 .fs_table = { 1466 [ST_LSM6DSX_ID_ACC] = { 1467 .reg = { 1468 .addr = 0x10, 1469 .mask = GENMASK(3, 2), 1470 }, 1471 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1472 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 1473 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 1474 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 1475 .fs_len = 4, 1476 }, 1477 [ST_LSM6DSX_ID_GYRO] = { 1478 .reg = { 1479 .addr = 0x11, 1480 .mask = GENMASK(3, 2), 1481 }, 1482 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 1483 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 1484 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 1485 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 1486 .fs_len = 4, 1487 }, 1488 }, 1489 .irq_config = { 1490 .hla = { 1491 .addr = 0x12, 1492 .mask = BIT(5), 1493 }, 1494 .od = { 1495 .addr = 0x12, 1496 .mask = BIT(4), 1497 }, 1498 }, 1499 .shub_settings = { 1500 .page_mux = { 1501 .addr = 0x01, 1502 .mask = BIT(6), 1503 }, 1504 .master_en = { 1505 .sec_page = true, 1506 .addr = 0x14, 1507 .mask = BIT(2), 1508 }, 1509 .pullup_en = { 1510 .sec_page = true, 1511 .addr = 0x14, 1512 .mask = BIT(3), 1513 }, 1514 .aux_sens = { 1515 .addr = 0x14, 1516 .mask = GENMASK(1, 0), 1517 }, 1518 .wr_once = { 1519 .addr = 0x14, 1520 .mask = BIT(6), 1521 }, 1522 .num_ext_dev = 3, 1523 .shub_out = { 1524 .sec_page = true, 1525 .addr = 0x02, 1526 }, 1527 .slv0_addr = 0x15, 1528 .dw_slv0_addr = 0x21, 1529 }, 1530 }, 1531 }; 1532 1533 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1534 { 1535 const struct st_lsm6dsx_shub_settings *hub_settings; 1536 unsigned int data; 1537 int err; 1538 1539 hub_settings = &hw->settings->shub_settings; 1540 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1541 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1542 hub_settings->page_mux.mask, data); 1543 usleep_range(100, 150); 1544 1545 return err; 1546 } 1547 1548 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1549 const char **name) 1550 { 1551 int err, i, j, data; 1552 1553 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1554 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1555 if (st_lsm6dsx_sensor_settings[i].id[j].name && 1556 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1557 break; 1558 } 1559 if (j < ST_LSM6DSX_MAX_ID) 1560 break; 1561 } 1562 1563 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1564 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1565 return -ENODEV; 1566 } 1567 1568 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1569 if (err < 0) { 1570 dev_err(hw->dev, "failed to read whoami register\n"); 1571 return err; 1572 } 1573 1574 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) { 1575 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1576 return -ENODEV; 1577 } 1578 1579 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1580 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1581 1582 return 0; 1583 } 1584 1585 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1586 u32 gain) 1587 { 1588 const struct st_lsm6dsx_fs_table_entry *fs_table; 1589 unsigned int data; 1590 int i, err; 1591 1592 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1593 for (i = 0; i < fs_table->fs_len; i++) { 1594 if (fs_table->fs_avl[i].gain == gain) 1595 break; 1596 } 1597 1598 if (i == fs_table->fs_len) 1599 return -EINVAL; 1600 1601 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1602 fs_table->reg.mask); 1603 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1604 fs_table->reg.mask, data); 1605 if (err < 0) 1606 return err; 1607 1608 sensor->gain = gain; 1609 1610 return 0; 1611 } 1612 1613 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val) 1614 { 1615 const struct st_lsm6dsx_odr_table_entry *odr_table; 1616 int i; 1617 1618 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1619 for (i = 0; i < odr_table->odr_len; i++) { 1620 /* 1621 * ext devices can run at different odr respect to 1622 * accel sensor 1623 */ 1624 if (odr_table->odr_avl[i].milli_hz >= odr) 1625 break; 1626 } 1627 1628 if (i == odr_table->odr_len) 1629 return -EINVAL; 1630 1631 *val = odr_table->odr_avl[i].val; 1632 return odr_table->odr_avl[i].milli_hz; 1633 } 1634 1635 static int 1636 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr, 1637 enum st_lsm6dsx_sensor_id id) 1638 { 1639 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1640 1641 if (odr > 0) { 1642 if (hw->enable_mask & BIT(id)) 1643 return max_t(u32, ref->odr, odr); 1644 else 1645 return odr; 1646 } else { 1647 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1648 } 1649 } 1650 1651 static int 1652 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr) 1653 { 1654 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1655 struct st_lsm6dsx_hw *hw = sensor->hw; 1656 const struct st_lsm6dsx_reg *reg; 1657 unsigned int data; 1658 u8 val = 0; 1659 int err; 1660 1661 switch (sensor->id) { 1662 case ST_LSM6DSX_ID_GYRO: 1663 break; 1664 case ST_LSM6DSX_ID_EXT0: 1665 case ST_LSM6DSX_ID_EXT1: 1666 case ST_LSM6DSX_ID_EXT2: 1667 case ST_LSM6DSX_ID_ACC: { 1668 u32 odr; 1669 int i; 1670 1671 /* 1672 * i2c embedded controller relies on the accelerometer sensor as 1673 * bus read/write trigger so we need to enable accel device 1674 * at odr = max(accel_odr, ext_odr) in order to properly 1675 * communicate with i2c slave devices 1676 */ 1677 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1678 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1679 if (!hw->iio_devs[i] || i == sensor->id) 1680 continue; 1681 1682 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1683 if (odr != req_odr) 1684 /* device already configured */ 1685 return 0; 1686 } 1687 break; 1688 } 1689 default: /* should never occur */ 1690 return -EINVAL; 1691 } 1692 1693 if (req_odr > 0) { 1694 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1695 if (err < 0) 1696 return err; 1697 } 1698 1699 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1700 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1701 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1702 } 1703 1704 static int 1705 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1706 bool enable) 1707 { 1708 struct st_lsm6dsx_hw *hw = sensor->hw; 1709 u32 odr = enable ? sensor->odr : 0; 1710 int err; 1711 1712 err = st_lsm6dsx_set_odr(sensor, odr); 1713 if (err < 0) 1714 return err; 1715 1716 if (enable) 1717 hw->enable_mask |= BIT(sensor->id); 1718 else 1719 hw->enable_mask &= ~BIT(sensor->id); 1720 1721 return 0; 1722 } 1723 1724 static int 1725 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) 1726 { 1727 struct st_lsm6dsx_hw *hw = sensor->hw; 1728 1729 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable) 1730 return 0; 1731 1732 return hw->enable_event; 1733 } 1734 1735 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1736 bool enable) 1737 { 1738 if (st_lsm6dsx_check_events(sensor, enable)) 1739 return 0; 1740 1741 return __st_lsm6dsx_sensor_set_enable(sensor, enable); 1742 } 1743 1744 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1745 u8 addr, int *val) 1746 { 1747 struct st_lsm6dsx_hw *hw = sensor->hw; 1748 int err, delay; 1749 __le16 data; 1750 1751 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1752 if (err < 0) 1753 return err; 1754 1755 /* 1756 * we need to wait for sensor settling time before 1757 * reading data in order to avoid corrupted samples 1758 */ 1759 delay = 1000000000 / sensor->odr; 1760 usleep_range(3 * delay, 4 * delay); 1761 1762 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1763 if (err < 0) 1764 return err; 1765 1766 if (!hw->enable_event) { 1767 err = st_lsm6dsx_sensor_set_enable(sensor, false); 1768 if (err < 0) 1769 return err; 1770 } 1771 1772 *val = (s16)le16_to_cpu(data); 1773 1774 return IIO_VAL_INT; 1775 } 1776 1777 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1778 struct iio_chan_spec const *ch, 1779 int *val, int *val2, long mask) 1780 { 1781 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1782 int ret; 1783 1784 switch (mask) { 1785 case IIO_CHAN_INFO_RAW: 1786 ret = iio_device_claim_direct_mode(iio_dev); 1787 if (ret) 1788 break; 1789 1790 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1791 iio_device_release_direct_mode(iio_dev); 1792 break; 1793 case IIO_CHAN_INFO_SAMP_FREQ: 1794 *val = sensor->odr / 1000; 1795 *val2 = (sensor->odr % 1000) * 1000; 1796 ret = IIO_VAL_INT_PLUS_MICRO; 1797 break; 1798 case IIO_CHAN_INFO_SCALE: 1799 *val = 0; 1800 *val2 = sensor->gain; 1801 ret = IIO_VAL_INT_PLUS_NANO; 1802 break; 1803 default: 1804 ret = -EINVAL; 1805 break; 1806 } 1807 1808 return ret; 1809 } 1810 1811 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1812 struct iio_chan_spec const *chan, 1813 int val, int val2, long mask) 1814 { 1815 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1816 int err; 1817 1818 err = iio_device_claim_direct_mode(iio_dev); 1819 if (err) 1820 return err; 1821 1822 switch (mask) { 1823 case IIO_CHAN_INFO_SCALE: 1824 err = st_lsm6dsx_set_full_scale(sensor, val2); 1825 break; 1826 case IIO_CHAN_INFO_SAMP_FREQ: { 1827 u8 data; 1828 1829 val = val * 1000 + val2 / 1000; 1830 val = st_lsm6dsx_check_odr(sensor, val, &data); 1831 if (val < 0) 1832 err = val; 1833 else 1834 sensor->odr = val; 1835 break; 1836 } 1837 default: 1838 err = -EINVAL; 1839 break; 1840 } 1841 1842 iio_device_release_direct_mode(iio_dev); 1843 1844 return err; 1845 } 1846 1847 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) 1848 { 1849 const struct st_lsm6dsx_reg *reg; 1850 unsigned int data; 1851 int err; 1852 1853 if (!hw->settings->irq_config.irq1_func.addr) 1854 return -ENOTSUPP; 1855 1856 reg = &hw->settings->event_settings.enable_reg; 1857 if (reg->addr) { 1858 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask); 1859 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1860 reg->mask, data); 1861 if (err < 0) 1862 return err; 1863 } 1864 1865 /* Enable wakeup interrupt */ 1866 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); 1867 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, 1868 hw->irq_routing->mask, data); 1869 } 1870 1871 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 1872 const struct iio_chan_spec *chan, 1873 enum iio_event_type type, 1874 enum iio_event_direction dir, 1875 enum iio_event_info info, 1876 int *val, int *val2) 1877 { 1878 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1879 struct st_lsm6dsx_hw *hw = sensor->hw; 1880 1881 if (type != IIO_EV_TYPE_THRESH) 1882 return -EINVAL; 1883 1884 *val2 = 0; 1885 *val = hw->event_threshold; 1886 1887 return IIO_VAL_INT; 1888 } 1889 1890 static int 1891 st_lsm6dsx_write_event(struct iio_dev *iio_dev, 1892 const struct iio_chan_spec *chan, 1893 enum iio_event_type type, 1894 enum iio_event_direction dir, 1895 enum iio_event_info info, 1896 int val, int val2) 1897 { 1898 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1899 struct st_lsm6dsx_hw *hw = sensor->hw; 1900 const struct st_lsm6dsx_reg *reg; 1901 unsigned int data; 1902 int err; 1903 1904 if (type != IIO_EV_TYPE_THRESH) 1905 return -EINVAL; 1906 1907 if (val < 0 || val > 31) 1908 return -EINVAL; 1909 1910 reg = &hw->settings->event_settings.wakeup_reg; 1911 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1912 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1913 reg->mask, data); 1914 if (err < 0) 1915 return -EINVAL; 1916 1917 hw->event_threshold = val; 1918 1919 return 0; 1920 } 1921 1922 static int 1923 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 1924 const struct iio_chan_spec *chan, 1925 enum iio_event_type type, 1926 enum iio_event_direction dir) 1927 { 1928 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1929 struct st_lsm6dsx_hw *hw = sensor->hw; 1930 1931 if (type != IIO_EV_TYPE_THRESH) 1932 return -EINVAL; 1933 1934 return !!(hw->enable_event & BIT(chan->channel2)); 1935 } 1936 1937 static int 1938 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 1939 const struct iio_chan_spec *chan, 1940 enum iio_event_type type, 1941 enum iio_event_direction dir, int state) 1942 { 1943 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1944 struct st_lsm6dsx_hw *hw = sensor->hw; 1945 u8 enable_event; 1946 int err; 1947 1948 if (type != IIO_EV_TYPE_THRESH) 1949 return -EINVAL; 1950 1951 if (state) { 1952 enable_event = hw->enable_event | BIT(chan->channel2); 1953 1954 /* do not enable events if they are already enabled */ 1955 if (hw->enable_event) 1956 goto out; 1957 } else { 1958 enable_event = hw->enable_event & ~BIT(chan->channel2); 1959 1960 /* only turn off sensor if no events is enabled */ 1961 if (enable_event) 1962 goto out; 1963 } 1964 1965 /* stop here if no changes have been made */ 1966 if (hw->enable_event == enable_event) 1967 return 0; 1968 1969 err = st_lsm6dsx_event_setup(hw, state); 1970 if (err < 0) 1971 return err; 1972 1973 mutex_lock(&hw->conf_lock); 1974 if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) 1975 err = __st_lsm6dsx_sensor_set_enable(sensor, state); 1976 mutex_unlock(&hw->conf_lock); 1977 if (err < 0) 1978 return err; 1979 1980 out: 1981 hw->enable_event = enable_event; 1982 1983 return 0; 1984 } 1985 1986 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1987 { 1988 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1989 struct st_lsm6dsx_hw *hw = sensor->hw; 1990 int err; 1991 1992 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size); 1993 1994 mutex_lock(&hw->conf_lock); 1995 1996 err = st_lsm6dsx_update_watermark(sensor, val); 1997 1998 mutex_unlock(&hw->conf_lock); 1999 2000 if (err < 0) 2001 return err; 2002 2003 sensor->watermark = val; 2004 2005 return 0; 2006 } 2007 2008 static ssize_t 2009 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 2010 struct device_attribute *attr, 2011 char *buf) 2012 { 2013 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 2014 const struct st_lsm6dsx_odr_table_entry *odr_table; 2015 int i, len = 0; 2016 2017 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 2018 for (i = 0; i < odr_table->odr_len; i++) 2019 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ", 2020 odr_table->odr_avl[i].milli_hz / 1000, 2021 odr_table->odr_avl[i].milli_hz % 1000); 2022 buf[len - 1] = '\n'; 2023 2024 return len; 2025 } 2026 2027 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 2028 struct device_attribute *attr, 2029 char *buf) 2030 { 2031 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 2032 const struct st_lsm6dsx_fs_table_entry *fs_table; 2033 struct st_lsm6dsx_hw *hw = sensor->hw; 2034 int i, len = 0; 2035 2036 fs_table = &hw->settings->fs_table[sensor->id]; 2037 for (i = 0; i < fs_table->fs_len; i++) 2038 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ", 2039 fs_table->fs_avl[i].gain); 2040 buf[len - 1] = '\n'; 2041 2042 return len; 2043 } 2044 2045 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev, 2046 struct iio_chan_spec const *chan, 2047 long mask) 2048 { 2049 switch (mask) { 2050 case IIO_CHAN_INFO_SCALE: 2051 switch (chan->type) { 2052 case IIO_ANGL_VEL: 2053 case IIO_ACCEL: 2054 return IIO_VAL_INT_PLUS_NANO; 2055 default: 2056 return IIO_VAL_INT_PLUS_MICRO; 2057 } 2058 default: 2059 return IIO_VAL_INT_PLUS_MICRO; 2060 } 2061 } 2062 2063 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 2064 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 2065 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 2066 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 2067 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 2068 2069 static struct attribute *st_lsm6dsx_acc_attributes[] = { 2070 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 2071 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 2072 NULL, 2073 }; 2074 2075 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 2076 .attrs = st_lsm6dsx_acc_attributes, 2077 }; 2078 2079 static const struct iio_info st_lsm6dsx_acc_info = { 2080 .attrs = &st_lsm6dsx_acc_attribute_group, 2081 .read_raw = st_lsm6dsx_read_raw, 2082 .write_raw = st_lsm6dsx_write_raw, 2083 .read_event_value = st_lsm6dsx_read_event, 2084 .write_event_value = st_lsm6dsx_write_event, 2085 .read_event_config = st_lsm6dsx_read_event_config, 2086 .write_event_config = st_lsm6dsx_write_event_config, 2087 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 2088 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 2089 }; 2090 2091 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 2092 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 2093 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 2094 NULL, 2095 }; 2096 2097 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 2098 .attrs = st_lsm6dsx_gyro_attributes, 2099 }; 2100 2101 static const struct iio_info st_lsm6dsx_gyro_info = { 2102 .attrs = &st_lsm6dsx_gyro_attribute_group, 2103 .read_raw = st_lsm6dsx_read_raw, 2104 .write_raw = st_lsm6dsx_write_raw, 2105 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 2106 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 2107 }; 2108 2109 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 2110 { 2111 struct device *dev = hw->dev; 2112 2113 if (!dev_fwnode(dev)) 2114 return -EINVAL; 2115 2116 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin); 2117 } 2118 2119 static int 2120 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 2121 const struct st_lsm6dsx_reg **drdy_reg) 2122 { 2123 int err = 0, drdy_pin; 2124 2125 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) { 2126 struct st_sensors_platform_data *pdata; 2127 struct device *dev = hw->dev; 2128 2129 pdata = (struct st_sensors_platform_data *)dev->platform_data; 2130 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 2131 } 2132 2133 switch (drdy_pin) { 2134 case 1: 2135 hw->irq_routing = &hw->settings->irq_config.irq1_func; 2136 *drdy_reg = &hw->settings->irq_config.irq1; 2137 break; 2138 case 2: 2139 hw->irq_routing = &hw->settings->irq_config.irq2_func; 2140 *drdy_reg = &hw->settings->irq_config.irq2; 2141 break; 2142 default: 2143 dev_err(hw->dev, "unsupported data ready pin\n"); 2144 err = -EINVAL; 2145 break; 2146 } 2147 2148 return err; 2149 } 2150 2151 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 2152 { 2153 const struct st_lsm6dsx_shub_settings *hub_settings; 2154 struct st_sensors_platform_data *pdata; 2155 struct device *dev = hw->dev; 2156 unsigned int data; 2157 int err = 0; 2158 2159 hub_settings = &hw->settings->shub_settings; 2160 2161 pdata = (struct st_sensors_platform_data *)dev->platform_data; 2162 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) || 2163 (pdata && pdata->pullups)) { 2164 if (hub_settings->pullup_en.sec_page) { 2165 err = st_lsm6dsx_set_page(hw, true); 2166 if (err < 0) 2167 return err; 2168 } 2169 2170 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 2171 err = regmap_update_bits(hw->regmap, 2172 hub_settings->pullup_en.addr, 2173 hub_settings->pullup_en.mask, data); 2174 2175 if (hub_settings->pullup_en.sec_page) 2176 st_lsm6dsx_set_page(hw, false); 2177 2178 if (err < 0) 2179 return err; 2180 } 2181 2182 if (hub_settings->aux_sens.addr) { 2183 /* configure aux sensors */ 2184 err = st_lsm6dsx_set_page(hw, true); 2185 if (err < 0) 2186 return err; 2187 2188 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 2189 err = regmap_update_bits(hw->regmap, 2190 hub_settings->aux_sens.addr, 2191 hub_settings->aux_sens.mask, data); 2192 2193 st_lsm6dsx_set_page(hw, false); 2194 2195 if (err < 0) 2196 return err; 2197 } 2198 2199 if (hub_settings->emb_func.addr) { 2200 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask); 2201 err = regmap_update_bits(hw->regmap, 2202 hub_settings->emb_func.addr, 2203 hub_settings->emb_func.mask, data); 2204 } 2205 2206 return err; 2207 } 2208 2209 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 2210 { 2211 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 2212 int err, val; 2213 2214 ts_settings = &hw->settings->ts_settings; 2215 /* enable hw timestamp generation if necessary */ 2216 if (ts_settings->timer_en.addr) { 2217 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 2218 err = regmap_update_bits(hw->regmap, 2219 ts_settings->timer_en.addr, 2220 ts_settings->timer_en.mask, val); 2221 if (err < 0) 2222 return err; 2223 } 2224 2225 /* enable high resolution for hw ts timer if necessary */ 2226 if (ts_settings->hr_timer.addr) { 2227 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 2228 err = regmap_update_bits(hw->regmap, 2229 ts_settings->hr_timer.addr, 2230 ts_settings->hr_timer.mask, val); 2231 if (err < 0) 2232 return err; 2233 } 2234 2235 /* enable ts queueing in FIFO if necessary */ 2236 if (ts_settings->fifo_en.addr) { 2237 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 2238 err = regmap_update_bits(hw->regmap, 2239 ts_settings->fifo_en.addr, 2240 ts_settings->fifo_en.mask, val); 2241 if (err < 0) 2242 return err; 2243 } 2244 2245 /* calibrate timestamp sensitivity */ 2246 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY; 2247 if (ts_settings->freq_fine) { 2248 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val); 2249 if (err < 0) 2250 return err; 2251 2252 /* 2253 * linearize the AN5192 formula: 2254 * 1 / (1 + x) ~= 1 - x (Taylor’s Series) 2255 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val)) 2256 * ttrim[ns] ~= 25000 - 37.5 * val 2257 * ttrim[ns] ~= 25000 - (37500 * val) / 1000 2258 */ 2259 hw->ts_gain -= ((s8)val * 37500) / 1000; 2260 } 2261 2262 return 0; 2263 } 2264 2265 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw) 2266 { 2267 const struct st_lsm6dsx_reg *reg; 2268 int err; 2269 2270 /* 2271 * flush hw FIFO before device reset in order to avoid 2272 * possible races on interrupt line 1. If the first interrupt 2273 * line is asserted during hw reset the device will work in 2274 * I3C-only mode (if it is supported) 2275 */ 2276 err = st_lsm6dsx_flush_fifo(hw); 2277 if (err < 0 && err != -ENOTSUPP) 2278 return err; 2279 2280 /* device sw reset */ 2281 reg = &hw->settings->reset; 2282 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2283 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2284 if (err < 0) 2285 return err; 2286 2287 msleep(50); 2288 2289 /* reload trimming parameter */ 2290 reg = &hw->settings->boot; 2291 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2292 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2293 if (err < 0) 2294 return err; 2295 2296 msleep(50); 2297 2298 return 0; 2299 } 2300 2301 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 2302 { 2303 const struct st_lsm6dsx_reg *reg; 2304 int err; 2305 2306 err = st_lsm6dsx_reset_device(hw); 2307 if (err < 0) 2308 return err; 2309 2310 /* enable Block Data Update */ 2311 reg = &hw->settings->bdu; 2312 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2313 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2314 if (err < 0) 2315 return err; 2316 2317 /* enable FIFO watermak interrupt */ 2318 err = st_lsm6dsx_get_drdy_reg(hw, ®); 2319 if (err < 0) 2320 return err; 2321 2322 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2323 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2324 if (err < 0) 2325 return err; 2326 2327 /* enable Latched interrupts for device events */ 2328 if (hw->settings->irq_config.lir.addr) { 2329 reg = &hw->settings->irq_config.lir; 2330 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2331 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2332 if (err < 0) 2333 return err; 2334 2335 /* enable clear on read for latched interrupts */ 2336 if (hw->settings->irq_config.clear_on_read.addr) { 2337 reg = &hw->settings->irq_config.clear_on_read; 2338 err = regmap_update_bits(hw->regmap, 2339 reg->addr, reg->mask, 2340 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2341 if (err < 0) 2342 return err; 2343 } 2344 } 2345 2346 /* enable drdy-mas if available */ 2347 if (hw->settings->drdy_mask.addr) { 2348 reg = &hw->settings->drdy_mask; 2349 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2350 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2351 if (err < 0) 2352 return err; 2353 } 2354 2355 err = st_lsm6dsx_init_shub(hw); 2356 if (err < 0) 2357 return err; 2358 2359 return st_lsm6dsx_init_hw_timer(hw); 2360 } 2361 2362 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 2363 enum st_lsm6dsx_sensor_id id, 2364 const char *name) 2365 { 2366 struct st_lsm6dsx_sensor *sensor; 2367 struct iio_dev *iio_dev; 2368 2369 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 2370 if (!iio_dev) 2371 return NULL; 2372 2373 iio_dev->modes = INDIO_DIRECT_MODE; 2374 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 2375 iio_dev->channels = hw->settings->channels[id].chan; 2376 iio_dev->num_channels = hw->settings->channels[id].len; 2377 2378 sensor = iio_priv(iio_dev); 2379 sensor->id = id; 2380 sensor->hw = hw; 2381 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz; 2382 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 2383 sensor->watermark = 1; 2384 2385 switch (id) { 2386 case ST_LSM6DSX_ID_ACC: 2387 iio_dev->info = &st_lsm6dsx_acc_info; 2388 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 2389 name); 2390 break; 2391 case ST_LSM6DSX_ID_GYRO: 2392 iio_dev->info = &st_lsm6dsx_gyro_info; 2393 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 2394 name); 2395 break; 2396 default: 2397 return NULL; 2398 } 2399 iio_dev->name = sensor->name; 2400 2401 return iio_dev; 2402 } 2403 2404 static bool 2405 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 2406 { 2407 const struct st_lsm6dsx_event_settings *event_settings; 2408 int err, data; 2409 s64 timestamp; 2410 2411 if (!hw->enable_event) 2412 return false; 2413 2414 event_settings = &hw->settings->event_settings; 2415 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, 2416 &data, sizeof(data)); 2417 if (err < 0) 2418 return false; 2419 2420 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 2421 if ((data & hw->settings->event_settings.wakeup_src_z_mask) && 2422 (hw->enable_event & BIT(IIO_MOD_Z))) 2423 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2424 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2425 0, 2426 IIO_MOD_Z, 2427 IIO_EV_TYPE_THRESH, 2428 IIO_EV_DIR_EITHER), 2429 timestamp); 2430 2431 if ((data & hw->settings->event_settings.wakeup_src_y_mask) && 2432 (hw->enable_event & BIT(IIO_MOD_Y))) 2433 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2434 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2435 0, 2436 IIO_MOD_Y, 2437 IIO_EV_TYPE_THRESH, 2438 IIO_EV_DIR_EITHER), 2439 timestamp); 2440 2441 if ((data & hw->settings->event_settings.wakeup_src_x_mask) && 2442 (hw->enable_event & BIT(IIO_MOD_X))) 2443 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2444 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2445 0, 2446 IIO_MOD_X, 2447 IIO_EV_TYPE_THRESH, 2448 IIO_EV_DIR_EITHER), 2449 timestamp); 2450 2451 return data & event_settings->wakeup_src_status_mask; 2452 } 2453 2454 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 2455 { 2456 struct st_lsm6dsx_hw *hw = private; 2457 int fifo_len = 0, len; 2458 bool event; 2459 2460 event = st_lsm6dsx_report_motion_event(hw); 2461 2462 if (!hw->settings->fifo_ops.read_fifo) 2463 return event ? IRQ_HANDLED : IRQ_NONE; 2464 2465 /* 2466 * If we are using edge IRQs, new samples can arrive while 2467 * processing current interrupt since there are no hw 2468 * guarantees the irq line stays "low" long enough to properly 2469 * detect the new interrupt. In this case the new sample will 2470 * be missed. 2471 * Polling FIFO status register allow us to read new 2472 * samples even if the interrupt arrives while processing 2473 * previous data and the timeslot where the line is "low" is 2474 * too short to be properly detected. 2475 */ 2476 do { 2477 mutex_lock(&hw->fifo_lock); 2478 len = hw->settings->fifo_ops.read_fifo(hw); 2479 mutex_unlock(&hw->fifo_lock); 2480 2481 if (len > 0) 2482 fifo_len += len; 2483 } while (len > 0); 2484 2485 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE; 2486 } 2487 2488 static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq, 2489 void *private) 2490 { 2491 struct iio_poll_func *pf = private; 2492 struct iio_dev *iio_dev = pf->indio_dev; 2493 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2494 struct st_lsm6dsx_hw *hw = sensor->hw; 2495 2496 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2497 sensor->id == ST_LSM6DSX_ID_EXT1 || 2498 sensor->id == ST_LSM6DSX_ID_EXT2) 2499 st_lsm6dsx_shub_read_output(hw, 2500 (u8 *)hw->scan[sensor->id].channels, 2501 sizeof(hw->scan[sensor->id].channels)); 2502 else 2503 st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address, 2504 hw->scan[sensor->id].channels, 2505 sizeof(hw->scan[sensor->id].channels)); 2506 2507 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id], 2508 iio_get_time_ns(iio_dev)); 2509 iio_trigger_notify_done(iio_dev->trig); 2510 2511 return IRQ_HANDLED; 2512 } 2513 2514 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 2515 { 2516 struct st_sensors_platform_data *pdata; 2517 const struct st_lsm6dsx_reg *reg; 2518 struct device *dev = hw->dev; 2519 unsigned long irq_type; 2520 bool irq_active_low; 2521 int err; 2522 2523 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 2524 2525 switch (irq_type) { 2526 case IRQF_TRIGGER_HIGH: 2527 case IRQF_TRIGGER_RISING: 2528 irq_active_low = false; 2529 break; 2530 case IRQF_TRIGGER_LOW: 2531 case IRQF_TRIGGER_FALLING: 2532 irq_active_low = true; 2533 break; 2534 default: 2535 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 2536 return -EINVAL; 2537 } 2538 2539 reg = &hw->settings->irq_config.hla; 2540 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2541 ST_LSM6DSX_SHIFT_VAL(irq_active_low, 2542 reg->mask)); 2543 if (err < 0) 2544 return err; 2545 2546 pdata = (struct st_sensors_platform_data *)dev->platform_data; 2547 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) || 2548 (pdata && pdata->open_drain)) { 2549 reg = &hw->settings->irq_config.od; 2550 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2551 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2552 if (err < 0) 2553 return err; 2554 2555 irq_type |= IRQF_SHARED; 2556 } 2557 2558 err = devm_request_threaded_irq(hw->dev, hw->irq, 2559 NULL, 2560 st_lsm6dsx_handler_thread, 2561 irq_type | IRQF_ONESHOT, 2562 "lsm6dsx", hw); 2563 if (err) { 2564 dev_err(hw->dev, "failed to request trigger irq %d\n", 2565 hw->irq); 2566 return err; 2567 } 2568 2569 return 0; 2570 } 2571 2572 static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev) 2573 { 2574 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2575 2576 return st_lsm6dsx_device_set_enable(sensor, true); 2577 } 2578 2579 static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev) 2580 { 2581 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2582 2583 return st_lsm6dsx_device_set_enable(sensor, false); 2584 } 2585 2586 static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = { 2587 .preenable = st_lsm6dsx_sw_buffer_preenable, 2588 .postdisable = st_lsm6dsx_sw_buffer_postdisable, 2589 }; 2590 2591 static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw) 2592 { 2593 int i; 2594 2595 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2596 int err; 2597 2598 if (!hw->iio_devs[i]) 2599 continue; 2600 2601 err = devm_iio_triggered_buffer_setup(hw->dev, 2602 hw->iio_devs[i], NULL, 2603 st_lsm6dsx_sw_trigger_handler_thread, 2604 &st_lsm6dsx_sw_buffer_ops); 2605 if (err) 2606 return err; 2607 } 2608 2609 return 0; 2610 } 2611 2612 static int st_lsm6dsx_init_regulators(struct device *dev) 2613 { 2614 /* vdd-vddio power regulators */ 2615 static const char * const regulators[] = { "vdd", "vddio" }; 2616 int err; 2617 2618 err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), 2619 regulators); 2620 if (err) 2621 return dev_err_probe(dev, err, "failed to enable regulators\n"); 2622 2623 msleep(50); 2624 2625 return 0; 2626 } 2627 2628 #ifdef CONFIG_ACPI 2629 2630 static int lsm6dsx_get_acpi_mount_matrix(struct device *dev, 2631 struct iio_mount_matrix *orientation) 2632 { 2633 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 2634 struct acpi_device *adev = ACPI_COMPANION(dev); 2635 union acpi_object *obj, *elements; 2636 acpi_status status; 2637 int i, j, val[3]; 2638 char *str; 2639 2640 if (!has_acpi_companion(dev)) 2641 return -EINVAL; 2642 2643 if (!acpi_has_method(adev->handle, "ROTM")) 2644 return -EINVAL; 2645 2646 status = acpi_evaluate_object(adev->handle, "ROTM", NULL, &buffer); 2647 if (ACPI_FAILURE(status)) { 2648 dev_warn(dev, "Failed to get ACPI mount matrix: %d\n", status); 2649 return -EINVAL; 2650 } 2651 2652 obj = buffer.pointer; 2653 if (obj->type != ACPI_TYPE_PACKAGE || obj->package.count != 3) 2654 goto unknown_format; 2655 2656 elements = obj->package.elements; 2657 for (i = 0; i < 3; i++) { 2658 if (elements[i].type != ACPI_TYPE_STRING) 2659 goto unknown_format; 2660 2661 str = elements[i].string.pointer; 2662 if (sscanf(str, "%d %d %d", &val[0], &val[1], &val[2]) != 3) 2663 goto unknown_format; 2664 2665 for (j = 0; j < 3; j++) { 2666 switch (val[j]) { 2667 case -1: str = "-1"; break; 2668 case 0: str = "0"; break; 2669 case 1: str = "1"; break; 2670 default: goto unknown_format; 2671 } 2672 orientation->rotation[i * 3 + j] = str; 2673 } 2674 } 2675 2676 kfree(buffer.pointer); 2677 return 0; 2678 2679 unknown_format: 2680 dev_warn(dev, "Unknown ACPI mount matrix format, ignoring\n"); 2681 kfree(buffer.pointer); 2682 return -EINVAL; 2683 } 2684 2685 #else 2686 2687 static int lsm6dsx_get_acpi_mount_matrix(struct device *dev, 2688 struct iio_mount_matrix *orientation) 2689 { 2690 return false; 2691 } 2692 2693 #endif 2694 2695 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 2696 struct regmap *regmap) 2697 { 2698 struct st_sensors_platform_data *pdata = dev->platform_data; 2699 const struct st_lsm6dsx_shub_settings *hub_settings; 2700 struct st_lsm6dsx_hw *hw; 2701 const char *name = NULL; 2702 int i, err; 2703 2704 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 2705 if (!hw) 2706 return -ENOMEM; 2707 2708 dev_set_drvdata(dev, (void *)hw); 2709 2710 mutex_init(&hw->fifo_lock); 2711 mutex_init(&hw->conf_lock); 2712 mutex_init(&hw->page_lock); 2713 2714 err = st_lsm6dsx_init_regulators(dev); 2715 if (err) 2716 return err; 2717 2718 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 2719 if (!hw->buff) 2720 return -ENOMEM; 2721 2722 hw->dev = dev; 2723 hw->irq = irq; 2724 hw->regmap = regmap; 2725 2726 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 2727 if (err < 0) 2728 return err; 2729 2730 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2731 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2732 if (!hw->iio_devs[i]) 2733 return -ENOMEM; 2734 } 2735 2736 err = st_lsm6dsx_init_device(hw); 2737 if (err < 0) 2738 return err; 2739 2740 hub_settings = &hw->settings->shub_settings; 2741 if (hub_settings->master_en.addr && 2742 (!dev_fwnode(dev) || 2743 !device_property_read_bool(dev, "st,disable-sensor-hub"))) { 2744 err = st_lsm6dsx_shub_probe(hw, name); 2745 if (err < 0) 2746 return err; 2747 } 2748 2749 if (hw->irq > 0) { 2750 err = st_lsm6dsx_irq_setup(hw); 2751 if (err < 0) 2752 return err; 2753 2754 err = st_lsm6dsx_fifo_setup(hw); 2755 if (err < 0) 2756 return err; 2757 } 2758 2759 if (!hw->irq || !hw->settings->fifo_ops.read_fifo) { 2760 /* 2761 * Rely on sw triggers (e.g. hr-timers) if irq pin is not 2762 * connected of if the device does not support HW FIFO 2763 */ 2764 err = st_lsm6dsx_sw_buffers_setup(hw); 2765 if (err) 2766 return err; 2767 } 2768 2769 err = lsm6dsx_get_acpi_mount_matrix(hw->dev, &hw->orientation); 2770 if (err) { 2771 err = iio_read_mount_matrix(hw->dev, &hw->orientation); 2772 if (err) 2773 return err; 2774 } 2775 2776 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2777 if (!hw->iio_devs[i]) 2778 continue; 2779 2780 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2781 if (err) 2782 return err; 2783 } 2784 2785 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) || 2786 (pdata && pdata->wakeup_source)) 2787 device_init_wakeup(dev, true); 2788 2789 return 0; 2790 } 2791 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, IIO_LSM6DSX); 2792 2793 static int st_lsm6dsx_suspend(struct device *dev) 2794 { 2795 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2796 struct st_lsm6dsx_sensor *sensor; 2797 int i, err = 0; 2798 2799 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2800 if (!hw->iio_devs[i]) 2801 continue; 2802 2803 sensor = iio_priv(hw->iio_devs[i]); 2804 if (!(hw->enable_mask & BIT(sensor->id))) 2805 continue; 2806 2807 if (device_may_wakeup(dev) && 2808 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { 2809 /* Enable wake from IRQ */ 2810 enable_irq_wake(hw->irq); 2811 continue; 2812 } 2813 2814 err = st_lsm6dsx_device_set_enable(sensor, false); 2815 if (err < 0) 2816 return err; 2817 2818 hw->suspend_mask |= BIT(sensor->id); 2819 } 2820 2821 if (hw->fifo_mask) 2822 err = st_lsm6dsx_flush_fifo(hw); 2823 2824 return err; 2825 } 2826 2827 static int st_lsm6dsx_resume(struct device *dev) 2828 { 2829 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2830 struct st_lsm6dsx_sensor *sensor; 2831 int i, err = 0; 2832 2833 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2834 if (!hw->iio_devs[i]) 2835 continue; 2836 2837 sensor = iio_priv(hw->iio_devs[i]); 2838 if (device_may_wakeup(dev) && 2839 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) 2840 disable_irq_wake(hw->irq); 2841 2842 if (!(hw->suspend_mask & BIT(sensor->id))) 2843 continue; 2844 2845 err = st_lsm6dsx_device_set_enable(sensor, true); 2846 if (err < 0) 2847 return err; 2848 2849 hw->suspend_mask &= ~BIT(sensor->id); 2850 } 2851 2852 if (hw->fifo_mask) 2853 err = st_lsm6dsx_resume_fifo(hw); 2854 2855 return err; 2856 } 2857 2858 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend, 2859 st_lsm6dsx_resume, IIO_LSM6DSX); 2860 2861 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 2862 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 2863 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 2864 MODULE_LICENSE("GPL v2"); 2865