1 // SPDX-License-Identifier: GPL-2.0
2 // LPC interface for ChromeOS Embedded Controller
3 //
4 // Copyright (C) 2012-2015 Google, Inc
5 //
6 // This driver uses the ChromeOS EC byte-level message-based protocol for
7 // communicating the keyboard state (which keys are pressed) from a keyboard EC
8 // to the AP over some bus (such as i2c, lpc, spi).  The EC does debouncing,
9 // but everything else (including deghosting) is done here.  The main
10 // motivation for this is to keep the EC firmware as simple as possible, since
11 // it cannot be easily upgraded and EC flash/IRAM space is relatively
12 // expensive.
13 
14 #include <linux/acpi.h>
15 #include <linux/dmi.h>
16 #include <linux/delay.h>
17 #include <linux/io.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/platform_data/cros_ec_commands.h>
21 #include <linux/platform_data/cros_ec_proto.h>
22 #include <linux/platform_device.h>
23 #include <linux/printk.h>
24 #include <linux/suspend.h>
25 
26 #include "cros_ec.h"
27 #include "cros_ec_lpc_mec.h"
28 
29 #define DRV_NAME "cros_ec_lpcs"
30 #define ACPI_DRV_NAME "GOOG0004"
31 
32 /* True if ACPI device is present */
33 static bool cros_ec_lpc_acpi_device_found;
34 
35 /**
36  * struct lpc_driver_ops - LPC driver operations
37  * @read: Copy length bytes from EC address offset into buffer dest. Returns
38  *        the 8-bit checksum of all bytes read.
39  * @write: Copy length bytes from buffer msg into EC address offset. Returns
40  *         the 8-bit checksum of all bytes written.
41  */
42 struct lpc_driver_ops {
43 	u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
44 	u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
45 };
46 
47 static struct lpc_driver_ops cros_ec_lpc_ops = { };
48 
49 /*
50  * A generic instance of the read function of struct lpc_driver_ops, used for
51  * the LPC EC.
52  */
53 static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
54 				 u8 *dest)
55 {
56 	int sum = 0;
57 	int i;
58 
59 	for (i = 0; i < length; ++i) {
60 		dest[i] = inb(offset + i);
61 		sum += dest[i];
62 	}
63 
64 	/* Return checksum of all bytes read */
65 	return sum;
66 }
67 
68 /*
69  * A generic instance of the write function of struct lpc_driver_ops, used for
70  * the LPC EC.
71  */
72 static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
73 				  const u8 *msg)
74 {
75 	int sum = 0;
76 	int i;
77 
78 	for (i = 0; i < length; ++i) {
79 		outb(msg[i], offset + i);
80 		sum += msg[i];
81 	}
82 
83 	/* Return checksum of all bytes written */
84 	return sum;
85 }
86 
87 /*
88  * An instance of the read function of struct lpc_driver_ops, used for the
89  * MEC variant of LPC EC.
90  */
91 static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
92 				     u8 *dest)
93 {
94 	int in_range = cros_ec_lpc_mec_in_range(offset, length);
95 
96 	if (in_range < 0)
97 		return 0;
98 
99 	return in_range ?
100 		cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
101 					 offset - EC_HOST_CMD_REGION0,
102 					 length, dest) :
103 		cros_ec_lpc_read_bytes(offset, length, dest);
104 }
105 
106 /*
107  * An instance of the write function of struct lpc_driver_ops, used for the
108  * MEC variant of LPC EC.
109  */
110 static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
111 				      const u8 *msg)
112 {
113 	int in_range = cros_ec_lpc_mec_in_range(offset, length);
114 
115 	if (in_range < 0)
116 		return 0;
117 
118 	return in_range ?
119 		cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
120 					 offset - EC_HOST_CMD_REGION0,
121 					 length, (u8 *)msg) :
122 		cros_ec_lpc_write_bytes(offset, length, msg);
123 }
124 
125 static int ec_response_timed_out(void)
126 {
127 	unsigned long one_second = jiffies + HZ;
128 	u8 data;
129 
130 	usleep_range(200, 300);
131 	do {
132 		if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
133 		    EC_LPC_STATUS_BUSY_MASK))
134 			return 0;
135 		usleep_range(100, 200);
136 	} while (time_before(jiffies, one_second));
137 
138 	return 1;
139 }
140 
141 static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
142 				struct cros_ec_command *msg)
143 {
144 	struct ec_host_response response;
145 	u8 sum;
146 	int ret = 0;
147 	u8 *dout;
148 
149 	ret = cros_ec_prepare_tx(ec, msg);
150 
151 	/* Write buffer */
152 	cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
153 
154 	/* Here we go */
155 	sum = EC_COMMAND_PROTOCOL_3;
156 	cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
157 
158 	if (ec_response_timed_out()) {
159 		dev_warn(ec->dev, "EC responsed timed out\n");
160 		ret = -EIO;
161 		goto done;
162 	}
163 
164 	/* Check result */
165 	msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
166 	ret = cros_ec_check_result(ec, msg);
167 	if (ret)
168 		goto done;
169 
170 	/* Read back response */
171 	dout = (u8 *)&response;
172 	sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
173 				   dout);
174 
175 	msg->result = response.result;
176 
177 	if (response.data_len > msg->insize) {
178 		dev_err(ec->dev,
179 			"packet too long (%d bytes, expected %d)",
180 			response.data_len, msg->insize);
181 		ret = -EMSGSIZE;
182 		goto done;
183 	}
184 
185 	/* Read response and process checksum */
186 	sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
187 				    sizeof(response), response.data_len,
188 				    msg->data);
189 
190 	if (sum) {
191 		dev_err(ec->dev,
192 			"bad packet checksum %02x\n",
193 			response.checksum);
194 		ret = -EBADMSG;
195 		goto done;
196 	}
197 
198 	/* Return actual amount of data received */
199 	ret = response.data_len;
200 done:
201 	return ret;
202 }
203 
204 static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
205 				struct cros_ec_command *msg)
206 {
207 	struct ec_lpc_host_args args;
208 	u8 sum;
209 	int ret = 0;
210 
211 	if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
212 	    msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
213 		dev_err(ec->dev,
214 			"invalid buffer sizes (out %d, in %d)\n",
215 			msg->outsize, msg->insize);
216 		return -EINVAL;
217 	}
218 
219 	/* Now actually send the command to the EC and get the result */
220 	args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
221 	args.command_version = msg->version;
222 	args.data_size = msg->outsize;
223 
224 	/* Initialize checksum */
225 	sum = msg->command + args.flags + args.command_version + args.data_size;
226 
227 	/* Copy data and update checksum */
228 	sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
229 				     msg->data);
230 
231 	/* Finalize checksum and write args */
232 	args.checksum = sum;
233 	cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
234 			      (u8 *)&args);
235 
236 	/* Here we go */
237 	sum = msg->command;
238 	cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
239 
240 	if (ec_response_timed_out()) {
241 		dev_warn(ec->dev, "EC responsed timed out\n");
242 		ret = -EIO;
243 		goto done;
244 	}
245 
246 	/* Check result */
247 	msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
248 	ret = cros_ec_check_result(ec, msg);
249 	if (ret)
250 		goto done;
251 
252 	/* Read back args */
253 	cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
254 
255 	if (args.data_size > msg->insize) {
256 		dev_err(ec->dev,
257 			"packet too long (%d bytes, expected %d)",
258 			args.data_size, msg->insize);
259 		ret = -ENOSPC;
260 		goto done;
261 	}
262 
263 	/* Start calculating response checksum */
264 	sum = msg->command + args.flags + args.command_version + args.data_size;
265 
266 	/* Read response and update checksum */
267 	sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
268 				    msg->data);
269 
270 	/* Verify checksum */
271 	if (args.checksum != sum) {
272 		dev_err(ec->dev,
273 			"bad packet checksum, expected %02x, got %02x\n",
274 			args.checksum, sum);
275 		ret = -EBADMSG;
276 		goto done;
277 	}
278 
279 	/* Return actual amount of data received */
280 	ret = args.data_size;
281 done:
282 	return ret;
283 }
284 
285 /* Returns num bytes read, or negative on error. Doesn't need locking. */
286 static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
287 			       unsigned int bytes, void *dest)
288 {
289 	int i = offset;
290 	char *s = dest;
291 	int cnt = 0;
292 
293 	if (offset >= EC_MEMMAP_SIZE - bytes)
294 		return -EINVAL;
295 
296 	/* fixed length */
297 	if (bytes) {
298 		cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
299 		return bytes;
300 	}
301 
302 	/* string */
303 	for (; i < EC_MEMMAP_SIZE; i++, s++) {
304 		cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
305 		cnt++;
306 		if (!*s)
307 			break;
308 	}
309 
310 	return cnt;
311 }
312 
313 static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
314 {
315 	struct cros_ec_device *ec_dev = data;
316 	bool ec_has_more_events;
317 	int ret;
318 
319 	ec_dev->last_event_time = cros_ec_get_time_ns();
320 
321 	if (ec_dev->mkbp_event_supported)
322 		do {
323 			ret = cros_ec_get_next_event(ec_dev, NULL,
324 						     &ec_has_more_events);
325 			if (ret > 0)
326 				blocking_notifier_call_chain(
327 						&ec_dev->event_notifier, 0,
328 						ec_dev);
329 		} while (ec_has_more_events);
330 
331 	if (value == ACPI_NOTIFY_DEVICE_WAKE)
332 		pm_system_wakeup();
333 }
334 
335 static int cros_ec_lpc_probe(struct platform_device *pdev)
336 {
337 	struct device *dev = &pdev->dev;
338 	struct acpi_device *adev;
339 	acpi_status status;
340 	struct cros_ec_device *ec_dev;
341 	u8 buf[2];
342 	int irq, ret;
343 
344 	if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
345 				 dev_name(dev))) {
346 		dev_err(dev, "couldn't reserve memmap region\n");
347 		return -EBUSY;
348 	}
349 
350 	/*
351 	 * Read the mapped ID twice, the first one is assuming the
352 	 * EC is a Microchip Embedded Controller (MEC) variant, if the
353 	 * protocol fails, fallback to the non MEC variant and try to
354 	 * read again the ID.
355 	 */
356 	cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
357 	cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
358 	cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
359 	if (buf[0] != 'E' || buf[1] != 'C') {
360 		/* Re-assign read/write operations for the non MEC variant */
361 		cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
362 		cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
363 		cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
364 				     buf);
365 		if (buf[0] != 'E' || buf[1] != 'C') {
366 			dev_err(dev, "EC ID not detected\n");
367 			return -ENODEV;
368 		}
369 	}
370 
371 	if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
372 				 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
373 		dev_err(dev, "couldn't reserve region0\n");
374 		return -EBUSY;
375 	}
376 	if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
377 				 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
378 		dev_err(dev, "couldn't reserve region1\n");
379 		return -EBUSY;
380 	}
381 
382 	ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
383 	if (!ec_dev)
384 		return -ENOMEM;
385 
386 	platform_set_drvdata(pdev, ec_dev);
387 	ec_dev->dev = dev;
388 	ec_dev->phys_name = dev_name(dev);
389 	ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
390 	ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
391 	ec_dev->cmd_readmem = cros_ec_lpc_readmem;
392 	ec_dev->din_size = sizeof(struct ec_host_response) +
393 			   sizeof(struct ec_response_get_protocol_info);
394 	ec_dev->dout_size = sizeof(struct ec_host_request);
395 
396 	/*
397 	 * Some boards do not have an IRQ allotted for cros_ec_lpc,
398 	 * which makes ENXIO an expected (and safe) scenario.
399 	 */
400 	irq = platform_get_irq_optional(pdev, 0);
401 	if (irq > 0)
402 		ec_dev->irq = irq;
403 	else if (irq != -ENXIO) {
404 		dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
405 		return irq;
406 	}
407 
408 	ret = cros_ec_register(ec_dev);
409 	if (ret) {
410 		dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
411 		return ret;
412 	}
413 
414 	/*
415 	 * Connect a notify handler to process MKBP messages if we have a
416 	 * companion ACPI device.
417 	 */
418 	adev = ACPI_COMPANION(dev);
419 	if (adev) {
420 		status = acpi_install_notify_handler(adev->handle,
421 						     ACPI_ALL_NOTIFY,
422 						     cros_ec_lpc_acpi_notify,
423 						     ec_dev);
424 		if (ACPI_FAILURE(status))
425 			dev_warn(dev, "Failed to register notifier %08x\n",
426 				 status);
427 	}
428 
429 	return 0;
430 }
431 
432 static int cros_ec_lpc_remove(struct platform_device *pdev)
433 {
434 	struct cros_ec_device *ec_dev = platform_get_drvdata(pdev);
435 	struct acpi_device *adev;
436 
437 	adev = ACPI_COMPANION(&pdev->dev);
438 	if (adev)
439 		acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
440 					   cros_ec_lpc_acpi_notify);
441 
442 	return cros_ec_unregister(ec_dev);
443 }
444 
445 static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
446 	{ ACPI_DRV_NAME, 0 },
447 	{ }
448 };
449 MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
450 
451 static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
452 	{
453 		/*
454 		 * Today all Chromebooks/boxes ship with Google_* as version and
455 		 * coreboot as bios vendor. No other systems with this
456 		 * combination are known to date.
457 		 */
458 		.matches = {
459 			DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
460 			DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
461 		},
462 	},
463 	{
464 		/*
465 		 * If the box is running custom coreboot firmware then the
466 		 * DMI BIOS version string will not be matched by "Google_",
467 		 * but the system vendor string will still be matched by
468 		 * "GOOGLE".
469 		 */
470 		.matches = {
471 			DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
472 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
473 		},
474 	},
475 	{
476 		/* x86-link, the Chromebook Pixel. */
477 		.matches = {
478 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
479 			DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
480 		},
481 	},
482 	{
483 		/* x86-samus, the Chromebook Pixel 2. */
484 		.matches = {
485 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
486 			DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
487 		},
488 	},
489 	{
490 		/* x86-peppy, the Acer C720 Chromebook. */
491 		.matches = {
492 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
493 			DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
494 		},
495 	},
496 	{
497 		/* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
498 		.matches = {
499 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
500 			DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
501 		},
502 	},
503 	{ /* sentinel */ }
504 };
505 MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
506 
507 #ifdef CONFIG_PM_SLEEP
508 static int cros_ec_lpc_suspend(struct device *dev)
509 {
510 	struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
511 
512 	return cros_ec_suspend(ec_dev);
513 }
514 
515 static int cros_ec_lpc_resume(struct device *dev)
516 {
517 	struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
518 
519 	return cros_ec_resume(ec_dev);
520 }
521 #endif
522 
523 static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
524 	SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
525 };
526 
527 static struct platform_driver cros_ec_lpc_driver = {
528 	.driver = {
529 		.name = DRV_NAME,
530 		.acpi_match_table = cros_ec_lpc_acpi_device_ids,
531 		.pm = &cros_ec_lpc_pm_ops,
532 	},
533 	.probe = cros_ec_lpc_probe,
534 	.remove = cros_ec_lpc_remove,
535 };
536 
537 static struct platform_device cros_ec_lpc_device = {
538 	.name = DRV_NAME
539 };
540 
541 static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
542 					    void *context, void **retval)
543 {
544 	*(bool *)context = true;
545 	return AE_CTRL_TERMINATE;
546 }
547 
548 static int __init cros_ec_lpc_init(void)
549 {
550 	int ret;
551 	acpi_status status;
552 
553 	status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
554 				  &cros_ec_lpc_acpi_device_found, NULL);
555 	if (ACPI_FAILURE(status))
556 		pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
557 
558 	if (!cros_ec_lpc_acpi_device_found &&
559 	    !dmi_check_system(cros_ec_lpc_dmi_table)) {
560 		pr_err(DRV_NAME ": unsupported system.\n");
561 		return -ENODEV;
562 	}
563 
564 	cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
565 			     EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
566 
567 	/* Register the driver */
568 	ret = platform_driver_register(&cros_ec_lpc_driver);
569 	if (ret) {
570 		pr_err(DRV_NAME ": can't register driver: %d\n", ret);
571 		cros_ec_lpc_mec_destroy();
572 		return ret;
573 	}
574 
575 	if (!cros_ec_lpc_acpi_device_found) {
576 		/* Register the device, and it'll get hooked up automatically */
577 		ret = platform_device_register(&cros_ec_lpc_device);
578 		if (ret) {
579 			pr_err(DRV_NAME ": can't register device: %d\n", ret);
580 			platform_driver_unregister(&cros_ec_lpc_driver);
581 			cros_ec_lpc_mec_destroy();
582 		}
583 	}
584 
585 	return ret;
586 }
587 
588 static void __exit cros_ec_lpc_exit(void)
589 {
590 	if (!cros_ec_lpc_acpi_device_found)
591 		platform_device_unregister(&cros_ec_lpc_device);
592 	platform_driver_unregister(&cros_ec_lpc_driver);
593 	cros_ec_lpc_mec_destroy();
594 }
595 
596 module_init(cros_ec_lpc_init);
597 module_exit(cros_ec_lpc_exit);
598 
599 MODULE_LICENSE("GPL");
600 MODULE_DESCRIPTION("ChromeOS EC LPC driver");
601