SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So we picked thearea of the file that usually had a full license text and replaced itwith an appropriate SPDX-License-Identifier: entry. Since then, theLinux Kernel has adopted SPDX tags and they place it as the very firstline in a file (except where shebangs are used, then it's second line)and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibilityand in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declaredlicense in the tag as both the before and after are identical in tagcontents. There's also a few places where I found we did not have a tagand have introduced one.Signed-off-by: Tom Rini <trini@konsulko.com>
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Add GPL-2.0+ SPDX-License-Identifier to source filesSigned-off-by: Wolfgang Denk <wd@denx.de>[trini: Fixup common/cmd_io.c]Signed-off-by: Tom Rini <trini@ti.com>
omap: Improve PLL parameter calculation toolImprove the tool that finds multiplier and divider for PLLs:The previous algorithm could get stuck on local maximaand required the user to specify the
omap: Improve PLL parameter calculation toolImprove the tool that finds multiplier and divider for PLLs:The previous algorithm could get stuck on local maximaand required the user to specify the tolerance. Improvethe algorithm to go through the entire search space and findthe optimal solution.Signed-off-by: Aneesh V <aneesh@ti.com>
omap4: add clock supportAdd support for:1. DPLL locking2. Initialization of clock domains and clock modules3. Setting up the right voltage on voltage railsThis work draws upon previous work do
omap4: add clock supportAdd support for:1. DPLL locking2. Initialization of clock domains and clock modules3. Setting up the right voltage on voltage railsThis work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com>Signed-off-by: Aneesh V <aneesh@ti.com>Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>