xref: /openbmc/u-boot/drivers/misc/stm32_rcc.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <misc.h>
10 #include <stm32_rcc.h>
11 #include <dm/device-internal.h>
12 #include <dm/lists.h>
13 
14 struct stm32_rcc_clk stm32_rcc_clk_f4 = {
15 	.drv_name = "stm32fx_rcc_clock",
16 	.soc = STM32F4,
17 };
18 
19 struct stm32_rcc_clk stm32_rcc_clk_f7 = {
20 	.drv_name = "stm32fx_rcc_clock",
21 	.soc = STM32F7,
22 };
23 
24 struct stm32_rcc_clk stm32_rcc_clk_h7 = {
25 	.drv_name = "stm32h7_rcc_clock",
26 };
27 
28 static int stm32_rcc_bind(struct udevice *dev)
29 {
30 	struct udevice *child;
31 	struct driver *drv;
32 	struct stm32_rcc_clk *rcc_clk =
33 		(struct stm32_rcc_clk *)dev_get_driver_data(dev);
34 	int ret;
35 
36 	debug("%s(dev=%p)\n", __func__, dev);
37 
38 	drv = lists_driver_lookup_name(rcc_clk->drv_name);
39 	if (!drv) {
40 		debug("Cannot find driver '%s'\n", rcc_clk->drv_name);
41 		return -ENOENT;
42 	}
43 
44 	ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name,
45 					   rcc_clk->soc,
46 					   dev_ofnode(dev), &child);
47 
48 	if (ret)
49 		return ret;
50 
51 #ifdef CONFIG_SPL_BUILD
52 	return 0;
53 #else
54 	return device_bind_driver_to_node(dev, "stm32_rcc_reset",
55 					  "stm32_rcc_reset",
56 					  dev_ofnode(dev), &child);
57 #endif
58 }
59 
60 static const struct misc_ops stm32_rcc_ops = {
61 };
62 
63 static const struct udevice_id stm32_rcc_ids[] = {
64 	{.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f4 },
65 	{.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
66 	{.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
67 	{ }
68 };
69 
70 U_BOOT_DRIVER(stm32_rcc) = {
71 	.name		= "stm32-rcc",
72 	.id		= UCLASS_MISC,
73 	.of_match	= stm32_rcc_ids,
74 	.bind		= stm32_rcc_bind,
75 	.ops		= &stm32_rcc_ops,
76 };
77