1 // SPDX-License-Identifier: Intel
2 /*
3 * Copyright (C) 2013, Intel Corporation
4 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
5 * Copyright (C) 2015, Kodak Alaris, Inc
6 */
7
8 #include <common.h>
9 #include <fdtdec.h>
10 #include <asm/fsp/fsp_support.h>
11
12 DECLARE_GLOBAL_DATA_PTR;
13
14 /**
15 * Override the FSP's Azalia configuration data
16 *
17 * @azalia: pointer to be updated to point to a ROM address where Azalia
18 * configuration data is stored
19 */
update_fsp_azalia_configs(struct azalia_config ** azalia)20 __weak void update_fsp_azalia_configs(struct azalia_config **azalia)
21 {
22 *azalia = NULL;
23 }
24
25 /**
26 * Override the FSP's configuration data.
27 * If the device tree does not specify an integer setting, use the default
28 * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
29 */
update_fsp_configs(struct fsp_config_data * config,struct fspinit_rtbuf * rt_buf)30 void update_fsp_configs(struct fsp_config_data *config,
31 struct fspinit_rtbuf *rt_buf)
32 {
33 struct upd_region *fsp_upd = &config->fsp_upd;
34 struct memory_down_data *mem;
35 const void *blob = gd->fdt_blob;
36 int node;
37
38 /* Initialize runtime buffer for fsp_init() */
39 rt_buf->common.stack_top = config->common.stack_top - 32;
40 rt_buf->common.boot_mode = config->common.boot_mode;
41 rt_buf->common.upd_data = &config->fsp_upd;
42
43 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
44 if (node < 0) {
45 debug("%s: Cannot find FSP node\n", __func__);
46 return;
47 }
48
49 fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
50 "fsp,mrc-init-tseg-size",
51 MRC_INIT_TSEG_SIZE_1MB);
52 fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
53 "fsp,mrc-init-mmio-size",
54 MRC_INIT_MMIO_SIZE_2048MB);
55 fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
56 "fsp,mrc-init-spd-addr1",
57 0xa0);
58 fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
59 "fsp,mrc-init-spd-addr2",
60 0xa2);
61 fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
62 "fsp,emmc-boot-mode",
63 EMMC_BOOT_MODE_EMMC41);
64 fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
65 fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
66 "fsp,enable-sdcard");
67 fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
68 "fsp,enable-hsuart0");
69 fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
70 "fsp,enable-hsuart1");
71 fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
72 fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
73 fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode",
74 SATA_MODE_AHCI);
75 fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
76 "fsp,enable-azalia");
77 if (fsp_upd->enable_azalia)
78 update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr);
79 fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
80 fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode",
81 LPE_MODE_PCI);
82 fsp_upd->lpss_sio_mode = fdtdec_get_int(blob, node, "fsp,lpss-sio-mode",
83 LPSS_SIO_MODE_PCI);
84 fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
85 fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
86 fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
87 fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
88 fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
89 fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
90 fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
91 fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
92 fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
93 fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
94 fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
95 fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
96 fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
97 "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_64MB);
98 fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
99 APERTURE_SIZE_256MB);
100 fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
101 GTT_SIZE_2MB);
102 fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
103 "fsp,mrc-debug-msg");
104 fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
105 fsp_upd->scc_mode = fdtdec_get_int(blob, node, "fsp,scc-mode",
106 SCC_MODE_PCI);
107 fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
108 "fsp,igd-render-standby");
109 fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
110 "fsp,txe-uma-enable");
111 fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
112 OS_SELECTION_LINUX);
113 fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
114 "fsp,emmc45-ddr50-enabled");
115 fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
116 "fsp,emmc45-hs200-enabled");
117 fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
118 "fsp,emmc45-retune-timer-value", 8);
119 fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
120
121 mem = &fsp_upd->memory_params;
122 mem->enable_memory_down = fdtdec_get_bool(blob, node,
123 "fsp,enable-memory-down");
124 if (mem->enable_memory_down) {
125 node = fdtdec_next_compatible(blob, node,
126 COMPAT_INTEL_BAYTRAIL_FSP_MDP);
127 if (node < 0) {
128 debug("%s: Cannot find FSP memory-down-params node\n",
129 __func__);
130 } else {
131 mem->dram_speed = fdtdec_get_int(blob, node,
132 "fsp,dram-speed",
133 DRAM_SPEED_1333MTS);
134 mem->dram_type = fdtdec_get_int(blob, node,
135 "fsp,dram-type",
136 DRAM_TYPE_DDR3L);
137 mem->dimm_0_enable = fdtdec_get_bool(blob, node,
138 "fsp,dimm-0-enable");
139 mem->dimm_1_enable = fdtdec_get_bool(blob, node,
140 "fsp,dimm-1-enable");
141 mem->dimm_width = fdtdec_get_int(blob, node,
142 "fsp,dimm-width",
143 DIMM_WIDTH_X8);
144 mem->dimm_density = fdtdec_get_int(blob, node,
145 "fsp,dimm-density",
146 DIMM_DENSITY_2GBIT);
147 mem->dimm_bus_width = fdtdec_get_int(blob, node,
148 "fsp,dimm-bus-width",
149 DIMM_BUS_WIDTH_64BITS);
150 mem->dimm_sides = fdtdec_get_int(blob, node,
151 "fsp,dimm-sides",
152 DIMM_SIDES_1RANKS);
153 mem->dimm_tcl = fdtdec_get_int(blob, node,
154 "fsp,dimm-tcl", 0x09);
155 mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
156 "fsp,dimm-trpt-rcd", 0x09);
157 mem->dimm_twr = fdtdec_get_int(blob, node,
158 "fsp,dimm-twr", 0x0a);
159 mem->dimm_twtr = fdtdec_get_int(blob, node,
160 "fsp,dimm-twtr", 0x05);
161 mem->dimm_trrd = fdtdec_get_int(blob, node,
162 "fsp,dimm-trrd", 0x04);
163 mem->dimm_trtp = fdtdec_get_int(blob, node,
164 "fsp,dimm-trtp", 0x05);
165 mem->dimm_tfaw = fdtdec_get_int(blob, node,
166 "fsp,dimm-tfaw", 0x14);
167 }
168 }
169 }
170