1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2012 8 * Corscience GmbH & Co. KG 9 * Thomas Weber <weber@corscience.de> 10 * 11 * Configuration settings for the Tricorder board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 19 /* High Level Configuration Options */ 20 #define CONFIG_OMAP /* in a TI OMAP core */ 21 #define CONFIG_OMAP34XX /* which is a 34XX */ 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 24 /* 25 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 26 * 64 bytes before this address should be set aside for u-boot.img's 27 * header. That is 0x800FFFC0--0x80100000 should not be used for any 28 * other needs. 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x80100000 31 32 #define CONFIG_SDRC /* The chip has SDRC controller */ 33 34 #include <asm/arch/cpu.h> /* get chip and board defs */ 35 #include <asm/arch/omap3.h> 36 37 /* Display CPU and Board information */ 38 #define CONFIG_DISPLAY_CPUINFO 39 #define CONFIG_DISPLAY_BOARDINFO 40 41 /* Clock Defines */ 42 #define V_OSCK 26000000 /* Clock output from T2 */ 43 #define V_SCLK (V_OSCK >> 1) 44 45 #define CONFIG_MISC_INIT_R 46 47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_REVISION_TAG 51 52 #define CONFIG_OF_LIBFDT 53 54 /* Size of malloc() pool */ 55 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 56 /* Sector */ 57 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 58 59 /* Hardware drivers */ 60 61 /* NS16550 Configuration */ 62 #define CONFIG_SYS_NS16550 63 #define CONFIG_SYS_NS16550_SERIAL 64 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 65 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 66 67 /* select serial console configuration */ 68 #define CONFIG_CONS_INDEX 3 69 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 70 #define CONFIG_SERIAL3 3 71 #define CONFIG_BAUDRATE 115200 72 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 73 115200} 74 75 /* MMC */ 76 #define CONFIG_GENERIC_MMC 77 #define CONFIG_MMC 78 #define CONFIG_OMAP_HSMMC 79 #define CONFIG_DOS_PARTITION 80 81 /* I2C */ 82 #define CONFIG_HARD_I2C 83 #define CONFIG_SYS_I2C_SPEED 100000 84 #define CONFIG_SYS_I2C_SLAVE 1 85 #define CONFIG_DRIVER_OMAP34XX_I2C 1 86 87 /* TWL4030 */ 88 #define CONFIG_TWL4030_POWER 89 #define CONFIG_TWL4030_LED 90 91 /* Board NAND Info */ 92 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 93 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 94 #define MTDIDS_DEFAULT "nand0=nand" 95 #define MTDPARTS_DEFAULT "mtdparts=nand:" \ 96 "512k(u-boot-spl)," \ 97 "1920k(u-boot)," \ 98 "128k(u-boot-env)," \ 99 "4m(kernel)," \ 100 "-(fs)" 101 102 #define CONFIG_NAND_OMAP_GPMC 103 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 104 /* to access nand */ 105 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 106 /* to access nand at */ 107 /* CS0 */ 108 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 109 110 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 111 /* devices */ 112 #define CONFIG_NAND_OMAP_BCH8 113 #define CONFIG_BCH 114 115 /* commands to include */ 116 #include <config_cmd_default.h> 117 118 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 119 #define CONFIG_CMD_FAT /* FAT support */ 120 #define CONFIG_CMD_I2C /* I2C serial bus support */ 121 #define CONFIG_CMD_MMC /* MMC support */ 122 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 123 #define CONFIG_CMD_NAND /* NAND support */ 124 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 125 #define CONFIG_CMD_UBI /* UBI commands */ 126 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 127 #define CONFIG_LZO /* LZO is needed for UBIFS */ 128 129 #undef CONFIG_CMD_NET 130 #undef CONFIG_CMD_NFS 131 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 132 #undef CONFIG_CMD_IMI /* iminfo */ 133 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 134 135 /* needed for ubi */ 136 #define CONFIG_RBTREE 137 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 138 #define CONFIG_MTD_PARTITIONS 139 140 /* Environment information */ 141 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 142 143 #define CONFIG_BOOTDELAY 3 144 145 #define CONFIG_EXTRA_ENV_SETTINGS \ 146 "loadaddr=0x82000000\0" \ 147 "console=ttyO2,115200n8\0" \ 148 "mmcdev=0\0" \ 149 "vram=12M\0" \ 150 "lcdmode=800x600\0" \ 151 "defaultdisplay=lcd\0" \ 152 "kernelopts=rw rootwait\0" \ 153 "commonargs=" \ 154 "setenv bootargs console=${console} " \ 155 "vram=${vram} " \ 156 "omapfb.mode=lcd:${lcdmode} " \ 157 "omapdss.def_disp=${defaultdisplay}\0" \ 158 "mmcargs=" \ 159 "run commonargs; " \ 160 "setenv bootargs ${bootargs} " \ 161 "root=/dev/mmcblk0p2 " \ 162 "${kernelopts}\0" \ 163 "nandargs=" \ 164 "run commonargs; " \ 165 "setenv bootargs ${bootargs} " \ 166 "omapfb.mode=lcd:${lcdmode} " \ 167 "omapdss.def_disp=${defaultdisplay} " \ 168 "root=ubi0:root " \ 169 "ubi.mtd=4 " \ 170 "rootfstype=ubifs " \ 171 "${kernelopts}\0" \ 172 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 173 "bootscript=echo Running bootscript from mmc ...; " \ 174 "source ${loadaddr}\0" \ 175 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 176 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ 177 "mmcboot=echo Booting from mmc ...; " \ 178 "run mmcargs; " \ 179 "bootm ${loadaddr}\0" \ 180 "loaduimage_ubi=mtd default; " \ 181 "ubi part fs; " \ 182 "ubifsmount ubi:root; " \ 183 "ubifsload ${loadaddr} /boot/uImage\0" \ 184 "nandboot=echo Booting from nand ...; " \ 185 "run nandargs; " \ 186 "run loaduimage_ubi; " \ 187 "bootm ${loadaddr}\0" \ 188 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 189 "if run loadbootscript; then " \ 190 "run bootscript; " \ 191 "else " \ 192 "if run loaduimage; then " \ 193 "run mmcboot; " \ 194 "else run nandboot; " \ 195 "fi; " \ 196 "fi; " \ 197 "else run nandboot; fi\0" 198 199 200 #define CONFIG_BOOTCOMMAND "run autoboot" 201 202 /* Miscellaneous configurable options */ 203 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 204 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 205 #define CONFIG_AUTO_COMPLETE 206 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # " 207 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 208 /* Print Buffer Size */ 209 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 210 sizeof(CONFIG_SYS_PROMPT) + 16) 211 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 212 213 /* Boot Argument Buffer Size */ 214 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 215 216 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 217 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 218 0x01000000) /* 16MB */ 219 220 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 221 222 /* 223 * OMAP3 has 12 GP timers, they can be driven by the system clock 224 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 225 * This rate is divided by a local divisor. 226 */ 227 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 228 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 229 #define CONFIG_SYS_HZ 1000 230 231 /* Physical Memory Map */ 232 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 233 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 234 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 235 236 /* NAND and environment organization */ 237 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 238 239 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 240 241 #define CONFIG_ENV_IS_IN_NAND 1 242 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 243 244 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 245 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 246 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 247 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 248 CONFIG_SYS_INIT_RAM_SIZE - \ 249 GENERATED_GBL_DATA_SIZE) 250 251 /* SRAM config */ 252 #define CONFIG_SYS_SRAM_START 0x40200000 253 #define CONFIG_SYS_SRAM_SIZE 0x10000 254 255 /* Defines for SPL */ 256 #define CONFIG_SPL 257 #define CONFIG_SPL_FRAMEWORK 258 #define CONFIG_SPL_NAND_SIMPLE 259 260 #define CONFIG_SPL_BOARD_INIT 261 #define CONFIG_SPL_LIBCOMMON_SUPPORT 262 #define CONFIG_SPL_LIBDISK_SUPPORT 263 #define CONFIG_SPL_I2C_SUPPORT 264 #define CONFIG_SPL_LIBGENERIC_SUPPORT 265 #define CONFIG_SPL_SERIAL_SUPPORT 266 #define CONFIG_SPL_POWER_SUPPORT 267 #define CONFIG_SPL_NAND_SUPPORT 268 #define CONFIG_SPL_NAND_BASE 269 #define CONFIG_SPL_NAND_DRIVERS 270 #define CONFIG_SPL_NAND_ECC 271 #define CONFIG_SPL_MMC_SUPPORT 272 #define CONFIG_SPL_FAT_SUPPORT 273 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 274 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 275 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 276 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 277 278 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 279 #define CONFIG_SPL_MAX_SIZE (55 * 1024) /* 7 KB for stack */ 280 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 281 282 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 283 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 284 285 /* NAND boot config */ 286 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 287 #define CONFIG_SYS_NAND_PAGE_COUNT 64 288 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 289 #define CONFIG_SYS_NAND_OOBSIZE 64 290 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 291 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 292 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\ 293 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ 294 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\ 295 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\ 296 60, 61, 62, 63} 297 298 #define CONFIG_SYS_NAND_ECCSIZE 512 299 #define CONFIG_SYS_NAND_ECCBYTES 13 300 301 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 302 303 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 304 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 305 306 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 307 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 308 309 #endif /* __CONFIG_H */ 310