1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 4 * Texas Instruments Incorporated. 5 * Lokesh Vutla <lokeshvutla@ti.com> 6 * 7 * Configuration settings for the TI DRA7XX board. 8 * See ti_omap5_common.h for omap5 common settings. 9 */ 10 11 #ifndef __CONFIG_DRA7XX_EVM_H 12 #define __CONFIG_DRA7XX_EVM_H 13 14 #include <environment/ti/dfu.h> 15 16 #define CONFIG_IODELAY_RECALIBRATION 17 18 #define CONFIG_VERY_BIG_RAM 19 #define CONFIG_NR_DRAM_BANKS 2 20 #define CONFIG_MAX_MEM_MAPPED 0x80000000 21 22 #ifndef CONFIG_QSPI_BOOT 23 /* MMC ENV related defines */ 24 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 25 #define CONFIG_ENV_SIZE (128 << 10) 26 #define CONFIG_ENV_OFFSET 0x260000 27 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 28 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 29 #endif 30 31 #if (CONFIG_CONS_INDEX == 1) 32 #define CONSOLEDEV "ttyO0" 33 #elif (CONFIG_CONS_INDEX == 3) 34 #define CONSOLEDEV "ttyO2" 35 #endif 36 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 37 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 38 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 39 40 #define CONFIG_ENV_EEPROM_IS_ON_I2C 41 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 42 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 43 44 #define CONFIG_SYS_OMAP_ABE_SYSCK 45 46 #ifndef CONFIG_SPL_BUILD 47 /* Define the default GPT table for eMMC */ 48 #define PARTS_DEFAULT \ 49 /* Linux partitions */ \ 50 "uuid_disk=${uuid_gpt_disk};" \ 51 "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \ 52 "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ 53 /* Android partitions */ \ 54 "partitions_android=" \ 55 "uuid_disk=${uuid_gpt_disk};" \ 56 "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ 57 "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ 58 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ 59 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ 60 "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ 61 "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ 62 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ 63 "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \ 64 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ 65 "name=system,size=768M,uuid=${uuid_gpt_system};" \ 66 "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \ 67 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ 68 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ 69 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ 70 "name=userdata,size=-,uuid=${uuid_gpt_userdata}" 71 72 #define DFUARGS \ 73 "dfu_bufsiz=0x10000\0" \ 74 DFU_ALT_INFO_MMC \ 75 DFU_ALT_INFO_EMMC \ 76 DFU_ALT_INFO_RAM \ 77 DFU_ALT_INFO_QSPI 78 #endif 79 80 #ifdef CONFIG_SPL_BUILD 81 #undef CONFIG_CMD_BOOTD 82 #ifdef CONFIG_SPL_DFU_SUPPORT 83 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 84 #define DFUARGS \ 85 "dfu_bufsiz=0x10000\0" \ 86 DFU_ALT_INFO_RAM 87 #endif 88 #endif 89 90 #include <configs/ti_omap5_common.h> 91 92 /* Enhance our eMMC support / experience. */ 93 #define CONFIG_HSMMC2_8BIT 94 95 /* CPSW Ethernet */ 96 #define CONFIG_BOOTP_DNS2 97 #define CONFIG_BOOTP_SEND_HOSTNAME 98 #define CONFIG_NET_RETRY_COUNT 10 99 #define CONFIG_MII /* Required in net/eth.c */ 100 #define CONFIG_PHY_TI 101 102 /* SPI */ 103 #define CONFIG_TI_SPI_MMAP 104 #define CONFIG_SF_DEFAULT_SPEED 76800000 105 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 106 #define CONFIG_QSPI_QUAD_SUPPORT 107 108 /* 109 * Default to using SPI for environment, etc. 110 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 111 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 112 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 113 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 114 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 115 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 116 * 0x9E0000 - 0x2000000 : USERLAND 117 */ 118 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 119 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 120 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 121 #if defined(CONFIG_QSPI_BOOT) 122 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 123 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 124 #define CONFIG_ENV_SIZE (64 << 10) 125 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 126 #define CONFIG_ENV_OFFSET 0x1C0000 127 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 128 #endif 129 130 /* SPI SPL */ 131 #define CONFIG_TI_EDMA3 132 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 133 134 #define CONFIG_SUPPORT_EMMC_BOOT 135 136 /* USB xHCI HOST */ 137 #define CONFIG_USB_XHCI_OMAP 138 139 #define CONFIG_OMAP_USB2PHY2_HOST 140 141 /* SATA */ 142 #define CONFIG_SCSI_AHCI_PLAT 143 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 144 #define CONFIG_SYS_SCSI_MAX_LUN 1 145 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 146 CONFIG_SYS_SCSI_MAX_LUN) 147 148 /* NAND support */ 149 #ifdef CONFIG_NAND 150 /* NAND: device related configs */ 151 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 152 #define CONFIG_SYS_NAND_OOBSIZE 64 153 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 154 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 155 CONFIG_SYS_NAND_PAGE_SIZE) 156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 157 /* NAND: driver related configs */ 158 #define CONFIG_SYS_NAND_ONFI_DETECTION 159 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 160 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 161 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 162 10, 11, 12, 13, 14, 15, 16, 17, \ 163 18, 19, 20, 21, 22, 23, 24, 25, \ 164 26, 27, 28, 29, 30, 31, 32, 33, \ 165 34, 35, 36, 37, 38, 39, 40, 41, \ 166 42, 43, 44, 45, 46, 47, 48, 49, \ 167 50, 51, 52, 53, 54, 55, 56, 57, } 168 #define CONFIG_SYS_NAND_ECCSIZE 512 169 #define CONFIG_SYS_NAND_ECCBYTES 14 170 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 171 /* NAND: SPL related configs */ 172 /* NAND: SPL falcon mode configs */ 173 #ifdef CONFIG_SPL_OS_BOOT 174 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 175 #endif 176 #endif /* !CONFIG_NAND */ 177 178 /* Parallel NOR Support */ 179 #if defined(CONFIG_NOR) 180 /* NOR: device related configs */ 181 #define CONFIG_SYS_MAX_FLASH_SECT 512 182 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 183 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 184 /* #define CONFIG_INIT_IGNORE_ERROR */ 185 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 186 #define CONFIG_SYS_FLASH_PROTECTION 187 #define CONFIG_SYS_FLASH_CFI 188 #define CONFIG_FLASH_CFI_DRIVER 189 #define CONFIG_FLASH_CFI_MTD 190 #define CONFIG_SYS_MAX_FLASH_BANKS 1 191 #define CONFIG_SYS_FLASH_BASE (0x08000000) 192 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 193 /* Reduce SPL size by removing unlikey targets */ 194 #ifdef CONFIG_NOR_BOOT 195 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 196 #define CONFIG_ENV_OFFSET 0x001c0000 197 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 198 #endif 199 #endif /* NOR support */ 200 201 #endif /* __CONFIG_DRA7XX_EVM_H */ 202