1 /* 2 * hardware_am33xx.h 3 * 4 * AM33xx hardware specific header 5 * 6 * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __AM33XX_HARDWARE_AM33XX_H 12 #define __AM33XX_HARDWARE_AM33XX_H 13 14 /* Module base addresses */ 15 16 /* UART Base Address */ 17 #define UART0_BASE 0x44E09000 18 19 /* GPIO Base address */ 20 #define GPIO2_BASE 0x481AC000 21 22 /* Watchdog Timer */ 23 #define WDT_BASE 0x44E35000 24 25 /* Control Module Base Address */ 26 #define CTRL_BASE 0x44E10000 27 #define CTRL_DEVICE_BASE 0x44E10600 28 29 /* PRCM Base Address */ 30 #define PRCM_BASE 0x44E00000 31 32 /* VTP Base address */ 33 #define VTP0_CTRL_ADDR 0x44E10E0C 34 35 /* DDR Base address */ 36 #define DDR_PHY_CMD_ADDR 0x44E12000 37 #define DDR_PHY_DATA_ADDR 0x44E120C8 38 #define DDR_DATA_REGS_NR 2 39 40 /* CPSW Config space */ 41 #define CPSW_MDIO_BASE 0x4A101000 42 43 /* RTC base address */ 44 #define RTC_BASE 0x44E3E000 45 46 #endif /* __AM33XX_HARDWARE_AM33XX_H */ 47