xref: /openbmc/u-boot/include/configs/advantech_dms-ba16.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016 Timesys Corporation
4  * Copyright (C) 2016 Advantech Corporation
5  * Copyright (C) 2012 Freescale Semiconductor, Inc.
6  */
7 
8 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
9 #define __ADVANTECH_DMSBA16_CONFIG_H
10 
11 #include <asm/arch/imx-regs.h>
12 #include <asm/mach-imx/gpio.h>
13 
14 #define CONFIG_BOARD_NAME	"Advantech DMS-BA16"
15 
16 #define CONFIG_MXC_UART_BASE	UART4_BASE
17 #define CONSOLE_DEV	"ttymxc3"
18 #define CONFIG_EXTRA_BOOTARGS	"panic=10"
19 
20 #define CONFIG_BOOT_DIR	""
21 #define CONFIG_LOADCMD "fatload"
22 #define CONFIG_RFSPART "2"
23 
24 #define CONFIG_SUPPORT_EMMC_BOOT
25 
26 #include "mx6_common.h"
27 #include <linux/sizes.h>
28 
29 #define CONFIG_CMDLINE_TAG
30 #define CONFIG_SETUP_MEMORY_TAGS
31 #define CONFIG_INITRD_TAG
32 #define CONFIG_REVISION_TAG
33 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
34 
35 #define CONFIG_MXC_UART
36 
37 #define CONFIG_MXC_OCOTP
38 
39 /* SATA Configs */
40 #define CONFIG_SYS_SATA_MAX_DEVICE	1
41 #define CONFIG_DWC_AHSATA_PORT_ID	0
42 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
43 #define CONFIG_LBA48
44 
45 /* MMC Configs */
46 #define CONFIG_FSL_USDHC
47 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
48 #define CONFIG_BOUNCE_BUFFER
49 
50 /* USB Configs */
51 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
52 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
53 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
54 #define CONFIG_MXC_USB_FLAGS	0
55 
56 #define CONFIG_USBD_HS
57 
58 /* Networking Configs */
59 #define CONFIG_FEC_MXC
60 #define CONFIG_MII
61 #define IMX_FEC_BASE			ENET_BASE_ADDR
62 #define CONFIG_FEC_XCV_TYPE		RGMII
63 #define CONFIG_ETHPRIME		"FEC"
64 #define CONFIG_FEC_MXC_PHYADDR		4
65 #define CONFIG_PHY_ATHEROS
66 
67 /* Serial Flash */
68 #ifdef CONFIG_CMD_SF
69 #define CONFIG_SF_DEFAULT_BUS		0
70 #define CONFIG_SF_DEFAULT_CS		0
71 #define CONFIG_SF_DEFAULT_SPEED	20000000
72 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
73 #endif
74 
75 /* allow to overwrite serial and ethaddr */
76 #define CONFIG_ENV_OVERWRITE
77 
78 #define CONFIG_LOADADDR	0x12000000
79 
80 #define CONFIG_EXTRA_ENV_SETTINGS \
81 	"script=boot.scr\0" \
82 	"image=" CONFIG_BOOT_DIR "/uImage\0" \
83 	"uboot=u-boot.imx\0" \
84 	"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
85 	"fdt_addr=0x18000000\0" \
86 	"boot_fdt=yes\0" \
87 	"ip_dyn=yes\0" \
88 	"console=" CONSOLE_DEV "\0" \
89 	"fdt_high=0xffffffff\0"	  \
90 	"initrd_high=0xffffffff\0" \
91 	"sddev=0\0" \
92 	"emmcdev=1\0" \
93 	"partnum=1\0" \
94 	"loadcmd=" CONFIG_LOADCMD "\0" \
95 	"rfspart=" CONFIG_RFSPART "\0" \
96 	"update_sd_firmware=" \
97 		"if test ${ip_dyn} = yes; then " \
98 			"setenv get_cmd dhcp; " \
99 		"else " \
100 			"setenv get_cmd tftp; " \
101 		"fi; " \
102 		"if mmc dev ${mmcdev}; then "	\
103 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
104 				"setexpr fw_sz ${filesize} / 0x200; " \
105 				"setexpr fw_sz ${fw_sz} + 1; "	\
106 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
107 			"fi; "	\
108 		"fi\0" \
109 	"update_sf_uboot=" \
110 		"if tftp $loadaddr $uboot; then " \
111 			"sf probe; " \
112 			"sf erase 0 0xC0000; " \
113 			"sf write $loadaddr 0x400 $filesize; " \
114 			"echo 'U-Boot upgraded. Please reset'; " \
115 		"fi\0" \
116 	"setargs=setenv bootargs console=${console},${baudrate} " \
117 		"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
118 	"loadbootscript=" \
119 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
120 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
121 		" source\0" \
122 	"loadimage=" \
123 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
124 	"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
125 	"tryboot=" \
126 		"if run loadbootscript; then " \
127 			"run bootscript; " \
128 		"else " \
129 			"if run loadimage; then " \
130 				"run doboot; " \
131 			"fi; " \
132 		"fi;\0" \
133 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
134 		"run setargs; " \
135 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
136 			"if run loadfdt; then " \
137 				"bootm ${loadaddr} - ${fdt_addr}; " \
138 			"else " \
139 				"if test ${boot_fdt} = try; then " \
140 					"bootm; " \
141 				"else " \
142 					"echo WARN: Cannot load the DT; " \
143 				"fi; " \
144 			"fi; " \
145 		"else " \
146 			"bootm; " \
147 		"fi;\0" \
148 	"netargs=setenv bootargs console=${console},${baudrate} " \
149 		"root=/dev/nfs " \
150 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
151 	"netboot=echo Booting from net ...; " \
152 		"run netargs; " \
153 		"if test ${ip_dyn} = yes; then " \
154 			"setenv get_cmd dhcp; " \
155 		"else " \
156 			"setenv get_cmd tftp; " \
157 		"fi; " \
158 		"${get_cmd} ${image}; " \
159 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
160 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
161 				"bootm ${loadaddr} - ${fdt_addr}; " \
162 			"else " \
163 				"if test ${boot_fdt} = try; then " \
164 					"bootm; " \
165 				"else " \
166 					"echo WARN: Cannot load the DT; " \
167 				"fi; " \
168 			"fi; " \
169 		"else " \
170 			"bootm; " \
171 		"fi;\0" \
172 
173 #define CONFIG_BOOTCOMMAND \
174 	"usb start; " \
175 	"setenv dev usb; " \
176 	"setenv devnum 0; " \
177 	"setenv rootdev sda${rfspart}; " \
178 	"run tryboot; " \
179 	\
180 	"setenv dev mmc; " \
181 	"setenv rootdev mmcblk0p${rfspart}; " \
182 	\
183 	"setenv devnum ${sddev}; " \
184 	"if mmc dev ${devnum}; then " \
185 		"run tryboot; " \
186 	"fi; " \
187 	\
188 	"setenv devnum ${emmcdev}; " \
189 	"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
190 	"if mmc dev ${devnum}; then " \
191 		"run tryboot; " \
192 	"fi; " \
193 	\
194 	"bmode usb; " \
195 
196 #define CONFIG_ARP_TIMEOUT     200UL
197 
198 /* Miscellaneous configurable options */
199 
200 #define CONFIG_SYS_MEMTEST_START       0x10000000
201 #define CONFIG_SYS_MEMTEST_END         0x10010000
202 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
203 
204 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
205 
206 /* Physical Memory Map */
207 #define CONFIG_NR_DRAM_BANKS           1
208 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
209 
210 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
211 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
212 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
213 
214 #define CONFIG_SYS_INIT_SP_OFFSET \
215 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
216 #define CONFIG_SYS_INIT_SP_ADDR \
217 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
218 
219 /* FLASH and environment organization */
220 
221 #define CONFIG_ENV_SIZE                 (8 * 1024)
222 #define CONFIG_ENV_OFFSET               (768 * 1024)
223 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
224 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
225 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
226 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
227 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
228 
229 #ifndef CONFIG_SYS_DCACHE_OFF
230 #endif
231 
232 #define CONFIG_SYS_FSL_USDHC_NUM        3
233 
234 /* Framebuffer */
235 #ifdef CONFIG_VIDEO
236 #define CONFIG_VIDEO_IPUV3
237 #define CONFIG_VIDEO_BMP_RLE8
238 #define CONFIG_SPLASH_SCREEN
239 #define CONFIG_SPLASH_SCREEN_ALIGN
240 #define CONFIG_BMP_16BPP
241 #define CONFIG_VIDEO_LOGO
242 #define CONFIG_VIDEO_BMP_LOGO
243 #define CONFIG_IMX_HDMI
244 #define CONFIG_IMX_VIDEO_SKIP
245 #endif
246 
247 #define CONFIG_PWM_IMX
248 #define CONFIG_IMX6_PWM_PER_CLK         66000000
249 
250 #ifdef CONFIG_CMD_PCI
251 #define CONFIG_PCI_SCAN_SHOW
252 #define CONFIG_PCIE_IMX
253 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
254 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(1, 5)
255 #endif
256 
257 /* I2C Configs */
258 #define CONFIG_SYS_I2C
259 #define CONFIG_SYS_I2C_MXC
260 #define CONFIG_SYS_I2C_SPEED            100000
261 #define CONFIG_SYS_I2C_MXC_I2C1
262 #define CONFIG_SYS_I2C_MXC_I2C2
263 #define CONFIG_SYS_I2C_MXC_I2C3
264 
265 #endif	/* __ADVANTECH_DMSBA16_CONFIG_H */
266