860f39be | 20-Apr-2022 |
Michael Walle <michael@walle.cc> |
MIPS: mscc: serval: rename pinctrl nodes
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael
MIPS: mscc: serval: rename pinctrl nodes
The pinctrl device tree binding will be converted to YAML format. Rename the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
show more ...
|
eba54cbb | 19-Aug-2021 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
MIPS: mscc: ocelot: mark the phy-mode for internal PHY ports
The ocelot driver was converted to phylink, and that expects a valid phy_interface_t. Without a phy-mode, of_get_phy_mode returns PHY_INT
MIPS: mscc: ocelot: mark the phy-mode for internal PHY ports
The ocelot driver was converted to phylink, and that expects a valid phy_interface_t. Without a phy-mode, of_get_phy_mode returns PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that.
The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we should fix the device trees and specify the phy-mode too.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
show more ...
|
72bc5e8b | 10-Nov-2020 |
Gregory CLEMENT <gregory.clement@bootlin.com> |
MIPS: mscc: Add luton PC0B91 device tree
Add a device tree for the Microsemi Luton PCB091 evaluation board.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gre
MIPS: mscc: Add luton PC0B91 device tree
Add a device tree for the Microsemi Luton PCB091 evaluation board.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
show more ...
|
93b834e6 | 10-Nov-2020 |
Gregory CLEMENT <gregory.clement@bootlin.com> |
MIPS: mscc: Add luton dtsi
Add a device tree include file for the Microsemi Luton SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip
MIPS: mscc: Add luton dtsi
Add a device tree include file for the Microsemi Luton SoC which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
show more ...
|
e3aea296 | 29-Sep-2020 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target
As a preparation step for the offloading to ES0, let's create the infrastructure for talking with this hardware block.
Signe
net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target
As a preparation step for the offloading to ES0, let's create the infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
|
b4742e66 | 24-Jul-2019 |
Antoine Tenart <antoine.tenart@bootlin.com> |
MIPS: dts: mscc: describe the PTP ready interrupt
This patch adds a description of the PTP ready interrupt, which can be triggered when a PTP timestamp is available on an hardware FIFO.
Signed-off-
MIPS: dts: mscc: describe the PTP ready interrupt
This patch adds a description of the PTP ready interrupt, which can be triggered when a PTP timestamp is available on an hardware FIFO.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: davem@davemloft.net Cc: richardcochran@gmail.com Cc: alexandre.belloni@bootlin.com Cc: UNGLinuxDriver@microchip.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: netdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: thomas.petazzoni@bootlin.com Cc: allan.nielsen@microchip.com
show more ...
|
7c45885e | 31-Aug-2018 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
MIPS: dts: mscc: enable i2c on ocelot_pcb123
Enable the i2c controller on ocelot PCB123. While there are no i2c devices on the board itself, it can be used to control the SFP transceivers.
Signed-o
MIPS: dts: mscc: enable i2c on ocelot_pcb123
Enable the i2c controller on ocelot PCB123. While there are no i2c devices on the board itself, it can be used to control the SFP transceivers.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20352/ Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: James Hogan <jhogan@kernel.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: linux-i2c@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Allan Nielsen <allan.nielsen@microchip.com>
show more ...
|