1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2019 MediaTek Inc. 4 * 5 * Author: 6 * Min Guo <min.guo@mediatek.com> 7 * Yonglong Wu <yonglong.wu@mediatek.com> 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/module.h> 13 #include <linux/of_platform.h> 14 #include <linux/platform_device.h> 15 #include <linux/usb/role.h> 16 #include <linux/usb/usb_phy_generic.h> 17 #include "musb_core.h" 18 #include "musb_dma.h" 19 20 #define USB_L1INTS 0x00a0 21 #define USB_L1INTM 0x00a4 22 #define MTK_MUSB_TXFUNCADDR 0x0480 23 24 /* MediaTek controller toggle enable and status reg */ 25 #define MUSB_RXTOG 0x80 26 #define MUSB_RXTOGEN 0x82 27 #define MUSB_TXTOG 0x84 28 #define MUSB_TXTOGEN 0x86 29 #define MTK_TOGGLE_EN GENMASK(15, 0) 30 31 #define TX_INT_STATUS BIT(0) 32 #define RX_INT_STATUS BIT(1) 33 #define USBCOM_INT_STATUS BIT(2) 34 #define DMA_INT_STATUS BIT(3) 35 36 #define DMA_INTR_STATUS_MSK GENMASK(7, 0) 37 #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24) 38 39 struct mtk_glue { 40 struct device *dev; 41 struct musb *musb; 42 struct platform_device *musb_pdev; 43 struct platform_device *usb_phy; 44 struct phy *phy; 45 struct usb_phy *xceiv; 46 enum phy_mode phy_mode; 47 struct clk *main; 48 struct clk *mcu; 49 struct clk *univpll; 50 enum usb_role role; 51 struct usb_role_switch *role_sw; 52 }; 53 54 static int mtk_musb_clks_get(struct mtk_glue *glue) 55 { 56 struct device *dev = glue->dev; 57 58 glue->main = devm_clk_get(dev, "main"); 59 if (IS_ERR(glue->main)) { 60 dev_err(dev, "fail to get main clock\n"); 61 return PTR_ERR(glue->main); 62 } 63 64 glue->mcu = devm_clk_get(dev, "mcu"); 65 if (IS_ERR(glue->mcu)) { 66 dev_err(dev, "fail to get mcu clock\n"); 67 return PTR_ERR(glue->mcu); 68 } 69 70 glue->univpll = devm_clk_get(dev, "univpll"); 71 if (IS_ERR(glue->univpll)) { 72 dev_err(dev, "fail to get univpll clock\n"); 73 return PTR_ERR(glue->univpll); 74 } 75 76 return 0; 77 } 78 79 static int mtk_musb_clks_enable(struct mtk_glue *glue) 80 { 81 int ret; 82 83 ret = clk_prepare_enable(glue->main); 84 if (ret) { 85 dev_err(glue->dev, "failed to enable main clock\n"); 86 goto err_main_clk; 87 } 88 89 ret = clk_prepare_enable(glue->mcu); 90 if (ret) { 91 dev_err(glue->dev, "failed to enable mcu clock\n"); 92 goto err_mcu_clk; 93 } 94 95 ret = clk_prepare_enable(glue->univpll); 96 if (ret) { 97 dev_err(glue->dev, "failed to enable univpll clock\n"); 98 goto err_univpll_clk; 99 } 100 101 return 0; 102 103 err_univpll_clk: 104 clk_disable_unprepare(glue->mcu); 105 err_mcu_clk: 106 clk_disable_unprepare(glue->main); 107 err_main_clk: 108 return ret; 109 } 110 111 static void mtk_musb_clks_disable(struct mtk_glue *glue) 112 { 113 clk_disable_unprepare(glue->univpll); 114 clk_disable_unprepare(glue->mcu); 115 clk_disable_unprepare(glue->main); 116 } 117 118 static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) 119 { 120 struct musb *musb = glue->musb; 121 u8 devctl = readb(musb->mregs + MUSB_DEVCTL); 122 enum usb_role new_role; 123 124 if (role == glue->role) 125 return 0; 126 127 switch (role) { 128 case USB_ROLE_HOST: 129 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 130 glue->phy_mode = PHY_MODE_USB_HOST; 131 new_role = USB_ROLE_HOST; 132 if (glue->role == USB_ROLE_NONE) 133 phy_power_on(glue->phy); 134 135 devctl |= MUSB_DEVCTL_SESSION; 136 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 137 MUSB_HST_MODE(musb); 138 break; 139 case USB_ROLE_DEVICE: 140 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 141 glue->phy_mode = PHY_MODE_USB_DEVICE; 142 new_role = USB_ROLE_DEVICE; 143 devctl &= ~MUSB_DEVCTL_SESSION; 144 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 145 if (glue->role == USB_ROLE_NONE) 146 phy_power_on(glue->phy); 147 148 MUSB_DEV_MODE(musb); 149 break; 150 case USB_ROLE_NONE: 151 glue->phy_mode = PHY_MODE_USB_OTG; 152 new_role = USB_ROLE_NONE; 153 devctl &= ~MUSB_DEVCTL_SESSION; 154 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 155 if (glue->role != USB_ROLE_NONE) 156 phy_power_off(glue->phy); 157 158 break; 159 default: 160 dev_err(glue->dev, "Invalid State\n"); 161 return -EINVAL; 162 } 163 164 glue->role = new_role; 165 phy_set_mode(glue->phy, glue->phy_mode); 166 167 return 0; 168 } 169 170 static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role) 171 { 172 return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role); 173 } 174 175 static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw) 176 { 177 struct mtk_glue *glue = usb_role_switch_get_drvdata(sw); 178 179 return glue->role; 180 } 181 182 static int mtk_otg_switch_init(struct mtk_glue *glue) 183 { 184 struct usb_role_switch_desc role_sx_desc = { 0 }; 185 186 role_sx_desc.set = musb_usb_role_sx_set; 187 role_sx_desc.get = musb_usb_role_sx_get; 188 role_sx_desc.fwnode = dev_fwnode(glue->dev); 189 role_sx_desc.driver_data = glue; 190 glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc); 191 192 return PTR_ERR_OR_ZERO(glue->role_sw); 193 } 194 195 static void mtk_otg_switch_exit(struct mtk_glue *glue) 196 { 197 return usb_role_switch_unregister(glue->role_sw); 198 } 199 200 static irqreturn_t generic_interrupt(int irq, void *__hci) 201 { 202 unsigned long flags; 203 irqreturn_t retval = IRQ_NONE; 204 struct musb *musb = __hci; 205 206 spin_lock_irqsave(&musb->lock, flags); 207 musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB); 208 musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX); 209 musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX); 210 211 if (musb->int_usb || musb->int_tx || musb->int_rx) 212 retval = musb_interrupt(musb); 213 214 spin_unlock_irqrestore(&musb->lock, flags); 215 216 return retval; 217 } 218 219 static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id) 220 { 221 irqreturn_t retval = IRQ_NONE; 222 struct musb *musb = (struct musb *)dev_id; 223 u32 l1_ints; 224 225 l1_ints = musb_readl(musb->mregs, USB_L1INTS) & 226 musb_readl(musb->mregs, USB_L1INTM); 227 228 if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS)) 229 retval = generic_interrupt(irq, musb); 230 231 #if defined(CONFIG_USB_INVENTRA_DMA) 232 if (l1_ints & DMA_INT_STATUS) 233 retval = dma_controller_irq(irq, musb->dma_controller); 234 #endif 235 return retval; 236 } 237 238 static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset) 239 { 240 return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum; 241 } 242 243 static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset) 244 { 245 u8 data; 246 247 /* W1C */ 248 data = musb_readb(addr, offset); 249 musb_writeb(addr, offset, data); 250 return data; 251 } 252 253 static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset) 254 { 255 u16 data; 256 257 /* W1C */ 258 data = musb_readw(addr, offset); 259 musb_writew(addr, offset, data); 260 return data; 261 } 262 263 static int mtk_musb_set_mode(struct musb *musb, u8 mode) 264 { 265 struct device *dev = musb->controller; 266 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 267 enum phy_mode new_mode; 268 enum usb_role new_role; 269 270 switch (mode) { 271 case MUSB_HOST: 272 new_mode = PHY_MODE_USB_HOST; 273 new_role = USB_ROLE_HOST; 274 break; 275 case MUSB_PERIPHERAL: 276 new_mode = PHY_MODE_USB_DEVICE; 277 new_role = USB_ROLE_DEVICE; 278 break; 279 case MUSB_OTG: 280 new_mode = PHY_MODE_USB_OTG; 281 new_role = USB_ROLE_NONE; 282 break; 283 default: 284 dev_err(glue->dev, "Invalid mode request\n"); 285 return -EINVAL; 286 } 287 288 if (glue->phy_mode == new_mode) 289 return 0; 290 291 if (musb->port_mode != MUSB_OTG) { 292 dev_err(glue->dev, "Does not support changing modes\n"); 293 return -EINVAL; 294 } 295 296 mtk_otg_switch_set(glue, new_role); 297 return 0; 298 } 299 300 static int mtk_musb_init(struct musb *musb) 301 { 302 struct device *dev = musb->controller; 303 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 304 int ret; 305 306 glue->musb = musb; 307 musb->phy = glue->phy; 308 musb->xceiv = glue->xceiv; 309 musb->is_host = false; 310 musb->isr = mtk_musb_interrupt; 311 312 /* Set TX/RX toggle enable */ 313 musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN); 314 musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN); 315 316 if (musb->port_mode == MUSB_OTG) { 317 ret = mtk_otg_switch_init(glue); 318 if (ret) 319 return ret; 320 } 321 322 ret = phy_init(glue->phy); 323 if (ret) 324 goto err_phy_init; 325 326 ret = phy_power_on(glue->phy); 327 if (ret) 328 goto err_phy_power_on; 329 330 phy_set_mode(glue->phy, glue->phy_mode); 331 332 #if defined(CONFIG_USB_INVENTRA_DMA) 333 musb_writel(musb->mregs, MUSB_HSDMA_INTR, 334 DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK); 335 #endif 336 musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS | 337 USBCOM_INT_STATUS | DMA_INT_STATUS); 338 return 0; 339 340 err_phy_power_on: 341 phy_exit(glue->phy); 342 err_phy_init: 343 mtk_otg_switch_exit(glue); 344 return ret; 345 } 346 347 static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out) 348 { 349 struct musb *musb = qh->hw_ep->musb; 350 u8 epnum = qh->hw_ep->epnum; 351 u16 toggle; 352 353 toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG); 354 return toggle & (1 << epnum); 355 } 356 357 static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb) 358 { 359 struct musb *musb = qh->hw_ep->musb; 360 u8 epnum = qh->hw_ep->epnum; 361 u16 value, toggle; 362 363 toggle = usb_gettoggle(urb->dev, qh->epnum, is_out); 364 365 if (is_out) { 366 value = musb_readw(musb->mregs, MUSB_TXTOG); 367 value |= toggle << epnum; 368 musb_writew(musb->mregs, MUSB_TXTOG, value); 369 } else { 370 value = musb_readw(musb->mregs, MUSB_RXTOG); 371 value |= toggle << epnum; 372 musb_writew(musb->mregs, MUSB_RXTOG, value); 373 } 374 375 return 0; 376 } 377 378 static int mtk_musb_exit(struct musb *musb) 379 { 380 struct device *dev = musb->controller; 381 struct mtk_glue *glue = dev_get_drvdata(dev->parent); 382 383 mtk_otg_switch_exit(glue); 384 phy_power_off(glue->phy); 385 phy_exit(glue->phy); 386 mtk_musb_clks_disable(glue); 387 388 pm_runtime_put_sync(dev); 389 pm_runtime_disable(dev); 390 return 0; 391 } 392 393 static const struct musb_platform_ops mtk_musb_ops = { 394 .quirks = MUSB_DMA_INVENTRA, 395 .init = mtk_musb_init, 396 .get_toggle = mtk_musb_get_toggle, 397 .set_toggle = mtk_musb_set_toggle, 398 .exit = mtk_musb_exit, 399 #ifdef CONFIG_USB_INVENTRA_DMA 400 .dma_init = musbhs_dma_controller_create_noirq, 401 .dma_exit = musbhs_dma_controller_destroy, 402 #endif 403 .clearb = mtk_musb_clearb, 404 .clearw = mtk_musb_clearw, 405 .busctl_offset = mtk_musb_busctl_offset, 406 .set_mode = mtk_musb_set_mode, 407 }; 408 409 #define MTK_MUSB_MAX_EP_NUM 8 410 #define MTK_MUSB_RAM_BITS 11 411 412 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = { 413 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, 414 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, 415 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, 416 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, 417 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, 418 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, 419 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, 420 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, 421 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, 422 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, 423 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, }, 424 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, }, 425 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, 426 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, }, 427 }; 428 429 static const struct musb_hdrc_config mtk_musb_hdrc_config = { 430 .fifo_cfg = mtk_musb_mode_cfg, 431 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg), 432 .multipoint = true, 433 .dyn_fifo = true, 434 .num_eps = MTK_MUSB_MAX_EP_NUM, 435 .ram_bits = MTK_MUSB_RAM_BITS, 436 }; 437 438 static const struct platform_device_info mtk_dev_info = { 439 .name = "musb-hdrc", 440 .id = PLATFORM_DEVID_AUTO, 441 .dma_mask = DMA_BIT_MASK(32), 442 }; 443 444 static int mtk_musb_probe(struct platform_device *pdev) 445 { 446 struct musb_hdrc_platform_data *pdata; 447 struct mtk_glue *glue; 448 struct platform_device_info pinfo; 449 struct device *dev = &pdev->dev; 450 struct device_node *np = dev->of_node; 451 int ret; 452 453 glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL); 454 if (!glue) 455 return -ENOMEM; 456 457 glue->dev = dev; 458 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 459 if (!pdata) 460 return -ENOMEM; 461 462 ret = of_platform_populate(np, NULL, NULL, dev); 463 if (ret) { 464 dev_err(dev, "failed to create child devices at %p\n", np); 465 return ret; 466 } 467 468 ret = mtk_musb_clks_get(glue); 469 if (ret) 470 return ret; 471 472 pdata->config = &mtk_musb_hdrc_config; 473 pdata->platform_ops = &mtk_musb_ops; 474 pdata->mode = usb_get_dr_mode(dev); 475 476 if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) 477 pdata->mode = USB_DR_MODE_HOST; 478 else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET)) 479 pdata->mode = USB_DR_MODE_PERIPHERAL; 480 481 switch (pdata->mode) { 482 case USB_DR_MODE_HOST: 483 glue->phy_mode = PHY_MODE_USB_HOST; 484 glue->role = USB_ROLE_HOST; 485 break; 486 case USB_DR_MODE_PERIPHERAL: 487 glue->phy_mode = PHY_MODE_USB_DEVICE; 488 glue->role = USB_ROLE_DEVICE; 489 break; 490 case USB_DR_MODE_OTG: 491 glue->phy_mode = PHY_MODE_USB_OTG; 492 glue->role = USB_ROLE_NONE; 493 break; 494 default: 495 dev_err(&pdev->dev, "Error 'dr_mode' property\n"); 496 return -EINVAL; 497 } 498 499 glue->phy = devm_of_phy_get_by_index(dev, np, 0); 500 if (IS_ERR(glue->phy)) { 501 dev_err(dev, "fail to getting phy %ld\n", 502 PTR_ERR(glue->phy)); 503 return PTR_ERR(glue->phy); 504 } 505 506 glue->usb_phy = usb_phy_generic_register(); 507 if (IS_ERR(glue->usb_phy)) { 508 dev_err(dev, "fail to registering usb-phy %ld\n", 509 PTR_ERR(glue->usb_phy)); 510 return PTR_ERR(glue->usb_phy); 511 } 512 513 glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 514 if (IS_ERR(glue->xceiv)) { 515 dev_err(dev, "fail to getting usb-phy %d\n", ret); 516 ret = PTR_ERR(glue->xceiv); 517 goto err_unregister_usb_phy; 518 } 519 520 platform_set_drvdata(pdev, glue); 521 pm_runtime_enable(dev); 522 pm_runtime_get_sync(dev); 523 524 ret = mtk_musb_clks_enable(glue); 525 if (ret) 526 goto err_enable_clk; 527 528 pinfo = mtk_dev_info; 529 pinfo.parent = dev; 530 pinfo.res = pdev->resource; 531 pinfo.num_res = pdev->num_resources; 532 pinfo.data = pdata; 533 pinfo.size_data = sizeof(*pdata); 534 535 glue->musb_pdev = platform_device_register_full(&pinfo); 536 if (IS_ERR(glue->musb_pdev)) { 537 ret = PTR_ERR(glue->musb_pdev); 538 dev_err(dev, "failed to register musb device: %d\n", ret); 539 goto err_device_register; 540 } 541 542 return 0; 543 544 err_device_register: 545 mtk_musb_clks_disable(glue); 546 err_enable_clk: 547 pm_runtime_put_sync(dev); 548 pm_runtime_disable(dev); 549 err_unregister_usb_phy: 550 usb_phy_generic_unregister(glue->usb_phy); 551 return ret; 552 } 553 554 static int mtk_musb_remove(struct platform_device *pdev) 555 { 556 struct mtk_glue *glue = platform_get_drvdata(pdev); 557 struct platform_device *usb_phy = glue->usb_phy; 558 559 platform_device_unregister(glue->musb_pdev); 560 usb_phy_generic_unregister(usb_phy); 561 562 return 0; 563 } 564 565 #ifdef CONFIG_OF 566 static const struct of_device_id mtk_musb_match[] = { 567 {.compatible = "mediatek,mtk-musb",}, 568 {}, 569 }; 570 MODULE_DEVICE_TABLE(of, mtk_musb_match); 571 #endif 572 573 static struct platform_driver mtk_musb_driver = { 574 .probe = mtk_musb_probe, 575 .remove = mtk_musb_remove, 576 .driver = { 577 .name = "musb-mtk", 578 .of_match_table = of_match_ptr(mtk_musb_match), 579 }, 580 }; 581 582 module_platform_driver(mtk_musb_driver); 583 584 MODULE_DESCRIPTION("MediaTek MUSB Glue Layer"); 585 MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>"); 586 MODULE_LICENSE("GPL v2"); 587