1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * RK3399-based FriendlyElec boards device tree source
4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
9 *
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
12 */
13
14/dts-v1/;
15#include <dt-bindings/input/linux-event-codes.h>
16#include "rk3399.dtsi"
17#include "rk3399-opp.dtsi"
18
19/ {
20	aliases {
21		mmc0 = &sdio0;
22		mmc1 = &sdmmc;
23		mmc2 = &sdhci;
24	};
25
26	chosen {
27		stdout-path = "serial2:1500000n8";
28	};
29
30	clkin_gmac: external-gmac-clock {
31		compatible = "fixed-clock";
32		clock-frequency = <125000000>;
33		clock-output-names = "clkin_gmac";
34		#clock-cells = <0>;
35	};
36
37	vcc3v3_sys: vcc3v3-sys {
38		compatible = "regulator-fixed";
39		regulator-always-on;
40		regulator-boot-on;
41		regulator-min-microvolt = <3300000>;
42		regulator-max-microvolt = <3300000>;
43		regulator-name = "vcc3v3_sys";
44	};
45
46	vcc5v0_sys: vcc5v0-sys {
47		compatible = "regulator-fixed";
48		regulator-always-on;
49		regulator-boot-on;
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		regulator-name = "vcc5v0_sys";
53		vin-supply = <&vdd_5v>;
54	};
55
56	/* switched by pmic_sleep */
57	vcc1v8_s3: vcc1v8-s3 {
58		compatible = "regulator-fixed";
59		regulator-always-on;
60		regulator-boot-on;
61		regulator-min-microvolt = <1800000>;
62		regulator-max-microvolt = <1800000>;
63		regulator-name = "vcc1v8_s3";
64		vin-supply = <&vcc_1v8>;
65	};
66
67	vcc3v0_sd: vcc3v0-sd {
68		compatible = "regulator-fixed";
69		enable-active-high;
70		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
71		pinctrl-names = "default";
72		pinctrl-0 = <&sdmmc0_pwr_h>;
73		regulator-always-on;
74		regulator-min-microvolt = <3000000>;
75		regulator-max-microvolt = <3000000>;
76		regulator-name = "vcc3v0_sd";
77		vin-supply = <&vcc3v3_sys>;
78	};
79
80	/*
81	 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
82	 * drives the enable pin, but we can't quite model that.
83	 */
84	vcca0v9_s3: vcca0v9-s3 {
85		compatible = "regulator-fixed";
86		regulator-min-microvolt = <900000>;
87		regulator-max-microvolt = <900000>;
88		regulator-name = "vcca0v9_s3";
89		vin-supply = <&vcc1v8_s3>;
90	};
91
92	/* As above, actually supplied by vcc3v3_sys */
93	vcca1v8_s3: vcca1v8-s3 {
94		compatible = "regulator-fixed";
95		regulator-min-microvolt = <1800000>;
96		regulator-max-microvolt = <1800000>;
97		regulator-name = "vcca1v8_s3";
98		vin-supply = <&vcc1v8_s3>;
99	};
100
101	vbus_typec: vbus-typec {
102		compatible = "regulator-fixed";
103		regulator-min-microvolt = <5000000>;
104		regulator-max-microvolt = <5000000>;
105		regulator-name = "vbus_typec";
106	};
107
108	gpio-keys {
109		compatible = "gpio-keys";
110		autorepeat;
111		pinctrl-names = "default";
112		pinctrl-0 = <&power_key>;
113
114		power {
115			debounce-interval = <100>;
116			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
117			label = "GPIO Key Power";
118			linux,code = <KEY_POWER>;
119			wakeup-source;
120		};
121	};
122
123	leds: gpio-leds {
124		compatible = "gpio-leds";
125		pinctrl-names = "default";
126		pinctrl-0 = <&status_led_pin>;
127
128		status_led: led-0 {
129			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
130			label = "status_led";
131			linux,default-trigger = "heartbeat";
132		};
133	};
134
135	sdio_pwrseq: sdio-pwrseq {
136		compatible = "mmc-pwrseq-simple";
137		clocks = <&rk808 1>;
138		clock-names = "ext_clock";
139		pinctrl-names = "default";
140		pinctrl-0 = <&wifi_reg_on_h>;
141		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
142	};
143};
144
145&cpu_b0 {
146	cpu-supply = <&vdd_cpu_b>;
147};
148
149&cpu_b1 {
150	cpu-supply = <&vdd_cpu_b>;
151};
152
153&cpu_l0 {
154	cpu-supply = <&vdd_cpu_l>;
155};
156
157&cpu_l1 {
158	cpu-supply = <&vdd_cpu_l>;
159};
160
161&cpu_l2 {
162	cpu-supply = <&vdd_cpu_l>;
163};
164
165&cpu_l3 {
166	cpu-supply = <&vdd_cpu_l>;
167};
168
169&emmc_phy {
170	status = "okay";
171};
172
173&gmac {
174	assigned-clock-parents = <&clkin_gmac>;
175	assigned-clocks = <&cru SCLK_RMII_SRC>;
176	clock_in_out = "input";
177	pinctrl-names = "default";
178	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
179	phy-handle = <&rtl8211e>;
180	phy-mode = "rgmii";
181	phy-supply = <&vcc3v3_s3>;
182	tx_delay = <0x28>;
183	rx_delay = <0x11>;
184	status = "okay";
185
186	mdio {
187		compatible = "snps,dwmac-mdio";
188		#address-cells = <1>;
189		#size-cells = <0>;
190
191		rtl8211e: ethernet-phy@1 {
192			reg = <1>;
193			interrupt-parent = <&gpio3>;
194			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
195			reset-assert-us = <10000>;
196			reset-deassert-us = <30000>;
197			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
198		};
199	};
200};
201
202&gpu {
203	mali-supply = <&vdd_gpu>;
204	status = "okay";
205};
206
207&hdmi {
208	ddc-i2c-bus = <&i2c7>;
209	pinctrl-names = "default";
210	pinctrl-0 = <&hdmi_cec>;
211	status = "okay";
212};
213
214&hdmi_sound {
215	status = "okay";
216};
217
218&i2c0 {
219	clock-frequency = <400000>;
220	i2c-scl-rising-time-ns = <160>;
221	i2c-scl-falling-time-ns = <30>;
222	status = "okay";
223
224	vdd_cpu_b: regulator@40 {
225		compatible = "silergy,syr827";
226		reg = <0x40>;
227		fcs,suspend-voltage-selector = <1>;
228		pinctrl-names = "default";
229		pinctrl-0 = <&cpu_b_sleep>;
230		regulator-always-on;
231		regulator-boot-on;
232		regulator-min-microvolt = <712500>;
233		regulator-max-microvolt = <1500000>;
234		regulator-name = "vdd_cpu_b";
235		regulator-ramp-delay = <1000>;
236		vin-supply = <&vcc3v3_sys>;
237
238		regulator-state-mem {
239			regulator-off-in-suspend;
240		};
241	};
242
243	vdd_gpu: regulator@41 {
244		compatible = "silergy,syr828";
245		reg = <0x41>;
246		fcs,suspend-voltage-selector = <1>;
247		pinctrl-names = "default";
248		pinctrl-0 = <&gpu_sleep>;
249		regulator-always-on;
250		regulator-boot-on;
251		regulator-min-microvolt = <712500>;
252		regulator-max-microvolt = <1500000>;
253		regulator-name = "vdd_gpu";
254		regulator-ramp-delay = <1000>;
255		vin-supply = <&vcc3v3_sys>;
256
257		regulator-state-mem {
258			regulator-off-in-suspend;
259		};
260	};
261
262	rk808: pmic@1b {
263		compatible = "rockchip,rk808";
264		reg = <0x1b>;
265		clock-output-names = "xin32k", "rtc_clko_wifi";
266		#clock-cells = <1>;
267		interrupt-parent = <&gpio1>;
268		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
269		pinctrl-names = "default";
270		pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>;
271		rockchip,system-power-controller;
272		wakeup-source;
273
274		vcc1-supply = <&vcc3v3_sys>;
275		vcc2-supply = <&vcc3v3_sys>;
276		vcc3-supply = <&vcc3v3_sys>;
277		vcc4-supply = <&vcc3v3_sys>;
278		vcc6-supply = <&vcc3v3_sys>;
279		vcc7-supply = <&vcc3v3_sys>;
280		vcc8-supply = <&vcc3v3_sys>;
281		vcc9-supply = <&vcc3v3_sys>;
282		vcc10-supply = <&vcc3v3_sys>;
283		vcc11-supply = <&vcc3v3_sys>;
284		vcc12-supply = <&vcc3v3_sys>;
285		vddio-supply = <&vcc_3v0>;
286
287		regulators {
288			vdd_center: DCDC_REG1 {
289				regulator-always-on;
290				regulator-boot-on;
291				regulator-min-microvolt = <750000>;
292				regulator-max-microvolt = <1350000>;
293				regulator-name = "vdd_center";
294				regulator-ramp-delay = <6001>;
295
296				regulator-state-mem {
297					regulator-off-in-suspend;
298				};
299			};
300
301			vdd_cpu_l: DCDC_REG2 {
302				regulator-always-on;
303				regulator-boot-on;
304				regulator-min-microvolt = <750000>;
305				regulator-max-microvolt = <1350000>;
306				regulator-name = "vdd_cpu_l";
307				regulator-ramp-delay = <6001>;
308
309				regulator-state-mem {
310					regulator-off-in-suspend;
311				};
312			};
313
314			vcc_ddr: DCDC_REG3 {
315				regulator-always-on;
316				regulator-boot-on;
317				regulator-name = "vcc_ddr";
318
319				regulator-state-mem {
320					regulator-on-in-suspend;
321				};
322			};
323
324			vcc_1v8: DCDC_REG4 {
325				regulator-always-on;
326				regulator-boot-on;
327				regulator-min-microvolt = <1800000>;
328				regulator-max-microvolt = <1800000>;
329				regulator-name = "vcc_1v8";
330
331				regulator-state-mem {
332					regulator-on-in-suspend;
333					regulator-suspend-microvolt = <1800000>;
334				};
335			};
336
337			vcc1v8_cam: LDO_REG1 {
338				regulator-always-on;
339				regulator-boot-on;
340				regulator-min-microvolt = <1800000>;
341				regulator-max-microvolt = <1800000>;
342				regulator-name = "vcc1v8_cam";
343
344				regulator-state-mem {
345					regulator-off-in-suspend;
346				};
347			};
348
349			vcc3v0_touch: LDO_REG2 {
350				regulator-always-on;
351				regulator-boot-on;
352				regulator-min-microvolt = <3000000>;
353				regulator-max-microvolt = <3000000>;
354				regulator-name = "vcc3v0_touch";
355
356				regulator-state-mem {
357					regulator-off-in-suspend;
358				};
359			};
360
361			vcc1v8_pmupll: LDO_REG3 {
362				regulator-always-on;
363				regulator-boot-on;
364				regulator-min-microvolt = <1800000>;
365				regulator-max-microvolt = <1800000>;
366				regulator-name = "vcc1v8_pmupll";
367
368				regulator-state-mem {
369					regulator-on-in-suspend;
370					regulator-suspend-microvolt = <1800000>;
371				};
372			};
373
374			vcc_sdio: LDO_REG4 {
375				regulator-always-on;
376				regulator-boot-on;
377				regulator-init-microvolt = <3000000>;
378				regulator-min-microvolt = <1800000>;
379				regulator-max-microvolt = <3300000>;
380				regulator-name = "vcc_sdio";
381
382				regulator-state-mem {
383					regulator-on-in-suspend;
384					regulator-suspend-microvolt = <3000000>;
385				};
386			};
387
388			vcca3v0_codec: LDO_REG5 {
389				regulator-always-on;
390				regulator-boot-on;
391				regulator-min-microvolt = <3000000>;
392				regulator-max-microvolt = <3000000>;
393				regulator-name = "vcca3v0_codec";
394
395				regulator-state-mem {
396					regulator-off-in-suspend;
397				};
398			};
399
400			vcc_1v5: LDO_REG6 {
401				regulator-always-on;
402				regulator-boot-on;
403				regulator-min-microvolt = <1500000>;
404				regulator-max-microvolt = <1500000>;
405				regulator-name = "vcc_1v5";
406
407				regulator-state-mem {
408					regulator-on-in-suspend;
409					regulator-suspend-microvolt = <1500000>;
410				};
411			};
412
413			vcca1v8_codec: LDO_REG7 {
414				regulator-always-on;
415				regulator-boot-on;
416				regulator-min-microvolt = <1800000>;
417				regulator-max-microvolt = <1800000>;
418				regulator-name = "vcca1v8_codec";
419
420				regulator-state-mem {
421					regulator-off-in-suspend;
422				};
423			};
424
425			vcc_3v0: LDO_REG8 {
426				regulator-always-on;
427				regulator-boot-on;
428				regulator-min-microvolt = <3000000>;
429				regulator-max-microvolt = <3000000>;
430				regulator-name = "vcc_3v0";
431
432				regulator-state-mem {
433					regulator-on-in-suspend;
434					regulator-suspend-microvolt = <3000000>;
435				};
436			};
437
438			vcc3v3_s3: SWITCH_REG1 {
439				regulator-always-on;
440				regulator-boot-on;
441				regulator-name = "vcc3v3_s3";
442
443				regulator-state-mem {
444					regulator-off-in-suspend;
445				};
446			};
447
448			vcc3v3_s0: SWITCH_REG2 {
449				regulator-always-on;
450				regulator-boot-on;
451				regulator-name = "vcc3v3_s0";
452
453				regulator-state-mem {
454					regulator-off-in-suspend;
455				};
456			};
457		};
458	};
459};
460
461&i2c1 {
462	clock-frequency = <200000>;
463	i2c-scl-rising-time-ns = <150>;
464	i2c-scl-falling-time-ns = <30>;
465	status = "okay";
466};
467
468&i2c2 {
469	status = "okay";
470};
471
472&i2c4 {
473	clock-frequency = <400000>;
474	i2c-scl-rising-time-ns = <160>;
475	i2c-scl-falling-time-ns = <30>;
476	status = "okay";
477
478	fusb0: typec-portc@22 {
479		compatible = "fcs,fusb302";
480		reg = <0x22>;
481		interrupt-parent = <&gpio1>;
482		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
483		pinctrl-names = "default";
484		pinctrl-0 = <&fusb0_int>;
485		vbus-supply = <&vbus_typec>;
486	};
487};
488
489&i2c7 {
490	status = "okay";
491};
492
493&i2s2 {
494	status = "okay";
495};
496
497&io_domains {
498	bt656-supply = <&vcc_1v8>;
499	audio-supply = <&vcca1v8_codec>;
500	sdmmc-supply = <&vcc_sdio>;
501	gpio1830-supply = <&vcc_3v0>;
502	status = "okay";
503};
504
505&pcie_phy {
506	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
507	assigned-clock-rates = <100000000>;
508	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
509	status = "okay";
510};
511
512&pcie0 {
513	num-lanes = <2>;
514	vpcie0v9-supply = <&vcca0v9_s3>;
515	vpcie1v8-supply = <&vcca1v8_s3>;
516	status = "okay";
517};
518
519&pinctrl {
520	fusb30x {
521		fusb0_int: fusb0-int {
522			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
523		};
524	};
525
526	gpio-leds {
527		status_led_pin: status-led-pin {
528			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
529		};
530	};
531
532	gmac {
533		phy_intb: phy-intb {
534			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
535		};
536
537		phy_rstb: phy-rstb {
538			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
539		};
540	};
541
542	pmic {
543		cpu_b_sleep: cpu-b-sleep {
544			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
545		};
546
547		gpu_sleep: gpu-sleep {
548			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
549		};
550
551		pmic_int_l: pmic-int-l {
552			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
553		};
554	};
555
556	rockchip-key {
557		power_key: power-key {
558			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
559		};
560	};
561
562	sdio {
563		bt_host_wake_l: bt-host-wake-l {
564			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
565		};
566
567		bt_reg_on_h: bt-reg-on-h {
568			/* external pullup to VCC1V8_PMUPLL */
569			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
570		};
571
572		bt_wake_l: bt-wake-l {
573			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
574		};
575
576		wifi_reg_on_h: wifi-reg_on-h {
577			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
578		};
579	};
580
581	sdmmc {
582		sdmmc0_det_l: sdmmc0-det-l {
583			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
584		};
585
586		sdmmc0_pwr_h: sdmmc0-pwr-h {
587			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
588		};
589	};
590};
591
592&pmu_io_domains {
593	pmu1830-supply = <&vcc_3v0>;
594	status = "okay";
595};
596
597&pwm0 {
598	status = "okay";
599};
600
601&pwm1 {
602	status = "okay";
603};
604
605&pwm2 {
606	pinctrl-names = "active";
607	pinctrl-0 = <&pwm2_pin_pull_down>;
608	status = "okay";
609};
610
611&saradc {
612	vref-supply = <&vcca1v8_s3>;
613	status = "okay";
614};
615
616&sdhci {
617	bus-width = <8>;
618	mmc-hs200-1_8v;
619	non-removable;
620	status = "okay";
621};
622
623&sdio0 {
624	bus-width = <4>;
625	cap-sd-highspeed;
626	cap-sdio-irq;
627	keep-power-in-suspend;
628	mmc-pwrseq = <&sdio_pwrseq>;
629	non-removable;
630	pinctrl-names = "default";
631	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
632	sd-uhs-sdr104;
633	status = "okay";
634};
635
636&sdmmc {
637	bus-width = <4>;
638	cap-sd-highspeed;
639	cap-mmc-highspeed;
640	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
641	disable-wp;
642	pinctrl-names = "default";
643	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
644	sd-uhs-sdr104;
645	vmmc-supply = <&vcc3v0_sd>;
646	vqmmc-supply = <&vcc_sdio>;
647	status = "okay";
648};
649
650&tcphy0 {
651	status = "okay";
652};
653
654&tcphy1 {
655	status = "okay";
656};
657
658&tsadc {
659	/* tshut mode 0:CRU 1:GPIO */
660	rockchip,hw-tshut-mode = <1>;
661	/* tshut polarity 0:LOW 1:HIGH */
662	rockchip,hw-tshut-polarity = <1>;
663	status = "okay";
664};
665
666&u2phy0 {
667	status = "okay";
668};
669
670&u2phy0_host {
671	status = "okay";
672};
673
674&u2phy0_otg {
675	status = "okay";
676};
677
678&u2phy1 {
679	status = "okay";
680};
681
682&u2phy1_host {
683	status = "okay";
684};
685
686&u2phy1_otg {
687	status = "okay";
688};
689
690&uart0 {
691	pinctrl-names = "default";
692	pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
693	status = "okay";
694
695	bluetooth {
696		compatible = "brcm,bcm43438-bt";
697		clocks = <&rk808 1>;
698		clock-names = "lpo";
699		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
700		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
701		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
702		max-speed = <4000000>;
703		pinctrl-names = "default";
704		pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
705		vbat-supply = <&vcc3v3_sys>;
706		vddio-supply = <&vcc_1v8>;
707	};
708};
709
710&uart2 {
711	status = "okay";
712};
713
714&usbdrd3_0 {
715	status = "okay";
716};
717
718&usbdrd3_1 {
719	status = "okay";
720};
721
722&usbdrd_dwc3_0 {
723	status = "okay";
724};
725
726&usbdrd_dwc3_1 {
727	dr_mode = "host";
728	status = "okay";
729};
730
731&usb_host0_ehci {
732	status = "okay";
733};
734
735&usb_host0_ohci {
736	status = "okay";
737};
738
739&usb_host1_ehci {
740	status = "okay";
741};
742
743&usb_host1_ohci {
744	status = "okay";
745};
746
747&vopb {
748	status = "okay";
749};
750
751&vopb_mmu {
752	status = "okay";
753};
754
755&vopl {
756	status = "okay";
757};
758
759&vopl_mmu {
760	status = "okay";
761};
762