| 037e19b8 | 25-Mar-2013 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
powerpc/t4240qds: fix PHY reset timeout issue
QSGMII card has different PHY address against previous SGMII card.
We check the type of card in slots and set correct PHY address to
avoid complainning
powerpc/t4240qds: fix PHY reset timeout issue
QSGMII card has different PHY address against previous SGMII card.
We check the type of card in slots and set correct PHY address to
avoid complainning "PHY reset timed out" during u-boot booting up.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| c79fd503 | 25-Mar-2013 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
T4240/ramboot: enable PBL tool for T4240
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.
Signed-off-by: Shaohui Xie <Shaohui.Xi
T4240/ramboot: enable PBL tool for T4240
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| 0aadf4aa | 25-Mar-2013 |
York Sun <yorksun@freescale.com> |
powerpc/t4240qds: Add VDD override
Allow VDD voltage overriding with a command. This is an add-on feasture of
VID. To override VDD, use command vdd_override with the value of voltage
in mV, for exam
powerpc/t4240qds: Add VDD override
Allow VDD voltage overriding with a command. This is an add-on feasture of
VID. To override VDD, use command vdd_override with the value of voltage
in mV, for example
vdd_override <voltage in mV, eg. 1050>
The above example will set the VDD to 1.050 volt. Any wrong value out of
range of 0.8188 to 1.2125 volt or invalid string is ignored.
In addition to the command, if overriding VDD is needed earlier in booting
process, save an variable and reboot:
setenv t4240qds_vdd_mv <voltage in mV>
saveenv
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| f63d638d | 25-Mar-2013 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
T4240/eth: fix SGMII card PHY address
QSGMII card assumed to be used by default, but if SGMII card is used,
it will use different PHY address, but we don't know which card is used
until we access PH
T4240/eth: fix SGMII card PHY address
QSGMII card assumed to be used by default, but if SGMII card is used,
it will use different PHY address, but we don't know which card is used
until we access PHY on the card. So we check the card type slot by slot,
if we can read a PHY ID by reading a SGMII PHY address on a slot, then
the slot must have a SGMII card pluged, we mark all ports on that slot,
and fix dts to use the SGMII card PHY address when doing dts fixup
for the marked ports.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| 04bccc3a | 25-Mar-2013 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
T4240/net: use QSGMII card PHY address by default
Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.
Signed-off-by: Shaohu
T4240/net: use QSGMII card PHY address by default
Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| 95927808 | 25-Mar-2013 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
t4240qds/eth: fixup ethernet for t4240qds
1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
slots and interfa
t4240qds/eth: fixup ethernet for t4240qds
1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| 054dfd9b | 25-Mar-2013 |
York Sun <yorksun@freescale.com> |
powerpc/t4240qds: Update DDR timing table
Update the timing table to support more rank density, based on the theory
that similar density DIMMs have similar clock adjust and write level start
timing.
powerpc/t4240qds: Update DDR timing table
Update the timing table to support more rank density, based on the theory
that similar density DIMMs have similar clock adjust and write level start
timing. Update the timing for 1600 and 1866 MT/s. Tested with Micron
MT18JSF1G72AZ-1G9E1 DIMMs, iDIMM M3CN-4GMJ3C0C-M92.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| afa2b72b | 23-Dec-2012 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/t4240qds: Print FPGA detail version
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.
Signed-off-by: York Sun <yorksun@freescal
powerpc/t4240qds: Print FPGA detail version
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| ac13eb5d | 17-Dec-2012 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
board/T4240qds:Fix TLB and LAW size of NAND flash
The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.
So Update TLB and
board/T4240qds:Fix TLB and LAW size of NAND flash
The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.
So Update TLB and LAW size of NAND flash accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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