1 /* 2 * Copyright 2011 Freescale Semiconductor 3 * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the Free 7 * Software Foundation; either version 2 of the License, or (at your option) 8 * any later version. 9 * 10 * This file provides support for the QIXIS of some Freescale reference boards. 11 * 12 */ 13 14 #include <common.h> 15 #include <command.h> 16 #include <asm/io.h> 17 #include <linux/time.h> 18 #include "qixis.h" 19 20 u8 qixis_read(unsigned int reg) 21 { 22 void *p = (void *)QIXIS_BASE; 23 24 return in_8(p + reg); 25 } 26 27 void qixis_write(unsigned int reg, u8 value) 28 { 29 void *p = (void *)QIXIS_BASE; 30 31 out_8(p + reg, value); 32 } 33 34 u16 qixis_read_minor(void) 35 { 36 u16 minor; 37 38 /* this data is in little endian */ 39 QIXIS_WRITE(tagdata, 5); 40 minor = QIXIS_READ(tagdata); 41 QIXIS_WRITE(tagdata, 6); 42 minor += QIXIS_READ(tagdata) << 8; 43 44 return minor; 45 } 46 47 char *qixis_read_time(char *result) 48 { 49 time_t time = 0; 50 int i; 51 52 /* timestamp is in 32-bit big endian */ 53 for (i = 8; i <= 11; i++) { 54 QIXIS_WRITE(tagdata, i); 55 time = (time << 8) + QIXIS_READ(tagdata); 56 } 57 58 return ctime_r(&time, result); 59 } 60 61 char *qixis_read_tag(char *buf) 62 { 63 int i; 64 char tag, *ptr = buf; 65 66 for (i = 16; i <= 63; i++) { 67 QIXIS_WRITE(tagdata, i); 68 tag = QIXIS_READ(tagdata); 69 *(ptr++) = tag; 70 if (!tag) 71 break; 72 } 73 if (i > 63) 74 *ptr = '\0'; 75 76 return buf; 77 } 78 79 /* 80 * return the string of binary of u8 in the format of 81 * 1010 10_0. The masked bit is filled as underscore. 82 */ 83 const char *byte_to_binary_mask(u8 val, u8 mask, char *buf) 84 { 85 char *ptr; 86 int i; 87 88 ptr = buf; 89 for (i = 0x80; i > 0x08 ; i >>= 1, ptr++) 90 *ptr = (val & i) ? '1' : ((mask & i) ? '_' : '0'); 91 *(ptr++) = ' '; 92 for (i = 0x08; i > 0 ; i >>= 1, ptr++) 93 *ptr = (val & i) ? '1' : ((mask & i) ? '_' : '0'); 94 95 *ptr = '\0'; 96 97 return buf; 98 } 99 100 void qixis_reset(void) 101 { 102 QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET); 103 } 104 105 void qixis_bank_reset(void) 106 { 107 QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE); 108 QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START); 109 } 110 111 /* Set the boot bank to the power-on default bank */ 112 void clear_altbank(void) 113 { 114 u8 reg; 115 116 reg = QIXIS_READ(brdcfg[0]); 117 reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_DFLTBANK; 118 QIXIS_WRITE(brdcfg[0], reg); 119 } 120 121 /* Set the boot bank to the alternate bank */ 122 void set_altbank(void) 123 { 124 u8 reg; 125 126 reg = QIXIS_READ(brdcfg[0]); 127 reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_ALTBANK; 128 QIXIS_WRITE(brdcfg[0], reg); 129 } 130 131 static void qixis_dump_regs(void) 132 { 133 int i; 134 135 printf("id = %02x\n", QIXIS_READ(id)); 136 printf("arch = %02x\n", QIXIS_READ(arch)); 137 printf("scver = %02x\n", QIXIS_READ(scver)); 138 printf("model = %02x\n", QIXIS_READ(model)); 139 printf("rst_ctl = %02x\n", QIXIS_READ(rst_ctl)); 140 printf("aux = %02x\n", QIXIS_READ(aux)); 141 for (i = 0; i < 16; i++) 142 printf("brdcfg%02d = %02x\n", i, QIXIS_READ(brdcfg[i])); 143 for (i = 0; i < 16; i++) 144 printf("dutcfg%02d = %02x\n", i, QIXIS_READ(dutcfg[i])); 145 printf("sclk = %02x%02x%02x\n", QIXIS_READ(sclk[0]), 146 QIXIS_READ(sclk[1]), QIXIS_READ(sclk[2])); 147 printf("dclk = %02x%02x%02x\n", QIXIS_READ(dclk[0]), 148 QIXIS_READ(dclk[1]), QIXIS_READ(dclk[2])); 149 printf("aux = %02x\n", QIXIS_READ(aux)); 150 printf("watch = %02x\n", QIXIS_READ(watch)); 151 printf("ctl_sys = %02x\n", QIXIS_READ(ctl_sys)); 152 printf("rcw_ctl = %02x\n", QIXIS_READ(rcw_ctl)); 153 printf("present = %02x\n", QIXIS_READ(present)); 154 printf("present2 = %02x\n", QIXIS_READ(present2)); 155 printf("clk_spd = %02x\n", QIXIS_READ(clk_spd)); 156 printf("stat_dut = %02x\n", QIXIS_READ(stat_dut)); 157 printf("stat_sys = %02x\n", QIXIS_READ(stat_sys)); 158 printf("stat_alrm = %02x\n", QIXIS_READ(stat_alrm)); 159 } 160 161 static void __qixis_dump_switch(void) 162 { 163 puts("Reverse engineering switch is not implemented for this board\n"); 164 } 165 166 void qixis_dump_switch(void) 167 __attribute__((weak, alias("__qixis_dump_switch"))); 168 169 int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 170 { 171 int i; 172 173 if (argc <= 1) { 174 clear_altbank(); 175 qixis_reset(); 176 } else if (strcmp(argv[1], "altbank") == 0) { 177 set_altbank(); 178 qixis_bank_reset(); 179 } else if (strcmp(argv[1], "watchdog") == 0) { 180 static char *period[9] = {"2s", "4s", "8s", "16s", "32s", 181 "1min", "2min", "4min", "8min"}; 182 u8 rcfg = QIXIS_READ(rcfg_ctl); 183 184 if (argv[2] == NULL) { 185 printf("qixis watchdog <watchdog_period>\n"); 186 return 0; 187 } 188 for (i = 0; i < ARRAY_SIZE(period); i++) { 189 if (strcmp(argv[2], period[i]) == 0) { 190 /* disable watchdog */ 191 QIXIS_WRITE(rcfg_ctl, 192 rcfg & ~QIXIS_RCFG_CTL_WATCHDOG_ENBLE); 193 QIXIS_WRITE(watch, ((i<<2) - 1)); 194 QIXIS_WRITE(rcfg_ctl, rcfg); 195 return 0; 196 } 197 } 198 } else if (strcmp(argv[1], "dump") == 0) { 199 qixis_dump_regs(); 200 return 0; 201 } else if (strcmp(argv[1], "switch") == 0) { 202 qixis_dump_switch(); 203 return 0; 204 } else { 205 printf("Invalid option: %s\n", argv[1]); 206 return 1; 207 } 208 209 return 0; 210 } 211 212 U_BOOT_CMD( 213 qixis_reset, CONFIG_SYS_MAXARGS, 1, qixis_reset_cmd, 214 "Reset the board using the FPGA sequencer", 215 "- hard reset to default bank\n" 216 "qixis_reset altbank - reset to alternate bank\n" 217 "qixis watchdog <watchdog_period> - set the watchdog period\n" 218 " period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n" 219 "qixis_reset dump - display the QIXIS registers\n" 220 "qixis_reset switch - display switch\n" 221 ); 222