xref: /openbmc/u-boot/arch/arm/cpu/arm946es/start.S (revision 69fdf900) 
1/*
2 *  armboot - Startup Code for ARM926EJS CPU-core
3 *
4 *  Copyright (c) 2003  Texas Instruments
5 *
6 *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 *  Copyright (c) 2001	Marius Gröger <mag@sysgo.de>
9 *  Copyright (c) 2002	Alex Züpke <azu@sysgo.de>
10 *  Copyright (c) 2002	Gary Jennejohn <garyj@denx.de>
11 *  Copyright (c) 2003	Richard Woodruff <r-woodruff2@ti.com>
12 *  Copyright (c) 2003	Kshitij <kshitij@ti.com>
13 *  Copyright (c) 2010	Albert Aribaud <albert.u.boot@aribaud.net>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <asm-offsets.h>
35#include <config.h>
36#include <version.h>
37
38/*
39 *************************************************************************
40 *
41 * Jump vector table as in table 3.1 in [1]
42 *
43 *************************************************************************
44 */
45
46
47.globl _start
48_start:
49	b	reset
50	ldr	pc, _undefined_instruction
51	ldr	pc, _software_interrupt
52	ldr	pc, _prefetch_abort
53	ldr	pc, _data_abort
54	ldr	pc, _not_used
55	ldr	pc, _irq
56	ldr	pc, _fiq
57
58_undefined_instruction:
59	.word undefined_instruction
60_software_interrupt:
61	.word software_interrupt
62_prefetch_abort:
63	.word prefetch_abort
64_data_abort:
65	.word data_abort
66_not_used:
67	.word not_used
68_irq:
69	.word irq
70_fiq:
71	.word fiq
72
73	.balignl 16,0xdeadbeef
74
75_vectors_end:
76
77/*
78 *************************************************************************
79 *
80 * Startup Code (reset vector)
81 *
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
85 * setup stack
86 *
87 *************************************************************************
88 */
89
90.globl _TEXT_BASE
91_TEXT_BASE:
92#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
93	.word	CONFIG_SPL_TEXT_BASE
94#else
95	.word	CONFIG_SYS_TEXT_BASE
96#endif
97
98/*
99 * These are defined in the board-specific linker script.
100 * Subtracting _start from them lets the linker put their
101 * relative position in the executable instead of leaving
102 * them null.
103 */
104.globl _bss_start_ofs
105_bss_start_ofs:
106	.word __bss_start - _start
107
108.globl _bss_end_ofs
109_bss_end_ofs:
110	.word __bss_end - _start
111
112.globl _end_ofs
113_end_ofs:
114	.word _end - _start
115
116#ifdef CONFIG_USE_IRQ
117/* IRQ stack memory (calculated at run-time) */
118.globl IRQ_STACK_START
119IRQ_STACK_START:
120	.word	0x0badc0de
121
122/* IRQ stack memory (calculated at run-time) */
123.globl FIQ_STACK_START
124FIQ_STACK_START:
125	.word 0x0badc0de
126#endif
127
128/* IRQ stack memory (calculated at run-time) + 8 bytes */
129.globl IRQ_STACK_START_IN
130IRQ_STACK_START_IN:
131	.word	0x0badc0de
132
133/*
134 * the actual reset code
135 */
136
137reset:
138	/*
139	 * set the cpu to SVC32 mode
140	 */
141	mrs	r0,cpsr
142	bic	r0,r0,#0x1f
143	orr	r0,r0,#0xd3
144	msr	cpsr,r0
145
146	/*
147	 * we do sys-critical inits only at reboot,
148	 * not when booting from ram!
149	 */
150#ifndef CONFIG_SKIP_LOWLEVEL_INIT
151	bl	cpu_init_crit
152#endif
153
154	bl	_main
155
156/*------------------------------------------------------------------------------*/
157
158	.globl	c_runtime_cpu_setup
159c_runtime_cpu_setup:
160
161	mov	pc, lr
162
163/*
164 *************************************************************************
165 *
166 * CPU_init_critical registers
167 *
168 * setup important registers
169 * setup memory timing
170 *
171 *************************************************************************
172 */
173
174
175#ifndef CONFIG_SKIP_LOWLEVEL_INIT
176cpu_init_crit:
177	/*
178	 * flush v4 I/D caches
179	 */
180	mov	r0, #0
181	mcr	p15, 0, r0, c7, c5, 0	/* flush v4 I-cache */
182	mcr	p15, 0, r0, c7, c6, 0	/* flush v4 D-cache */
183
184	/*
185	 * disable MMU stuff and caches
186	 */
187	mrc	p15, 0, r0, c1, c0, 0
188	bic	r0, r0, #0x00002300	/* clear bits 13, 9:8 (--V- --RS) */
189	bic	r0, r0, #0x00000087	/* clear bits 7, 2:0 (B--- -CAM) */
190	orr	r0, r0, #0x00000002	/* set bit 2 (A) Align */
191	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
192	mcr	p15, 0, r0, c1, c0, 0
193
194	/*
195	 * Go setup Memory and board specific bits prior to relocation.
196	 */
197	mov	ip, lr		/* perserve link reg across call */
198	bl	lowlevel_init	/* go setup memory */
199	mov	lr, ip		/* restore link */
200	mov	pc, lr		/* back to my caller */
201#endif
202/*
203 *************************************************************************
204 *
205 * Interrupt handling
206 *
207 *************************************************************************
208 */
209
210@
211@ IRQ stack frame.
212@
213#define S_FRAME_SIZE	72
214
215#define S_OLD_R0	68
216#define S_PSR		64
217#define S_PC		60
218#define S_LR		56
219#define S_SP		52
220
221#define S_IP		48
222#define S_FP		44
223#define S_R10		40
224#define S_R9		36
225#define S_R8		32
226#define S_R7		28
227#define S_R6		24
228#define S_R5		20
229#define S_R4		16
230#define S_R3		12
231#define S_R2		8
232#define S_R1		4
233#define S_R0		0
234
235#define MODE_SVC 0x13
236#define I_BIT	 0x80
237
238/*
239 * use bad_save_user_regs for abort/prefetch/undef/swi ...
240 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
241 */
242
243	.macro	bad_save_user_regs
244	@ carve out a frame on current user stack
245	sub	sp, sp, #S_FRAME_SIZE
246	stmia	sp, {r0 - r12}	@ Save user registers (now in svc mode) r0-r12
247
248	ldr	r2, IRQ_STACK_START_IN
249	@ get values for "aborted" pc and cpsr (into parm regs)
250	ldmia	r2, {r2 - r3}
251	add	r0, sp, #S_FRAME_SIZE		@ grab pointer to old stack
252	add	r5, sp, #S_SP
253	mov	r1, lr
254	stmia	r5, {r0 - r3}	@ save sp_SVC, lr_SVC, pc, cpsr
255	mov	r0, sp		@ save current stack into r0 (param register)
256	.endm
257
258	.macro	irq_save_user_regs
259	sub	sp, sp, #S_FRAME_SIZE
260	stmia	sp, {r0 - r12}			@ Calling r0-r12
261	@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
262	add	r8, sp, #S_PC
263	stmdb	r8, {sp, lr}^		@ Calling SP, LR
264	str	lr, [r8, #0]		@ Save calling PC
265	mrs	r6, spsr
266	str	r6, [r8, #4]		@ Save CPSR
267	str	r0, [r8, #8]		@ Save OLD_R0
268	mov	r0, sp
269	.endm
270
271	.macro	irq_restore_user_regs
272	ldmia	sp, {r0 - lr}^			@ Calling r0 - lr
273	mov	r0, r0
274	ldr	lr, [sp, #S_PC]			@ Get PC
275	add	sp, sp, #S_FRAME_SIZE
276	subs	pc, lr, #4		@ return & move spsr_svc into cpsr
277	.endm
278
279	.macro get_bad_stack
280	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack
281
282	str	lr, [r13]	@ save caller lr in position 0 of saved stack
283	mrs	lr, spsr	@ get the spsr
284	str	lr, [r13, #4]	@ save spsr in position 1 of saved stack
285	mov	r13, #MODE_SVC	@ prepare SVC-Mode
286	@ msr	spsr_c, r13
287	msr	spsr, r13	@ switch modes, make sure moves will execute
288	mov	lr, pc		@ capture return pc
289	movs	pc, lr		@ jump to next instruction & switch modes.
290	.endm
291
292	.macro get_irq_stack			@ setup IRQ stack
293	ldr	sp, IRQ_STACK_START
294	.endm
295
296	.macro get_fiq_stack			@ setup FIQ stack
297	ldr	sp, FIQ_STACK_START
298	.endm
299
300/*
301 * exception handlers
302 */
303	.align  5
304undefined_instruction:
305	get_bad_stack
306	bad_save_user_regs
307	bl	do_undefined_instruction
308
309	.align	5
310software_interrupt:
311	get_bad_stack
312	bad_save_user_regs
313	bl	do_software_interrupt
314
315	.align	5
316prefetch_abort:
317	get_bad_stack
318	bad_save_user_regs
319	bl	do_prefetch_abort
320
321	.align	5
322data_abort:
323	get_bad_stack
324	bad_save_user_regs
325	bl	do_data_abort
326
327	.align	5
328not_used:
329	get_bad_stack
330	bad_save_user_regs
331	bl	do_not_used
332
333#ifdef CONFIG_USE_IRQ
334
335	.align	5
336irq:
337	get_irq_stack
338	irq_save_user_regs
339	bl	do_irq
340	irq_restore_user_regs
341
342	.align	5
343fiq:
344	get_fiq_stack
345	/* someone ought to write a more effiction fiq_save_user_regs */
346	irq_save_user_regs
347	bl	do_fiq
348	irq_restore_user_regs
349
350#else
351
352	.align	5
353irq:
354	get_bad_stack
355	bad_save_user_regs
356	bl	do_irq
357
358	.align	5
359fiq:
360	get_bad_stack
361	bad_save_user_regs
362	bl	do_fiq
363
364#endif
365
366# ifdef CONFIG_INTEGRATOR
367
368	/* Satisfied by general board level routine */
369
370#else
371
372	.align	5
373.globl reset_cpu
374reset_cpu:
375
376	ldr	r1, rstctl1	/* get clkm1 reset ctl */
377	mov	r3, #0x0
378	strh	r3, [r1]	/* clear it */
379	mov	r3, #0x8
380	strh	r3, [r1]	/* force dsp+arm reset */
381_loop_forever:
382	b	_loop_forever
383
384rstctl1:
385	.word	0xfffece10
386
387#endif	/* #ifdef CONFIG_INTEGRATOR */
388