SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So we picked thearea of the file that usually had a full license text and replaced itwith an appropriate SPDX-License-Identifier: entry. Since then, theLinux Kernel has adopted SPDX tags and they place it as the very firstline in a file (except where shebangs are used, then it's second line)and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibilityand in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declaredlicense in the tag as both the before and after are identical in tagcontents. There's also a few places where I found we did not have a tagand have introduced one.Signed-off-by: Tom Rini <trini@konsulko.com>
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x86: fsp: Consolidate Azalia header fileSo far there are two copies of Azalia struct defines with one inbaytrail and the other one in braswell. This consolidates thesetwo into one, put it in the
x86: fsp: Consolidate Azalia header fileSo far there are two copies of Azalia struct defines with one inbaytrail and the other one in braswell. This consolidates thesetwo into one, put it in the common place, and remove the prefixpch_ to these structs to make their names more generic.This also corrects reset_wait_timer from us to ms.Signed-off-by: Bin Meng <bmeng.cn@gmail.com>Reviewed-by: Stefan Roese <sr@denx.de>
x86: braswell: Add FSP configurationAdd FSP related configuration for Braswell.Signed-off-by: Bin Meng <bmeng.cn@gmail.com>Reviewed-by: Simon Glass <sjg@chromium.org>
x86: Add Intel Braswell SoC supportThis adds initial Intel Braswell SoC support. It uses Intel FSPto initialize the chipset.Similar to its predecessor BayTrail, there are some work to do toenab
x86: Add Intel Braswell SoC supportThis adds initial Intel Braswell SoC support. It uses Intel FSPto initialize the chipset.Similar to its predecessor BayTrail, there are some work to do toenable the legacy UART integrated in the Braswell SoC.Signed-off-by: Bin Meng <bmeng.cn@gmail.com>Reviewed-by: Simon Glass <sjg@chromium.org>