872f6801 | 29-Mar-2024 |
Andrew Halaney <ahalaney@redhat.com> |
scsi: ufs: cdns-pltfrm: Perform read back after writing HCLKDIV
[ Upstream commit b715c55daf598aac8fa339048e4ca8a0916b332e ]
Currently, HCLKDIV is written to and then completed with an mb().
mb()
scsi: ufs: cdns-pltfrm: Perform read back after writing HCLKDIV
[ Upstream commit b715c55daf598aac8fa339048e4ca8a0916b332e ]
Currently, HCLKDIV is written to and then completed with an mb().
mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here:
https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678
Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed.
Fixes: d90996dae8e4 ("scsi: ufs: Add UFS platform driver for Cadence UFS") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-6-181252004586@redhat.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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8e5ede83 | 29-Mar-2024 |
Andrew Halaney <ahalaney@redhat.com> |
scsi: ufs: qcom: Perform read back after writing CGC enable
[ Upstream commit d9488511b3ac7eb48a91bc5eded7027525525e03 ]
Currently, the CGC enable bit is written and then an mb() is used to ensure
scsi: ufs: qcom: Perform read back after writing CGC enable
[ Upstream commit d9488511b3ac7eb48a91bc5eded7027525525e03 ]
Currently, the CGC enable bit is written and then an mb() is used to ensure that completes before continuing.
mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here:
https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678
Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Can Guo <quic_cang@quicinc.com> Fixes: 81c0fc51b7a7 ("ufs-qcom: add support for Qualcomm Technologies Inc platforms") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-5-181252004586@redhat.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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d2741b23 | 29-Mar-2024 |
Andrew Halaney <ahalaney@redhat.com> |
scsi: ufs: qcom: Perform read back after writing unipro mode
[ Upstream commit 823150ecf04f958213cf3bf162187cd1a91c885c ]
Currently, the QUNIPRO_SEL bit is written to and then an mb() is used to en
scsi: ufs: qcom: Perform read back after writing unipro mode
[ Upstream commit 823150ecf04f958213cf3bf162187cd1a91c885c ]
Currently, the QUNIPRO_SEL bit is written to and then an mb() is used to ensure that completes before continuing.
mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here:
https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678
But, there's really no reason to even ensure completion before continuing. The only requirement here is that this write is ordered to this endpoint (which readl()/writel() guarantees already). For that reason the mb() can be dropped altogether without anything forcing completion.
Fixes: f06fcc7155dc ("scsi: ufs-qcom: add QUniPro hardware support and power optimizations") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-4-181252004586@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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32402b2a | 29-Mar-2024 |
Andrew Halaney <ahalaney@redhat.com> |
scsi: ufs: qcom: Perform read back after writing REG_UFS_SYS1CLK_1US
[ Upstream commit a862fafa263aea0f427d51aca6ff7fd9eeaaa8bd ]
Currently after writing to REG_UFS_SYS1CLK_1US a mb() is used to en
scsi: ufs: qcom: Perform read back after writing REG_UFS_SYS1CLK_1US
[ Upstream commit a862fafa263aea0f427d51aca6ff7fd9eeaaa8bd ]
Currently after writing to REG_UFS_SYS1CLK_1US a mb() is used to ensure that write has gone through to the device.
mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here:
https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678
Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed.
Fixes: f06fcc7155dc ("scsi: ufs-qcom: add QUniPro hardware support and power optimizations") Reviewed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-2-181252004586@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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8d8f671e | 08-Dec-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
scsi: ufs: qcom: Fix the return value when platform_get_resource_byname() fails
[ Upstream commit 3a747c5cf9b6c36649783b28d2ef8f9c92b16a0f ]
The return value should be -ENODEV indicating that the r
scsi: ufs: qcom: Fix the return value when platform_get_resource_byname() fails
[ Upstream commit 3a747c5cf9b6c36649783b28d2ef8f9c92b16a0f ]
The return value should be -ENODEV indicating that the resource is not provided in DT, not -ENOMEM. Fix it!
Fixes: c263b4ef737e ("scsi: ufs: core: mcq: Configure resource regions") Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231208065902.11006-4-manivannan.sadhasivam@linaro.org Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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a18e81d1 | 06-Aug-2023 |
Jeuk Kim <jeuk20.kim@samsung.com> |
scsi: ufs: ufs-pci: Add support for QEMU
To ensure that the PCI based QEMU UFS device properly works with Linux, register the device ID (0x0013) and vendor ID (0x1b36) of QEMU UFS device.
QEMU UFS
scsi: ufs: ufs-pci: Add support for QEMU
To ensure that the PCI based QEMU UFS device properly works with Linux, register the device ID (0x0013) and vendor ID (0x1b36) of QEMU UFS device.
QEMU UFS will enable testing of the UFS driver inside a virtual machine on systems without UFS host controller. It can also be used to preemptively implement and test new features before the real device is created.
The new QEMU UFS device can be found at:
https://lore.kernel.org/qemu-devel/20230727155239.GA979354@fedora
Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com> Link: https://lore.kernel.org/r/20230807013726epcms2p1c604cb8e98680aebebb7cc5ab2d580f5@epcms2p1 Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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01e74715 | 01-Aug-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
scsi: ufs: qcom: Make struct ufs_qcom_bw_table static const
ufs_qcom_bw_table is not modified anywhere. So make it static const so that it can be placed in read-only memory.
Reported-by: Bart Van A
scsi: ufs: qcom: Make struct ufs_qcom_bw_table static const
ufs_qcom_bw_table is not modified anywhere. So make it static const so that it can be placed in read-only memory.
Reported-by: Bart Van Assche <bvanassche@acm.org> Closes: https://lore.kernel.org/linux-scsi/43cd0057-c6d8-bc92-08f4-d767336d2cfe@acm.org/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230802040154.10652-1-manivannan.sadhasivam@linaro.org Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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21f04fb4 | 26-Jul-2023 |
Nitin Rawat <quic_nitirawa@quicinc.com> |
scsi: ufs: ufs-qcom: Check host controller state
Commit 52a518019ca1 ("scsi: ufs: core: Fix missing clk change notification on host reset") added UFS clock scaling notification to ufshcd_host_reset_
scsi: ufs: ufs-qcom: Check host controller state
Commit 52a518019ca1 ("scsi: ufs: core: Fix missing clk change notification on host reset") added UFS clock scaling notification to ufshcd_host_reset_and_restore(). This invokes hibern8 enter and exit on Qualcomm platform which fails because controller is in reset state.
Fix this by checking the Host controller state before sending hibern8 command.
__ufshcd_wl_resume() ufshcd_reset_and_restore() ufshcd_host_reset_and_restore() ufshcd_scale_clks() ufshcd_vops_clk_scale_notify() ufs_qcom_clk_scale_notify() ufshcd_uic_hibern8_enter()
Fixes: 52a518019ca1 ("scsi: ufs: core: Fix missing clk change notification on host reset") Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Link: https://lore.kernel.org/r/20230726134140.7180-3-quic_nitirawa@quicinc.com Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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8d8af294 | 27-Jul-2023 |
Bart Van Assche <bvanassche@acm.org> |
scsi: ufs: Fix kernel-doc headers
Fix the remaining kernel-doc warnings that are reported when building with W=2.
Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r
scsi: ufs: Fix kernel-doc headers
Fix the remaining kernel-doc warnings that are reported when building with W=2.
Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20230727194457.3152309-4-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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03ce80a1 | 31-Jul-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
scsi: ufs: qcom: Add support for scaling interconnects
Qcom SoCs require scaling the interconnect paths for proper working of the peripherals connected through interconnects. Even for accessing the
scsi: ufs: qcom: Add support for scaling interconnects
Qcom SoCs require scaling the interconnect paths for proper working of the peripherals connected through interconnects. Even for accessing the UFS controller, someone should setup the interconnect paths. So far, the bootloaders used to setup the interconnect paths before booting Linux as they need to access the UFS storage for things like fetching boot firmware. But with the advent of multi boot options, bootloader nowadays like in SA8540p SoC do not setup the interconnect paths at all.
So trying to configure UFS in the absence of the interconnect path configuration results in a boot crash.
To fix this issue, and also to dynamically scale the interconnects (UFS-DDR and CPU-UFS), interconnect API support is added to the Qcom UFS driver. With this support, the interconnect paths are scaled dynamically based on the gear configuration.
During the early stage of ufs_qcom_init(), ufs_qcom_icc_init() will setup the paths to max bandwidth to allow configuring the UFS registers. Touching the registers without configuring the icc paths would result in a crash. However, we don't really need to set max vote for the icc paths as any minimal vote would suffice. But the max value would allow initialization to be done faster. After init, the bandwidth will get updated using ufs_qcom_icc_update_bw() based on the gear and lane configuration.
The bandwidth values defined in ufs_qcom_bw_table struct are taken from Qcom downstream vendor devicetree source and are calculated as per the UFS3.1 Spec, Section 6.4.1, HS Gear Rates. So it is fixed across platforms.
Cc: Brian Masney <bmasney@redhat.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230731145020.41262-3-manivannan.sadhasivam@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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