1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	aliases {
14		ethernet0 = &gmac0;
15		ethernet1 = &gmac1;
16		i2c0 = &i2c0;
17		i2c2 = &i2c2;
18		i2c5 = &i2c5;
19		i2c6 = &i2c6;
20		mmc0 = &mmc0;
21		mmc1 = &mmc1;
22		serial0 = &uart0;
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	cpus {
30		timebase-frequency = <4000000>;
31	};
32
33	memory@40000000 {
34		device_type = "memory";
35		reg = <0x0 0x40000000 0x1 0x0>;
36	};
37
38	gpio-restart {
39		compatible = "gpio-restart";
40		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
41		priority = <224>;
42	};
43};
44
45&dvp_clk {
46	clock-frequency = <74250000>;
47};
48
49&gmac0_rgmii_rxin {
50	clock-frequency = <125000000>;
51};
52
53&gmac0_rmii_refin {
54	clock-frequency = <50000000>;
55};
56
57&gmac1_rgmii_rxin {
58	clock-frequency = <125000000>;
59};
60
61&gmac1_rmii_refin {
62	clock-frequency = <50000000>;
63};
64
65&hdmitx0_pixelclk {
66	clock-frequency = <297000000>;
67};
68
69&i2srx_bclk_ext {
70	clock-frequency = <12288000>;
71};
72
73&i2srx_lrck_ext {
74	clock-frequency = <192000>;
75};
76
77&i2stx_bclk_ext {
78	clock-frequency = <12288000>;
79};
80
81&i2stx_lrck_ext {
82	clock-frequency = <192000>;
83};
84
85&mclk_ext {
86	clock-frequency = <12288000>;
87};
88
89&osc {
90	clock-frequency = <24000000>;
91};
92
93&rtc_osc {
94	clock-frequency = <32768>;
95};
96
97&tdm_ext {
98	clock-frequency = <49152000>;
99};
100
101&gmac0 {
102	phy-handle = <&phy0>;
103	phy-mode = "rgmii-id";
104	status = "okay";
105
106	mdio {
107		#address-cells = <1>;
108		#size-cells = <0>;
109		compatible = "snps,dwmac-mdio";
110
111		phy0: ethernet-phy@0 {
112			reg = <0>;
113		};
114	};
115};
116
117&gmac1 {
118	phy-handle = <&phy1>;
119	phy-mode = "rgmii-id";
120	status = "okay";
121
122	mdio {
123		#address-cells = <1>;
124		#size-cells = <0>;
125		compatible = "snps,dwmac-mdio";
126
127		phy1: ethernet-phy@1 {
128			reg = <0>;
129		};
130	};
131};
132
133&i2c0 {
134	clock-frequency = <100000>;
135	i2c-sda-hold-time-ns = <300>;
136	i2c-sda-falling-time-ns = <510>;
137	i2c-scl-falling-time-ns = <510>;
138	pinctrl-names = "default";
139	pinctrl-0 = <&i2c0_pins>;
140	status = "okay";
141};
142
143&i2c2 {
144	clock-frequency = <100000>;
145	i2c-sda-hold-time-ns = <300>;
146	i2c-sda-falling-time-ns = <510>;
147	i2c-scl-falling-time-ns = <510>;
148	pinctrl-names = "default";
149	pinctrl-0 = <&i2c2_pins>;
150	status = "okay";
151};
152
153&i2c5 {
154	clock-frequency = <100000>;
155	i2c-sda-hold-time-ns = <300>;
156	i2c-sda-falling-time-ns = <510>;
157	i2c-scl-falling-time-ns = <510>;
158	pinctrl-names = "default";
159	pinctrl-0 = <&i2c5_pins>;
160	status = "okay";
161
162	axp15060: pmic@36 {
163		compatible = "x-powers,axp15060";
164		reg = <0x36>;
165		interrupt-controller;
166		#interrupt-cells = <1>;
167
168		regulators {
169			vcc_3v3: dcdc1 {
170				regulator-boot-on;
171				regulator-always-on;
172				regulator-min-microvolt = <3300000>;
173				regulator-max-microvolt = <3300000>;
174				regulator-name = "vcc_3v3";
175			};
176
177			vdd_cpu: dcdc2 {
178				regulator-always-on;
179				regulator-min-microvolt = <500000>;
180				regulator-max-microvolt = <1540000>;
181				regulator-name = "vdd-cpu";
182			};
183
184			emmc_vdd: aldo4 {
185				regulator-boot-on;
186				regulator-always-on;
187				regulator-min-microvolt = <1800000>;
188				regulator-max-microvolt = <1800000>;
189				regulator-name = "emmc_vdd";
190			};
191		};
192	};
193};
194
195&i2c6 {
196	clock-frequency = <100000>;
197	i2c-sda-hold-time-ns = <300>;
198	i2c-sda-falling-time-ns = <510>;
199	i2c-scl-falling-time-ns = <510>;
200	pinctrl-names = "default";
201	pinctrl-0 = <&i2c6_pins>;
202	status = "okay";
203};
204
205&mmc0 {
206	max-frequency = <100000000>;
207	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
208	assigned-clock-rates = <50000000>;
209	bus-width = <8>;
210	cap-mmc-highspeed;
211	mmc-ddr-1_8v;
212	mmc-hs200-1_8v;
213	non-removable;
214	cap-mmc-hw-reset;
215	post-power-on-delay-ms = <200>;
216	pinctrl-names = "default";
217	pinctrl-0 = <&mmc0_pins>;
218	vmmc-supply = <&vcc_3v3>;
219	vqmmc-supply = <&emmc_vdd>;
220	status = "okay";
221};
222
223&mmc1 {
224	max-frequency = <100000000>;
225	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
226	assigned-clock-rates = <50000000>;
227	bus-width = <4>;
228	no-sdio;
229	no-mmc;
230	broken-cd;
231	cap-sd-highspeed;
232	post-power-on-delay-ms = <200>;
233	pinctrl-names = "default";
234	pinctrl-0 = <&mmc1_pins>;
235	status = "okay";
236};
237
238&qspi {
239	#address-cells = <1>;
240	#size-cells = <0>;
241	status = "okay";
242
243	nor_flash: flash@0 {
244		compatible = "jedec,spi-nor";
245		reg = <0>;
246		cdns,read-delay = <5>;
247		spi-max-frequency = <12000000>;
248		cdns,tshsl-ns = <1>;
249		cdns,tsd2d-ns = <1>;
250		cdns,tchsh-ns = <1>;
251		cdns,tslch-ns = <1>;
252
253		partitions {
254			compatible = "fixed-partitions";
255			#address-cells = <1>;
256			#size-cells = <1>;
257
258			spl@0 {
259				reg = <0x0 0x80000>;
260			};
261			uboot-env@f0000 {
262				reg = <0xf0000 0x10000>;
263			};
264			uboot@100000 {
265				reg = <0x100000 0x400000>;
266			};
267			reserved-data@600000 {
268				reg = <0x600000 0xa00000>;
269			};
270		};
271	};
272};
273
274&spi0 {
275	pinctrl-names = "default";
276	pinctrl-0 = <&spi0_pins>;
277	status = "okay";
278
279	spi_dev0: spi@0 {
280		compatible = "rohm,dh2228fv";
281		reg = <0>;
282		spi-max-frequency = <10000000>;
283	};
284};
285
286&sysgpio {
287	i2c0_pins: i2c0-0 {
288		i2c-pins {
289			pinmux = <GPIOMUX(57, GPOUT_LOW,
290					      GPOEN_SYS_I2C0_CLK,
291					      GPI_SYS_I2C0_CLK)>,
292				 <GPIOMUX(58, GPOUT_LOW,
293					      GPOEN_SYS_I2C0_DATA,
294					      GPI_SYS_I2C0_DATA)>;
295			bias-disable; /* external pull-up */
296			input-enable;
297			input-schmitt-enable;
298		};
299	};
300
301	i2c2_pins: i2c2-0 {
302		i2c-pins {
303			pinmux = <GPIOMUX(3, GPOUT_LOW,
304					     GPOEN_SYS_I2C2_CLK,
305					     GPI_SYS_I2C2_CLK)>,
306				 <GPIOMUX(2, GPOUT_LOW,
307					     GPOEN_SYS_I2C2_DATA,
308					     GPI_SYS_I2C2_DATA)>;
309			bias-disable; /* external pull-up */
310			input-enable;
311			input-schmitt-enable;
312		};
313	};
314
315	i2c5_pins: i2c5-0 {
316		i2c-pins {
317			pinmux = <GPIOMUX(19, GPOUT_LOW,
318					      GPOEN_SYS_I2C5_CLK,
319					      GPI_SYS_I2C5_CLK)>,
320				 <GPIOMUX(20, GPOUT_LOW,
321					      GPOEN_SYS_I2C5_DATA,
322					      GPI_SYS_I2C5_DATA)>;
323			bias-disable; /* external pull-up */
324			input-enable;
325			input-schmitt-enable;
326		};
327	};
328
329	i2c6_pins: i2c6-0 {
330		i2c-pins {
331			pinmux = <GPIOMUX(16, GPOUT_LOW,
332					      GPOEN_SYS_I2C6_CLK,
333					      GPI_SYS_I2C6_CLK)>,
334				 <GPIOMUX(17, GPOUT_LOW,
335					      GPOEN_SYS_I2C6_DATA,
336					      GPI_SYS_I2C6_DATA)>;
337			bias-disable; /* external pull-up */
338			input-enable;
339			input-schmitt-enable;
340		};
341	};
342
343	mmc0_pins: mmc0-0 {
344		 rst-pins {
345			pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
346					      GPOEN_ENABLE,
347					      GPI_NONE)>;
348			bias-pull-up;
349			drive-strength = <12>;
350			input-disable;
351			input-schmitt-disable;
352			slew-rate = <0>;
353		};
354
355		mmc-pins {
356			pinmux = <PINMUX(64, 0)>,
357				 <PINMUX(65, 0)>,
358				 <PINMUX(66, 0)>,
359				 <PINMUX(67, 0)>,
360				 <PINMUX(68, 0)>,
361				 <PINMUX(69, 0)>,
362				 <PINMUX(70, 0)>,
363				 <PINMUX(71, 0)>,
364				 <PINMUX(72, 0)>,
365				 <PINMUX(73, 0)>;
366			bias-pull-up;
367			drive-strength = <12>;
368			input-enable;
369		};
370	};
371
372	mmc1_pins: mmc1-0 {
373		clk-pins {
374			pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
375					      GPOEN_ENABLE,
376					      GPI_NONE)>;
377			bias-pull-up;
378			drive-strength = <12>;
379			input-disable;
380			input-schmitt-disable;
381			slew-rate = <0>;
382		};
383
384		mmc-pins {
385			pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
386					     GPOEN_SYS_SDIO1_CMD,
387					     GPI_SYS_SDIO1_CMD)>,
388				 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
389					      GPOEN_SYS_SDIO1_DATA0,
390					      GPI_SYS_SDIO1_DATA0)>,
391				 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
392					      GPOEN_SYS_SDIO1_DATA1,
393					      GPI_SYS_SDIO1_DATA1)>,
394				 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
395					     GPOEN_SYS_SDIO1_DATA2,
396					     GPI_SYS_SDIO1_DATA2)>,
397				 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
398					     GPOEN_SYS_SDIO1_DATA3,
399					     GPI_SYS_SDIO1_DATA3)>;
400			bias-pull-up;
401			drive-strength = <12>;
402			input-enable;
403			input-schmitt-enable;
404			slew-rate = <0>;
405		};
406	};
407
408	spi0_pins: spi0-0 {
409		mosi-pins {
410			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
411					      GPOEN_ENABLE,
412					      GPI_NONE)>;
413			bias-disable;
414			input-disable;
415			input-schmitt-disable;
416		};
417
418		miso-pins {
419			pinmux = <GPIOMUX(53, GPOUT_LOW,
420					      GPOEN_DISABLE,
421					      GPI_SYS_SPI0_RXD)>;
422			bias-pull-up;
423			input-enable;
424			input-schmitt-enable;
425		};
426
427		sck-pins {
428			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
429					      GPOEN_ENABLE,
430					      GPI_SYS_SPI0_CLK)>;
431			bias-disable;
432			input-disable;
433			input-schmitt-disable;
434		};
435
436		ss-pins {
437			pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
438					      GPOEN_ENABLE,
439					      GPI_SYS_SPI0_FSS)>;
440			bias-disable;
441			input-disable;
442			input-schmitt-disable;
443		};
444	};
445
446	uart0_pins: uart0-0 {
447		tx-pins {
448			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
449					     GPOEN_ENABLE,
450					     GPI_NONE)>;
451			bias-disable;
452			drive-strength = <12>;
453			input-disable;
454			input-schmitt-disable;
455			slew-rate = <0>;
456		};
457
458		rx-pins {
459			pinmux = <GPIOMUX(6, GPOUT_LOW,
460					     GPOEN_DISABLE,
461					     GPI_SYS_UART0_RX)>;
462			bias-disable; /* external pull-up */
463			drive-strength = <2>;
464			input-enable;
465			input-schmitt-enable;
466			slew-rate = <0>;
467		};
468	};
469};
470
471&uart0 {
472	pinctrl-names = "default";
473	pinctrl-0 = <&uart0_pins>;
474	status = "okay";
475};
476
477&usb0 {
478	dr_mode = "peripheral";
479	status = "okay";
480};
481
482&U74_1 {
483	cpu-supply = <&vdd_cpu>;
484};
485
486&U74_2 {
487	cpu-supply = <&vdd_cpu>;
488};
489
490&U74_3 {
491	cpu-supply = <&vdd_cpu>;
492};
493
494&U74_4 {
495	cpu-supply = <&vdd_cpu>;
496};
497