SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel styleWhen U-Boot started using SPDX tags we were among the early adopters andthere weren't a lot of other examples to borrow from. So we picked thearea of the file that usually had a full license text and replaced itwith an appropriate SPDX-License-Identifier: entry. Since then, theLinux Kernel has adopted SPDX tags and they place it as the very firstline in a file (except where shebangs are used, then it's second line)and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibilityand in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declaredlicense in the tag as both the before and after are identical in tagcontents. There's also a few places where I found we did not have a tagand have introduced one.Signed-off-by: Tom Rini <trini@konsulko.com>
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xtensa: clean up CONFIG_SYS_TEXT_ADDRDrop CONFIG_SYS_MEMORY_TOP. Rename CONFIG_SYS_TEXT_ADDR toXTENSA_SYS_TEXT_ADDR.Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
board_f: Rename initdram() to dram_init()This allows us to use the same DRAM init function on all archs. Add adummy function for arc, which does not use DRAM init here.Signed-off-by: Simon Glass
board_f: Rename initdram() to dram_init()This allows us to use the same DRAM init function on all archs. Add adummy function for arc, which does not use DRAM init here.Signed-off-by: Simon Glass <sjg@chromium.org>[trini: Dummy function on nios2]Signed-off-by: Tom Rini <trini@konsulko.com>
xtensa: add support for the xtensa processor architecture [2/2]The Xtensa processor architecture is a configurable, extensible,and synthesizable 32-bit RISC processor core provided by Tensilica, i
xtensa: add support for the xtensa processor architecture [2/2]The Xtensa processor architecture is a configurable, extensible,and synthesizable 32-bit RISC processor core provided by Tensilica, inc.This is the second part of the basic architecture port, adding the'arch/xtensa' directory and a readme file.Signed-off-by: Chris Zankel <chris@zankel.net>Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Reviewed-by: Simon Glass <sjg@chromium.org>Reviewed-by: Tom Rini <trini@konsulko.com>