| 8a8af8a2 | 29-Dec-2017 |
Lokesh Vutla <lokeshvutla@ti.com> |
cmd: ti: Generalize cmd_ddr3 command
Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be r
cmd: ti: Generalize cmd_ddr3 command
Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7 platforms.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
show more ...
|
| 4849d954 | 28-Dec-2017 |
Rex Chang <rchang@ti.com> |
board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EV
board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.
The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.
Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.
Modified findfdt script in u-boot environment variable to include new k2g board type.
Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
show more ...
|
| 94f536fc | 17-Jul-2017 |
Srinivas, Madan <madans@ti.com> |
arm: mach-keystone: Fixes issue with return values in inline assembly
The inline assembly functions in mon.c assume that the caller will
check for the return value in r0 according to regular ARM cal
arm: mach-keystone: Fixes issue with return values in inline assembly
The inline assembly functions in mon.c assume that the caller will
check for the return value in r0 according to regular ARM calling
conventions.
However, this assumption breaks down if the compiler inlines the
functions. The caller is then under no obligation to use r0 for the
result.
To fix this disconnect, we must explicitly move the return value
from the smc/bl call to the variable that the function returns.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| e5e546aa | 16-Jun-2017 |
Cooper Jr., Franklin <fcooper@ti.com> |
ARM: k2g: Program DDRPHY_DATX8 registers via mask and value variables
Different K2G evms may need to program the various
KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use
the mas
ARM: k2g: Program DDRPHY_DATX8 registers via mask and value variables
Different K2G evms may need to program the various
KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use
the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to
properly program the register.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| a76a6f3e | 16-Jun-2017 |
Cooper Jr., Franklin <fcooper@ti.com> |
ARM: k2g: Program DDR PHY MR2 register with the default value
K2G GP doesn't require the MR2 register to be programed since the
default is good enough. However, newer K2G boards do need to change
th
ARM: k2g: Program DDR PHY MR2 register with the default value
K2G GP doesn't require the MR2 register to be programed since the
default is good enough. However, newer K2G boards do need to change
this register value. Therefore, instead of not writing this register if
ran on a K2G board just program the value to be written to match the
default/reset value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| ee3c6532 | 03-May-2017 |
Lokesh Vutla <lokeshvutla@ti.com> |
ARM: keystone2: Add support for getting external clock dynamically
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver a
ARM: keystone2: Add support for getting external clock dynamically
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|