#
090386db |
| 30-Jul-2024 |
Chen-Yu Tsai <wenst@chromium.org> |
arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled
commit 09d385679487c58f0859c1ad4f404ba3df2f8830 upstream.
USB 3.0 on xhci1 is not used, as the controller shares the same PHY
arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled
commit 09d385679487c58f0859c1ad4f404ba3df2f8830 upstream.
USB 3.0 on xhci1 is not used, as the controller shares the same PHY as pcie1. The latter is enabled to support the M.2 PCIe WLAN card on this design.
Mark USB 3.0 as disabled on this controller using the "mediatek,u3p-dis-msk" property.
Reported-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> #KernelCI Closes: https://lore.kernel.org/all/9fce9838-ef87-4d1b-b3df-63e1ddb0ec51@notapiano/ Fixes: b6267a396e1c ("arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers") Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20240731034411.371178-2-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a594104d |
| 15-Mar-2024 |
Pin-yen Lin <treapking@chromium.org> |
arm64: dts: mediatek: mt8195-cherry: Update min voltage constraint for MT6315
[ Upstream commit e9a6b8b5c61350535c7eb5ea9b2dde0d5745bd1b ]
Update the minimum voltage from 300000 uV to 400000 uV so
arm64: dts: mediatek: mt8195-cherry: Update min voltage constraint for MT6315
[ Upstream commit e9a6b8b5c61350535c7eb5ea9b2dde0d5745bd1b ]
Update the minimum voltage from 300000 uV to 400000 uV so it matches the MT6315 datasheet.
Also update the minimum voltage for Vgpu regulator from 625000 uV to 400000 uV because the requested voltage could be lower than the minimum voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS) driver is enabled.
Fixes: 260c04d425eb ("arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus") Signed-off-by: Pin-yen Lin <treapking@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240315111621.2263159-3-treapking@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
0c29f85a |
| 10-Jan-2024 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: cherry: Describe CPU supplies
[ Upstream commit 17b33dd9e4a38fbaca87c68e532b52f9d0492ba7 ]
Describe in each CPU node the regulator supplying it.
Fixes: 260c04d425eb ("arm64:
arm64: dts: mediatek: cherry: Describe CPU supplies
[ Upstream commit 17b33dd9e4a38fbaca87c68e532b52f9d0492ba7 ]
Describe in each CPU node the regulator supplying it.
Fixes: 260c04d425eb ("arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240110142305.755367-2-nfraprado@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
a61f1a57 |
| 24-Apr-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add platform thermal configuration
[ Upstream commit 729f30eac8bce6783f889cf8390ea869d03407e6 ]
This platform has three auxiliary NTC thermistors, connected to the SoC
arm64: dts: mediatek: cherry: Add platform thermal configuration
[ Upstream commit 729f30eac8bce6783f889cf8390ea869d03407e6 ]
This platform has three auxiliary NTC thermistors, connected to the SoC's ADC pins. Enable the auxadc in order to be able to read the ADC values, add a generic-adc-thermal LUT for each and finally assign them to the SoC's thermal zones.
Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230424112523.1436926-2-angelogioacchino.delregno@collabora.com Stable-dep-of: 17b33dd9e4a3 ("arm64: dts: mediatek: cherry: Describe CPU supplies") Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
ac9a2f55 |
| 27-Nov-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Fix interrupt cells for MT6360 on I2C7
commit 5943b8f7449df9881b273db07bdde1e7120dccf0 upstream.
Change interrupt cells to 2 to suppress interrupts_property warning.
arm64: dts: mediatek: cherry: Fix interrupt cells for MT6360 on I2C7
commit 5943b8f7449df9881b273db07bdde1e7120dccf0 upstream.
Change interrupt cells to 2 to suppress interrupts_property warning.
Cc: stable@vger.kernel.org Fixes: 0de0fe950f1b ("arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7") Link: https://lore.kernel.org/r/20231127132026.165027-1-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
ea6c5f21 |
| 15-May-2023 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: mediatek: mt8195: Add mediatek,broken-save-restore-fw to cherry
Firmware shipped on mt8195 Chromebooks is affected by the GICR save/restore issue as described by the patch ("dt-bindings:
arm64: dts: mediatek: mt8195: Add mediatek,broken-save-restore-fw to cherry
Firmware shipped on mt8195 Chromebooks is affected by the GICR save/restore issue as described by the patch ("dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW"). Add the quirk property.
Fixes: 5eb2e303ec6b ("arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato") Reviewed-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230515131353.v2.5.Ia0b6ebbaa351e3cd67e201355b9ae67783c7d718@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
58d7dae8 |
| 24-Apr-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi
On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi
On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports to enable enumerating this chip.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230424112523.1436926-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
ee508454 |
| 23-Feb-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add configuration for display backlight
Configure the hardware PWM for the integrated display's backlight: all Cherry devices enable the backlight with GPIO82 and manag
arm64: dts: mediatek: cherry: Add configuration for display backlight
Configure the hardware PWM for the integrated display's backlight: all Cherry devices enable the backlight with GPIO82 and manage the PWM via MediaTek disp-pwm on GPIO97.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230223145426.193590-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
673f8b60 |
| 01-Mar-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU
Enable the Mali-G57 found on this platform with the open-source Panfrost driver.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino
arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU
Enable the Mali-G57 found on this platform with the open-source Panfrost driver.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230301095523.428461-17-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
6d886dd4 |
| 22-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add sound card configuration
Configure the sound card on all MT8195 Cherry Tomato devices to enable audio support.
Signed-off-by: AngeloGioacchino Del Regno <angelogio
arm64: dts: mediatek: cherry: Add sound card configuration
Configure the sound card on all MT8195 Cherry Tomato devices to enable audio support.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922094908.41623-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
4b4e0508 |
| 22-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add external codecs and speaker amplifier
The entire Cherry family has two digital microphones, for which we use the generic dmic-codec, linked to the MT6359 PMIC. More
arm64: dts: mediatek: cherry: Add external codecs and speaker amplifier
The entire Cherry family has two digital microphones, for which we use the generic dmic-codec, linked to the MT6359 PMIC. Moreover, it uses a Realtek RT1019p amplifier for the speakers and has either a Realtek RT5682i or RT5682s audio codec on I2C2: specifically, RT5682i is found on Tomato's rev 1 and rev 2 boards, while RT5682s is found in rev3 and rev4 boards.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922094908.41623-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
b26de6b6 |
| 22-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable the Audio DSP for SOF
This platform is able to use the Audio DSP embedded into the MT8195 SoC: in preparation for adding audio support for Cherry, add the ADSP r
arm64: dts: mediatek: cherry: Enable the Audio DSP for SOF
This platform is able to use the Audio DSP embedded into the MT8195 SoC: in preparation for adding audio support for Cherry, add the ADSP related memory nodes and enable it.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922094908.41623-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
84af4359 |
| 22-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add Audio Front End (AFE) support
In preparation for adding audio support, enable the AFE HW with the appropriate eTDM configuration and memory region.
Signed-off-by:
arm64: dts: mediatek: cherry: Add Audio Front End (AFE) support
In preparation for adding audio support, enable the AFE HW with the appropriate eTDM configuration and memory region.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922094908.41623-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
957d4ac7 |
| 10-Nov-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
arm64: dts: mediatek: cherry: Add edptx and dptx support
In cherry projects, we use edptx as the internal display interface and use dptx as the external display interface. To support this, we need t
arm64: dts: mediatek: cherry: Add edptx and dptx support
In cherry projects, we use edptx as the internal display interface and use dptx as the external display interface. To support this, we need to add more properties.
- Add pinctrls for edptx and dptx. - Add ports for edptx and dptx.
The port connections for the internal and external display: dp-intf0 -> edptx -> panel dp-intf1 -> dptx
The edptx endpoint is kept empty for now, as the panel addition will come in a later commit.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-5-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
b1bf5570 |
| 10-Nov-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
arm64: dts: mediatek: cherry: Add dp-intf ports
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 ports.
Signed-off-by: Bo-Chen Chen
arm64: dts: mediatek: cherry: Add dp-intf ports
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 ports.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-4-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
260c04d4 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus
All machines in the Cherry platform use MT6315 over SPMI: add the two instances, providing Vbcpu and Vgpu regulators.
Signed-off-b
arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus
All machines in the Cherry platform use MT6315 over SPMI: add the two instances, providing Vbcpu and Vgpu regulators.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
b53f3724 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpad
The Cherry platform uses an Elantech touchpad/trackpad: enable probing it at address 0x15 on I2C1.
Signed-off-by: AngeloGioacchin
arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpad
The Cherry platform uses an Elantech touchpad/trackpad: enable probing it at address 0x15 on I2C1.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
07984e82 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller
As of now, all of the boards based on the cherry platform have a usable secondary SD/MMC controller, usually for SD cards: enable it
arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller
As of now, all of the boards based on the cherry platform have a usable secondary SD/MMC controller, usually for SD cards: enable it to allow both booting from it and generally accessing external storage.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
824fae69 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add keyboard mapping for the top row
Chromebooks' embedded keyboards differ from standard layouts for the top row, as this one doesn't have the standard function keys b
arm64: dts: mediatek: cherry: Add keyboard mapping for the top row
Chromebooks' embedded keyboards differ from standard layouts for the top row, as this one doesn't have the standard function keys but shortcuts instead: map these keys to achieve the functionality that is pictured on the printouts.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220902081156.38526-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
63ce81b2 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPM
Add support for the Cr50 Google Security Chip (GSC) found on this platform on I2C3 to support TPM and to also use it as an entropy so
arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPM
Add support for the Cr50 Google Security Chip (GSC) found on this platform on I2C3 to support TPM and to also use it as an entropy source for the kernel.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
e775cc1a |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded Controller
Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered func
arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded Controller
Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered functionality, including Keyboard, Smart Battery Metrics (SBS), keyboard backlight, I2C tunnel, regulators and Type-C connector management.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
d86a1c69 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable the System Companion Processor
MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA
arm64: dts: mediatek: cherry: Enable the System Companion Processor
MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA pool and enable the node.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
10d4a706 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board mod
arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board model. Add the node for a touchscreen at 0x10, but enable it only in the final board dts.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-12-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
c34bc660 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform.
Signed-
arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-11-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
0de0fe95 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regul
arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regulators yet, as these will be added in a later commit.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-10-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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