1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include "mt8195.dtsi" 8#include "mt6359.dtsi" 9 10/ { 11 aliases { 12 i2c0 = &i2c0; 13 i2c1 = &i2c1; 14 i2c2 = &i2c2; 15 i2c3 = &i2c3; 16 i2c4 = &i2c4; 17 i2c5 = &i2c5; 18 i2c7 = &i2c7; 19 mmc0 = &mmc0; 20 mmc1 = &mmc1; 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0 0x40000000 0 0x80000000>; 31 }; 32 33 /* system wide LDO 3.3V power rail */ 34 pp3300_z5: regulator-pp3300-ldo-z5 { 35 compatible = "regulator-fixed"; 36 regulator-name = "pp3300_ldo_z5"; 37 regulator-always-on; 38 regulator-boot-on; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 vin-supply = <&ppvar_sys>; 42 }; 43 44 /* separately switched 3.3V power rail */ 45 pp3300_s3: regulator-pp3300-s3 { 46 compatible = "regulator-fixed"; 47 regulator-name = "pp3300_s3"; 48 /* automatically sequenced by PMIC EXT_PMIC_EN2 */ 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <3300000>; 52 regulator-max-microvolt = <3300000>; 53 vin-supply = <&pp3300_z2>; 54 }; 55 56 /* system wide 3.3V power rail */ 57 pp3300_z2: regulator-pp3300-z2 { 58 compatible = "regulator-fixed"; 59 regulator-name = "pp3300_z2"; 60 /* EN pin tied to pp4200_z2, which is controlled by EC */ 61 regulator-always-on; 62 regulator-boot-on; 63 regulator-min-microvolt = <3300000>; 64 regulator-max-microvolt = <3300000>; 65 vin-supply = <&ppvar_sys>; 66 }; 67 68 /* system wide 4.2V power rail */ 69 pp4200_z2: regulator-pp4200-z2 { 70 compatible = "regulator-fixed"; 71 regulator-name = "pp4200_z2"; 72 /* controlled by EC */ 73 regulator-always-on; 74 regulator-boot-on; 75 regulator-min-microvolt = <4200000>; 76 regulator-max-microvolt = <4200000>; 77 vin-supply = <&ppvar_sys>; 78 }; 79 80 /* system wide switching 5.0V power rail */ 81 pp5000_s5: regulator-pp5000-s5 { 82 compatible = "regulator-fixed"; 83 regulator-name = "pp5000_s5"; 84 /* controlled by EC */ 85 regulator-always-on; 86 regulator-boot-on; 87 regulator-min-microvolt = <5000000>; 88 regulator-max-microvolt = <5000000>; 89 vin-supply = <&ppvar_sys>; 90 }; 91 92 /* system wide semi-regulated power rail from battery or USB */ 93 ppvar_sys: regulator-ppvar-sys { 94 compatible = "regulator-fixed"; 95 regulator-name = "ppvar_sys"; 96 regulator-always-on; 97 regulator-boot-on; 98 }; 99 100 usb_vbus: regulator-5v0-usb-vbus { 101 compatible = "regulator-fixed"; 102 regulator-name = "usb-vbus"; 103 regulator-min-microvolt = <5000000>; 104 regulator-max-microvolt = <5000000>; 105 enable-active-high; 106 regulator-always-on; 107 }; 108 109 reserved_memory: reserved-memory { 110 #address-cells = <2>; 111 #size-cells = <2>; 112 ranges; 113 114 scp_mem: memory@50000000 { 115 compatible = "shared-dma-pool"; 116 reg = <0 0x50000000 0 0x2900000>; 117 no-map; 118 }; 119 }; 120}; 121 122&i2c0 { 123 status = "okay"; 124 125 clock-frequency = <400000>; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&i2c0_pins>; 128}; 129 130&i2c1 { 131 status = "okay"; 132 133 clock-frequency = <400000>; 134 i2c-scl-internal-delay-ns = <12500>; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&i2c1_pins>; 137 138 trackpad@15 { 139 compatible = "elan,ekth3000"; 140 reg = <0x15>; 141 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&trackpad_pins>; 144 vcc-supply = <&pp3300_s3>; 145 wakeup-source; 146 }; 147}; 148 149&i2c2 { 150 status = "okay"; 151 152 clock-frequency = <400000>; 153 pinctrl-names = "default"; 154 pinctrl-0 = <&i2c2_pins>; 155}; 156 157&i2c3 { 158 status = "okay"; 159 160 clock-frequency = <400000>; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&i2c3_pins>; 163 164 tpm@50 { 165 compatible = "google,cr50"; 166 reg = <0x50>; 167 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>; 168 pinctrl-names = "default"; 169 pinctrl-0 = <&cr50_int>; 170 }; 171}; 172 173&i2c4 { 174 status = "okay"; 175 176 clock-frequency = <400000>; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&i2c4_pins>; 179 180 ts_10: touchscreen@10 { 181 compatible = "hid-over-i2c"; 182 reg = <0x10>; 183 hid-descr-addr = <0x0001>; 184 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&touchscreen_pins>; 187 post-power-on-delay-ms = <10>; 188 vdd-supply = <&pp3300_s3>; 189 status = "disabled"; 190 }; 191}; 192 193&i2c5 { 194 status = "okay"; 195 196 clock-frequency = <400000>; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&i2c5_pins>; 199}; 200 201&i2c7 { 202 status = "okay"; 203 204 clock-frequency = <400000>; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&i2c7_pins>; 207 208 pmic@34 { 209 #interrupt-cells = <1>; 210 compatible = "mediatek,mt6360"; 211 reg = <0x34>; 212 interrupt-controller; 213 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>; 214 interrupt-names = "IRQB"; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&subpmic_default>; 217 wakeup-source; 218 }; 219}; 220 221&mmc0 { 222 status = "okay"; 223 224 bus-width = <8>; 225 cap-mmc-highspeed; 226 cap-mmc-hw-reset; 227 hs400-ds-delay = <0x14c11>; 228 max-frequency = <200000000>; 229 mmc-hs200-1_8v; 230 mmc-hs400-1_8v; 231 no-sdio; 232 no-sd; 233 non-removable; 234 pinctrl-names = "default", "state_uhs"; 235 pinctrl-0 = <&mmc0_pins_default>; 236 pinctrl-1 = <&mmc0_pins_uhs>; 237 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 238 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 239}; 240 241&mmc1 { 242 status = "okay"; 243 244 bus-width = <4>; 245 cap-sd-highspeed; 246 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 247 max-frequency = <200000000>; 248 no-mmc; 249 no-sdio; 250 pinctrl-names = "default", "state_uhs"; 251 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>; 252 pinctrl-1 = <&mmc1_pins_default>; 253 sd-uhs-sdr50; 254 sd-uhs-sdr104; 255 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 256 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 257}; 258 259/* for CPU-L */ 260&mt6359_vcore_buck_reg { 261 regulator-always-on; 262}; 263 264/* for CORE */ 265&mt6359_vgpu11_buck_reg { 266 regulator-always-on; 267}; 268 269&mt6359_vgpu11_sshub_buck_reg { 270 regulator-always-on; 271 regulator-min-microvolt = <550000>; 272 regulator-max-microvolt = <550000>; 273}; 274 275/* for CORE SRAM */ 276&mt6359_vpu_buck_reg { 277 regulator-always-on; 278}; 279 280&mt6359_vrf12_ldo_reg { 281 regulator-always-on; 282}; 283 284/* for GPU SRAM */ 285&mt6359_vsram_others_ldo_reg { 286 regulator-always-on; 287 regulator-min-microvolt = <750000>; 288 regulator-max-microvolt = <750000>; 289}; 290 291&mt6359_vufs_ldo_reg { 292 regulator-always-on; 293}; 294 295&nor_flash { 296 status = "okay"; 297 298 pinctrl-names = "default"; 299 pinctrl-0 = <&nor_pins_default>; 300 301 flash@0 { 302 compatible = "jedec,spi-nor"; 303 reg = <0>; 304 spi-max-frequency = <52000000>; 305 spi-rx-bus-width = <2>; 306 spi-tx-bus-width = <2>; 307 }; 308}; 309 310&pio { 311 mediatek,rsel-resistance-in-si-unit; 312 pinctrl-names = "default"; 313 pinctrl-0 = <&pio_default>; 314 315 /* 144 lines */ 316 gpio-line-names = 317 "I2S_SPKR_MCLK", 318 "I2S_SPKR_DATAIN", 319 "I2S_SPKR_LRCK", 320 "I2S_SPKR_BCLK", 321 "EC_AP_INT_ODL", 322 /* 323 * AP_FLASH_WP_L is crossystem ABI. Schematics 324 * call it AP_FLASH_WP_ODL. 325 */ 326 "AP_FLASH_WP_L", 327 "TCHPAD_INT_ODL", 328 "EDP_HPD_1V8", 329 "AP_I2C_CAM_SDA", 330 "AP_I2C_CAM_SCL", 331 "AP_I2C_TCHPAD_SDA_1V8", 332 "AP_I2C_TCHPAD_SCL_1V8", 333 "AP_I2C_AUD_SDA", 334 "AP_I2C_AUD_SCL", 335 "AP_I2C_TPM_SDA_1V8", 336 "AP_I2C_TPM_SCL_1V8", 337 "AP_I2C_TCHSCR_SDA_1V8", 338 "AP_I2C_TCHSCR_SCL_1V8", 339 "EC_AP_HPD_OD", 340 "", 341 "PCIE_NVME_RST_L", 342 "PCIE_NVME_CLKREQ_ODL", 343 "PCIE_RST_1V8_L", 344 "PCIE_CLKREQ_1V8_ODL", 345 "PCIE_WAKE_1V8_ODL", 346 "CLK_24M_CAM0", 347 "CAM1_SEN_EN", 348 "AP_I2C_PWR_SCL_1V8", 349 "AP_I2C_PWR_SDA_1V8", 350 "AP_I2C_MISC_SCL", 351 "AP_I2C_MISC_SDA", 352 "EN_PP5000_HDMI_X", 353 "AP_HDMITX_HTPLG", 354 "", 355 "AP_HDMITX_SCL_1V8", 356 "AP_HDMITX_SDA_1V8", 357 "AP_RTC_CLK32K", 358 "AP_EC_WATCHDOG_L", 359 "SRCLKENA0", 360 "SRCLKENA1", 361 "PWRAP_SPI0_CS_L", 362 "PWRAP_SPI0_CK", 363 "PWRAP_SPI0_MOSI", 364 "PWRAP_SPI0_MISO", 365 "SPMI_SCL", 366 "SPMI_SDA", 367 "", 368 "", 369 "", 370 "I2S_HP_DATAIN", 371 "I2S_HP_MCLK", 372 "I2S_HP_BCK", 373 "I2S_HP_LRCK", 374 "I2S_HP_DATAOUT", 375 "SD_CD_ODL", 376 "EN_PP3300_DISP_X", 377 "TCHSCR_RST_1V8_L", 378 "TCHSCR_REPORT_DISABLE", 379 "EN_PP3300_WLAN_X", 380 "BT_KILL_1V8_L", 381 "I2S_SPKR_DATAOUT", 382 "WIFI_KILL_1V8_L", 383 "BEEP_ON", 384 "SCP_I2C_SENSOR_SCL_1V8", 385 "SCP_I2C_SENSOR_SDA_1V8", 386 "", 387 "", 388 "", 389 "", 390 "AUD_CLK_MOSI", 391 "AUD_SYNC_MOSI", 392 "AUD_DAT_MOSI0", 393 "AUD_DAT_MOSI1", 394 "AUD_DAT_MISO0", 395 "AUD_DAT_MISO1", 396 "AUD_DAT_MISO2", 397 "SCP_VREQ_VAO", 398 "AP_SPI_GSC_TPM_CLK", 399 "AP_SPI_GSC_TPM_MOSI", 400 "AP_SPI_GSC_TPM_CS_L", 401 "AP_SPI_GSC_TPM_MISO", 402 "EN_PP1000_CAM_X", 403 "AP_EDP_BKLTEN", 404 "", 405 "USB3_HUB_RST_L", 406 "", 407 "WLAN_ALERT_ODL", 408 "EC_IN_RW_ODL", 409 "GSC_AP_INT_ODL", 410 "HP_INT_ODL", 411 "CAM0_RST_L", 412 "CAM1_RST_L", 413 "TCHSCR_INT_1V8_L", 414 "CAM1_DET_L", 415 "RST_ALC1011_L", 416 "", 417 "", 418 "BL_PWM_1V8", 419 "UART_AP_TX_DBG_RX", 420 "UART_DBG_TX_AP_RX", 421 "EN_SPKR", 422 "AP_EC_WARM_RST_REQ", 423 "UART_SCP_TX_DBGCON_RX", 424 "UART_DBGCON_TX_SCP_RX", 425 "", 426 "", 427 "KPCOL0", 428 "", 429 "MT6315_GPU_INT", 430 "MT6315_PROC_BC_INT", 431 "SD_CMD", 432 "SD_CLK", 433 "SD_DAT0", 434 "SD_DAT1", 435 "SD_DAT2", 436 "SD_DAT3", 437 "EMMC_DAT7", 438 "EMMC_DAT6", 439 "EMMC_DAT5", 440 "EMMC_DAT4", 441 "EMMC_RSTB", 442 "EMMC_CMD", 443 "EMMC_CLK", 444 "EMMC_DAT3", 445 "EMMC_DAT2", 446 "EMMC_DAT1", 447 "EMMC_DAT0", 448 "EMMC_DSL", 449 "", 450 "", 451 "MT6360_INT_ODL", 452 "SCP_JTAG0_TRSTN", 453 "AP_SPI_EC_CS_L", 454 "AP_SPI_EC_CLK", 455 "AP_SPI_EC_MOSI", 456 "AP_SPI_EC_MISO", 457 "SCP_JTAG0_TMS", 458 "SCP_JTAG0_TCK", 459 "SCP_JTAG0_TDO", 460 "SCP_JTAG0_TDI", 461 "AP_SPI_FLASH_CS_L", 462 "AP_SPI_FLASH_CLK", 463 "AP_SPI_FLASH_MOSI", 464 "AP_SPI_FLASH_MISO"; 465 466 cr50_int: cr50-irq-default-pins { 467 pins-gsc-ap-int-odl { 468 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>; 469 input-enable; 470 }; 471 }; 472 473 cros_ec_int: cros-ec-irq-default-pins { 474 pins-ec-ap-int-odl { 475 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>; 476 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 477 input-enable; 478 }; 479 }; 480 481 i2c0_pins: i2c0-default-pins { 482 pins-bus { 483 pinmux = <PINMUX_GPIO8__FUNC_SDA0>, 484 <PINMUX_GPIO9__FUNC_SCL0>; 485 bias-disable; 486 drive-strength-microamp = <1000>; 487 }; 488 }; 489 490 i2c1_pins: i2c1-default-pins { 491 pins-bus { 492 pinmux = <PINMUX_GPIO10__FUNC_SDA1>, 493 <PINMUX_GPIO11__FUNC_SCL1>; 494 bias-pull-up = <1000>; 495 drive-strength-microamp = <1000>; 496 }; 497 }; 498 499 i2c2_pins: i2c2-default-pins { 500 pins-bus { 501 pinmux = <PINMUX_GPIO12__FUNC_SDA2>, 502 <PINMUX_GPIO13__FUNC_SCL2>; 503 bias-disable; 504 drive-strength-microamp = <1000>; 505 }; 506 }; 507 508 i2c3_pins: i2c3-default-pins { 509 pins-bus { 510 pinmux = <PINMUX_GPIO14__FUNC_SDA3>, 511 <PINMUX_GPIO15__FUNC_SCL3>; 512 bias-pull-up = <1000>; 513 drive-strength-microamp = <1000>; 514 }; 515 }; 516 517 i2c4_pins: i2c4-default-pins { 518 pins-bus { 519 pinmux = <PINMUX_GPIO16__FUNC_SDA4>, 520 <PINMUX_GPIO17__FUNC_SCL4>; 521 bias-pull-up = <1000>; 522 drive-strength = <4>; 523 }; 524 }; 525 526 i2c5_pins: i2c5-default-pins { 527 pins-bus { 528 pinmux = <PINMUX_GPIO29__FUNC_SCL5>, 529 <PINMUX_GPIO30__FUNC_SDA5>; 530 bias-disable; 531 drive-strength-microamp = <1000>; 532 }; 533 }; 534 535 i2c7_pins: i2c7-default-pins { 536 pins-bus { 537 pinmux = <PINMUX_GPIO27__FUNC_SCL7>, 538 <PINMUX_GPIO28__FUNC_SDA7>; 539 bias-disable; 540 }; 541 }; 542 543 mmc0_pins_default: mmc0-default-pins { 544 pins-cmd-dat { 545 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 546 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 547 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 548 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 549 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 550 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 551 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 552 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 553 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 554 input-enable; 555 drive-strength = <6>; 556 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 557 }; 558 559 pins-clk { 560 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 561 drive-strength = <6>; 562 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 563 }; 564 565 pins-rst { 566 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 567 drive-strength = <6>; 568 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 569 }; 570 }; 571 572 mmc0_pins_uhs: mmc0-uhs-pins { 573 pins-cmd-dat { 574 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 575 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 576 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 577 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 578 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 579 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 580 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 581 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 582 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 583 input-enable; 584 drive-strength = <8>; 585 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 586 }; 587 588 pins-clk { 589 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 590 drive-strength = <8>; 591 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 592 }; 593 594 pins-ds { 595 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>; 596 drive-strength = <8>; 597 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 598 }; 599 600 pins-rst { 601 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 602 drive-strength = <8>; 603 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 604 }; 605 }; 606 607 mmc1_pins_detect: mmc1-detect-pins { 608 pins-insert { 609 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>; 610 bias-pull-up; 611 }; 612 }; 613 614 mmc1_pins_default: mmc1-default-pins { 615 pins-cmd-dat { 616 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>, 617 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>, 618 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>, 619 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>, 620 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>; 621 input-enable; 622 drive-strength = <8>; 623 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 624 }; 625 626 pins-clk { 627 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>; 628 drive-strength = <8>; 629 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 630 }; 631 }; 632 633 nor_pins_default: nor-default-pins { 634 pins-ck-io { 635 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>, 636 <PINMUX_GPIO141__FUNC_SPINOR_CK>, 637 <PINMUX_GPIO143__FUNC_SPINOR_IO1>; 638 drive-strength = <6>; 639 bias-pull-down; 640 }; 641 642 pins-cs { 643 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>; 644 drive-strength = <6>; 645 bias-pull-up; 646 }; 647 }; 648 649 pio_default: pio-default-pins { 650 pins-wifi-enable { 651 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>; 652 output-high; 653 drive-strength = <14>; 654 }; 655 656 pins-low-power-pd { 657 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>, 658 <PINMUX_GPIO26__FUNC_GPIO26>, 659 <PINMUX_GPIO46__FUNC_GPIO46>, 660 <PINMUX_GPIO47__FUNC_GPIO47>, 661 <PINMUX_GPIO48__FUNC_GPIO48>, 662 <PINMUX_GPIO65__FUNC_GPIO65>, 663 <PINMUX_GPIO66__FUNC_GPIO66>, 664 <PINMUX_GPIO67__FUNC_GPIO67>, 665 <PINMUX_GPIO68__FUNC_GPIO68>, 666 <PINMUX_GPIO128__FUNC_GPIO128>, 667 <PINMUX_GPIO129__FUNC_GPIO129>; 668 input-enable; 669 bias-pull-down; 670 }; 671 672 pins-low-power-pupd { 673 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, 674 <PINMUX_GPIO78__FUNC_GPIO78>, 675 <PINMUX_GPIO79__FUNC_GPIO79>, 676 <PINMUX_GPIO80__FUNC_GPIO80>, 677 <PINMUX_GPIO83__FUNC_GPIO83>, 678 <PINMUX_GPIO85__FUNC_GPIO85>, 679 <PINMUX_GPIO90__FUNC_GPIO90>, 680 <PINMUX_GPIO91__FUNC_GPIO91>, 681 <PINMUX_GPIO93__FUNC_GPIO93>, 682 <PINMUX_GPIO94__FUNC_GPIO94>, 683 <PINMUX_GPIO95__FUNC_GPIO95>, 684 <PINMUX_GPIO96__FUNC_GPIO96>, 685 <PINMUX_GPIO104__FUNC_GPIO104>, 686 <PINMUX_GPIO105__FUNC_GPIO105>, 687 <PINMUX_GPIO107__FUNC_GPIO107>; 688 input-enable; 689 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 690 }; 691 }; 692 693 scp_pins: scp-default-pins { 694 pins-vreq { 695 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>; 696 bias-disable; 697 input-enable; 698 }; 699 }; 700 701 spi0_pins: spi0-default-pins { 702 pins-cs-mosi-clk { 703 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>, 704 <PINMUX_GPIO134__FUNC_SPIM0_MO>, 705 <PINMUX_GPIO133__FUNC_SPIM0_CLK>; 706 bias-disable; 707 }; 708 709 pins-miso { 710 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>; 711 bias-pull-down; 712 }; 713 }; 714 715 subpmic_default: subpmic-default-pins { 716 subpmic_pin_irq: pins-subpmic-int-n { 717 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>; 718 input-enable; 719 bias-pull-up; 720 }; 721 }; 722 723 trackpad_pins: trackpad-default-pins { 724 pins-int-n { 725 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>; 726 input-enable; 727 bias-pull-up; 728 }; 729 }; 730 731 touchscreen_pins: touchscreen-default-pins { 732 pins-int-n { 733 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>; 734 input-enable; 735 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 736 }; 737 pins-rst { 738 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>; 739 output-high; 740 }; 741 pins-report-sw { 742 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>; 743 output-low; 744 }; 745 }; 746}; 747 748&pmic { 749 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 750}; 751 752&scp { 753 status = "okay"; 754 755 firmware-name = "mediatek/mt8195/scp.img"; 756 memory-region = <&scp_mem>; 757 pinctrl-names = "default"; 758 pinctrl-0 = <&scp_pins>; 759 760 cros-ec-rpmsg { 761 compatible = "google,cros-ec-rpmsg"; 762 mediatek,rpmsg-name = "cros-ec-rpmsg"; 763 }; 764}; 765 766&spi0 { 767 status = "okay"; 768 769 pinctrl-names = "default"; 770 pinctrl-0 = <&spi0_pins>; 771 mediatek,pad-select = <0>; 772 773 cros_ec: ec@0 { 774 #address-cells = <1>; 775 #size-cells = <0>; 776 777 compatible = "google,cros-ec-spi"; 778 reg = <0>; 779 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>; 780 pinctrl-names = "default"; 781 pinctrl-0 = <&cros_ec_int>; 782 spi-max-frequency = <3000000>; 783 784 keyboard-backlight { 785 compatible = "google,cros-kbd-led-backlight"; 786 }; 787 788 i2c_tunnel: i2c-tunnel { 789 compatible = "google,cros-ec-i2c-tunnel"; 790 google,remote-bus = <0>; 791 #address-cells = <1>; 792 #size-cells = <0>; 793 }; 794 795 mt_pmic_vmc_ldo_reg: regulator@0 { 796 compatible = "google,cros-ec-regulator"; 797 reg = <0>; 798 regulator-name = "mt_pmic_vmc_ldo"; 799 regulator-min-microvolt = <1200000>; 800 regulator-max-microvolt = <3600000>; 801 }; 802 803 mt_pmic_vmch_ldo_reg: regulator@1 { 804 compatible = "google,cros-ec-regulator"; 805 reg = <1>; 806 regulator-name = "mt_pmic_vmch_ldo"; 807 regulator-min-microvolt = <2700000>; 808 regulator-max-microvolt = <3600000>; 809 }; 810 811 typec { 812 compatible = "google,cros-ec-typec"; 813 #address-cells = <1>; 814 #size-cells = <0>; 815 816 usb_c0: connector@0 { 817 compatible = "usb-c-connector"; 818 reg = <0>; 819 power-role = "dual"; 820 data-role = "host"; 821 try-power-role = "source"; 822 }; 823 824 usb_c1: connector@1 { 825 compatible = "usb-c-connector"; 826 reg = <1>; 827 power-role = "dual"; 828 data-role = "host"; 829 try-power-role = "source"; 830 }; 831 }; 832 }; 833}; 834 835&u3phy0 { 836 status = "okay"; 837}; 838 839&u3phy1 { 840 status = "okay"; 841}; 842 843&u3phy2 { 844 status = "okay"; 845}; 846 847&u3phy3 { 848 status = "okay"; 849}; 850 851&uart0 { 852 status = "okay"; 853}; 854 855&xhci0 { 856 status = "okay"; 857 858 vusb33-supply = <&mt6359_vusb_ldo_reg>; 859 vbus-supply = <&usb_vbus>; 860}; 861 862&xhci1 { 863 status = "okay"; 864 865 vusb33-supply = <&mt6359_vusb_ldo_reg>; 866 vbus-supply = <&usb_vbus>; 867}; 868 869&xhci2 { 870 status = "okay"; 871 872 vusb33-supply = <&mt6359_vusb_ldo_reg>; 873 vbus-supply = <&usb_vbus>; 874}; 875 876&xhci3 { 877 status = "okay"; 878 879 /* MT7921's USB Bluetooth has issues with USB2 LPM */ 880 usb2-lpm-disable; 881 vusb33-supply = <&mt6359_vusb_ldo_reg>; 882 vbus-supply = <&usb_vbus>; 883}; 884 885#include <arm/cros-ec-keyboard.dtsi> 886#include <arm/cros-ec-sbs.dtsi> 887 888&keyboard_controller { 889 function-row-physmap = < 890 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 891 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 892 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 893 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 894 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 895 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 896 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 897 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 898 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 899 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 900 >; 901 902 linux,keymap = < 903 MATRIX_KEY(0x00, 0x02, KEY_BACK) 904 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 905 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 906 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 907 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 908 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 909 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 910 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 911 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 912 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 913 914 CROS_STD_MAIN_KEYMAP 915 >; 916}; 917