1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/spmi/spmi.h> 8#include "mt8195.dtsi" 9#include "mt6359.dtsi" 10 11/ { 12 aliases { 13 i2c0 = &i2c0; 14 i2c1 = &i2c1; 15 i2c2 = &i2c2; 16 i2c3 = &i2c3; 17 i2c4 = &i2c4; 18 i2c5 = &i2c5; 19 i2c7 = &i2c7; 20 mmc0 = &mmc0; 21 mmc1 = &mmc1; 22 serial0 = &uart0; 23 }; 24 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 31 pwms = <&disp_pwm0 0 500000>; 32 power-supply = <&ppvar_sys>; 33 }; 34 35 chosen { 36 stdout-path = "serial0:115200n8"; 37 }; 38 39 dmic-codec { 40 compatible = "dmic-codec"; 41 num-channels = <2>; 42 wakeup-delay-ms = <50>; 43 }; 44 45 memory@40000000 { 46 device_type = "memory"; 47 reg = <0 0x40000000 0 0x80000000>; 48 }; 49 50 /* system wide LDO 3.3V power rail */ 51 pp3300_z5: regulator-pp3300-ldo-z5 { 52 compatible = "regulator-fixed"; 53 regulator-name = "pp3300_ldo_z5"; 54 regulator-always-on; 55 regulator-boot-on; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 vin-supply = <&ppvar_sys>; 59 }; 60 61 /* separately switched 3.3V power rail */ 62 pp3300_s3: regulator-pp3300-s3 { 63 compatible = "regulator-fixed"; 64 regulator-name = "pp3300_s3"; 65 /* automatically sequenced by PMIC EXT_PMIC_EN2 */ 66 regulator-always-on; 67 regulator-boot-on; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 70 vin-supply = <&pp3300_z2>; 71 }; 72 73 /* system wide 3.3V power rail */ 74 pp3300_z2: regulator-pp3300-z2 { 75 compatible = "regulator-fixed"; 76 regulator-name = "pp3300_z2"; 77 /* EN pin tied to pp4200_z2, which is controlled by EC */ 78 regulator-always-on; 79 regulator-boot-on; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 vin-supply = <&ppvar_sys>; 83 }; 84 85 /* system wide 4.2V power rail */ 86 pp4200_z2: regulator-pp4200-z2 { 87 compatible = "regulator-fixed"; 88 regulator-name = "pp4200_z2"; 89 /* controlled by EC */ 90 regulator-always-on; 91 regulator-boot-on; 92 regulator-min-microvolt = <4200000>; 93 regulator-max-microvolt = <4200000>; 94 vin-supply = <&ppvar_sys>; 95 }; 96 97 /* system wide switching 5.0V power rail */ 98 pp5000_s5: regulator-pp5000-s5 { 99 compatible = "regulator-fixed"; 100 regulator-name = "pp5000_s5"; 101 /* controlled by EC */ 102 regulator-always-on; 103 regulator-boot-on; 104 regulator-min-microvolt = <5000000>; 105 regulator-max-microvolt = <5000000>; 106 vin-supply = <&ppvar_sys>; 107 }; 108 109 /* system wide semi-regulated power rail from battery or USB */ 110 ppvar_sys: regulator-ppvar-sys { 111 compatible = "regulator-fixed"; 112 regulator-name = "ppvar_sys"; 113 regulator-always-on; 114 regulator-boot-on; 115 }; 116 117 /* Murata NCP03WF104F05RL */ 118 tboard_thermistor1: thermal-sensor-t1 { 119 compatible = "generic-adc-thermal"; 120 #thermal-sensor-cells = <0>; 121 io-channels = <&auxadc 0>; 122 io-channel-names = "sensor-channel"; 123 temperature-lookup-table = < (-10000) 1553 124 (-5000) 1485 125 0 1406 126 5000 1317 127 10000 1219 128 15000 1115 129 20000 1007 130 25000 900 131 30000 796 132 35000 697 133 40000 605 134 45000 523 135 50000 449 136 55000 384 137 60000 327 138 65000 279 139 70000 237 140 75000 202 141 80000 172 142 85000 147 143 90000 125 144 95000 107 145 100000 92 146 105000 79 147 110000 68 148 115000 59 149 120000 51 150 125000 44>; 151 }; 152 153 tboard_thermistor2: thermal-sensor-t2 { 154 compatible = "generic-adc-thermal"; 155 #thermal-sensor-cells = <0>; 156 io-channels = <&auxadc 1>; 157 io-channel-names = "sensor-channel"; 158 temperature-lookup-table = < (-10000) 1553 159 (-5000) 1485 160 0 1406 161 5000 1317 162 10000 1219 163 15000 1115 164 20000 1007 165 25000 900 166 30000 796 167 35000 697 168 40000 605 169 45000 523 170 50000 449 171 55000 384 172 60000 327 173 65000 279 174 70000 237 175 75000 202 176 80000 172 177 85000 147 178 90000 125 179 95000 107 180 100000 92 181 105000 79 182 110000 68 183 115000 59 184 120000 51 185 125000 44>; 186 }; 187 188 usb_vbus: regulator-5v0-usb-vbus { 189 compatible = "regulator-fixed"; 190 regulator-name = "usb-vbus"; 191 regulator-min-microvolt = <5000000>; 192 regulator-max-microvolt = <5000000>; 193 enable-active-high; 194 regulator-always-on; 195 }; 196 197 reserved_memory: reserved-memory { 198 #address-cells = <2>; 199 #size-cells = <2>; 200 ranges; 201 202 scp_mem: memory@50000000 { 203 compatible = "shared-dma-pool"; 204 reg = <0 0x50000000 0 0x2900000>; 205 no-map; 206 }; 207 208 adsp_mem: memory@60000000 { 209 compatible = "shared-dma-pool"; 210 reg = <0 0x60000000 0 0xd80000>; 211 no-map; 212 }; 213 214 afe_mem: memory@60d80000 { 215 compatible = "shared-dma-pool"; 216 reg = <0 0x60d80000 0 0x100000>; 217 no-map; 218 }; 219 220 adsp_device_mem: memory@60e80000 { 221 compatible = "shared-dma-pool"; 222 reg = <0 0x60e80000 0 0x280000>; 223 no-map; 224 }; 225 }; 226 227 spk_amplifier: rt1019p { 228 compatible = "realtek,rt1019p"; 229 label = "rt1019p"; 230 pinctrl-names = "default"; 231 pinctrl-0 = <&rt1019p_pins_default>; 232 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>; 233 }; 234}; 235 236&adsp { 237 status = "okay"; 238 239 memory-region = <&adsp_device_mem>, <&adsp_mem>; 240}; 241 242&afe { 243 status = "okay"; 244 245 mediatek,etdm-in2-cowork-source = <2>; 246 mediatek,etdm-out2-cowork-source = <0>; 247 memory-region = <&afe_mem>; 248}; 249 250&auxadc { 251 status = "okay"; 252}; 253 254&dp_intf0 { 255 status = "okay"; 256 257 port { 258 dp_intf0_out: endpoint { 259 remote-endpoint = <&edp_in>; 260 }; 261 }; 262}; 263 264&dp_intf1 { 265 status = "okay"; 266 267 port { 268 dp_intf1_out: endpoint { 269 remote-endpoint = <&dptx_in>; 270 }; 271 }; 272}; 273 274&edp_tx { 275 status = "okay"; 276 277 pinctrl-names = "default"; 278 pinctrl-0 = <&edptx_pins_default>; 279 280 ports { 281 #address-cells = <1>; 282 #size-cells = <0>; 283 284 port@0 { 285 reg = <0>; 286 edp_in: endpoint { 287 remote-endpoint = <&dp_intf0_out>; 288 }; 289 }; 290 291 port@1 { 292 reg = <1>; 293 edp_out: endpoint { 294 data-lanes = <0 1 2 3>; 295 }; 296 }; 297 }; 298}; 299 300&disp_pwm0 { 301 status = "okay"; 302 303 pinctrl-names = "default"; 304 pinctrl-0 = <&disp_pwm0_pin_default>; 305}; 306 307&dp_tx { 308 status = "okay"; 309 310 pinctrl-names = "default"; 311 pinctrl-0 = <&dptx_pin>; 312 313 ports { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 317 port@0 { 318 reg = <0>; 319 dptx_in: endpoint { 320 remote-endpoint = <&dp_intf1_out>; 321 }; 322 }; 323 324 port@1 { 325 reg = <1>; 326 dptx_out: endpoint { 327 data-lanes = <0 1 2 3>; 328 }; 329 }; 330 }; 331}; 332 333&gic { 334 mediatek,broken-save-restore-fw; 335}; 336 337&gpu { 338 status = "okay"; 339 mali-supply = <&mt6315_7_vbuck1>; 340}; 341 342&i2c0 { 343 status = "okay"; 344 345 clock-frequency = <400000>; 346 pinctrl-names = "default"; 347 pinctrl-0 = <&i2c0_pins>; 348}; 349 350&i2c1 { 351 status = "okay"; 352 353 clock-frequency = <400000>; 354 i2c-scl-internal-delay-ns = <12500>; 355 pinctrl-names = "default"; 356 pinctrl-0 = <&i2c1_pins>; 357 358 trackpad@15 { 359 compatible = "elan,ekth3000"; 360 reg = <0x15>; 361 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>; 362 pinctrl-names = "default"; 363 pinctrl-0 = <&trackpad_pins>; 364 vcc-supply = <&pp3300_s3>; 365 wakeup-source; 366 }; 367}; 368 369&i2c2 { 370 status = "okay"; 371 372 clock-frequency = <400000>; 373 pinctrl-names = "default"; 374 pinctrl-0 = <&i2c2_pins>; 375 376 audio_codec: codec@1a { 377 /* Realtek RT5682i or RT5682s, sharing the same configuration */ 378 reg = <0x1a>; 379 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>; 380 realtek,jd-src = <1>; 381 382 AVDD-supply = <&mt6359_vio18_ldo_reg>; 383 MICVDD-supply = <&pp3300_z2>; 384 VBAT-supply = <&pp3300_z5>; 385 }; 386}; 387 388&i2c3 { 389 status = "okay"; 390 391 clock-frequency = <400000>; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&i2c3_pins>; 394 395 tpm@50 { 396 compatible = "google,cr50"; 397 reg = <0x50>; 398 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>; 399 pinctrl-names = "default"; 400 pinctrl-0 = <&cr50_int>; 401 }; 402}; 403 404&i2c4 { 405 status = "okay"; 406 407 clock-frequency = <400000>; 408 pinctrl-names = "default"; 409 pinctrl-0 = <&i2c4_pins>; 410 411 ts_10: touchscreen@10 { 412 compatible = "hid-over-i2c"; 413 reg = <0x10>; 414 hid-descr-addr = <0x0001>; 415 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>; 416 pinctrl-names = "default"; 417 pinctrl-0 = <&touchscreen_pins>; 418 post-power-on-delay-ms = <10>; 419 vdd-supply = <&pp3300_s3>; 420 status = "disabled"; 421 }; 422}; 423 424&i2c5 { 425 status = "okay"; 426 427 clock-frequency = <400000>; 428 pinctrl-names = "default"; 429 pinctrl-0 = <&i2c5_pins>; 430}; 431 432&i2c7 { 433 status = "okay"; 434 435 clock-frequency = <400000>; 436 pinctrl-names = "default"; 437 pinctrl-0 = <&i2c7_pins>; 438 439 pmic@34 { 440 #interrupt-cells = <2>; 441 compatible = "mediatek,mt6360"; 442 reg = <0x34>; 443 interrupt-controller; 444 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>; 445 interrupt-names = "IRQB"; 446 pinctrl-names = "default"; 447 pinctrl-0 = <&subpmic_default>; 448 wakeup-source; 449 }; 450}; 451 452&mmc0 { 453 status = "okay"; 454 455 bus-width = <8>; 456 cap-mmc-highspeed; 457 cap-mmc-hw-reset; 458 hs400-ds-delay = <0x14c11>; 459 max-frequency = <200000000>; 460 mmc-hs200-1_8v; 461 mmc-hs400-1_8v; 462 no-sdio; 463 no-sd; 464 non-removable; 465 pinctrl-names = "default", "state_uhs"; 466 pinctrl-0 = <&mmc0_pins_default>; 467 pinctrl-1 = <&mmc0_pins_uhs>; 468 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 469 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 470}; 471 472&mmc1 { 473 status = "okay"; 474 475 bus-width = <4>; 476 cap-sd-highspeed; 477 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 478 max-frequency = <200000000>; 479 no-mmc; 480 no-sdio; 481 pinctrl-names = "default", "state_uhs"; 482 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>; 483 pinctrl-1 = <&mmc1_pins_default>; 484 sd-uhs-sdr50; 485 sd-uhs-sdr104; 486 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 487 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 488}; 489 490&mt6359codec { 491 mediatek,dmic-mode = <1>; /* one-wire */ 492 mediatek,mic-type-0 = <2>; /* DMIC */ 493}; 494 495/* for CPU-L */ 496&mt6359_vcore_buck_reg { 497 regulator-always-on; 498}; 499 500/* for CORE */ 501&mt6359_vgpu11_buck_reg { 502 regulator-always-on; 503}; 504 505&mt6359_vgpu11_sshub_buck_reg { 506 regulator-always-on; 507 regulator-min-microvolt = <550000>; 508 regulator-max-microvolt = <550000>; 509}; 510 511/* for CORE SRAM */ 512&mt6359_vpu_buck_reg { 513 regulator-always-on; 514}; 515 516&mt6359_vrf12_ldo_reg { 517 regulator-always-on; 518}; 519 520/* for GPU SRAM */ 521&mt6359_vsram_others_ldo_reg { 522 regulator-always-on; 523 regulator-min-microvolt = <750000>; 524 regulator-max-microvolt = <750000>; 525}; 526 527&mt6359_vufs_ldo_reg { 528 regulator-always-on; 529}; 530 531&nor_flash { 532 status = "okay"; 533 534 pinctrl-names = "default"; 535 pinctrl-0 = <&nor_pins_default>; 536 537 flash@0 { 538 compatible = "jedec,spi-nor"; 539 reg = <0>; 540 spi-max-frequency = <52000000>; 541 spi-rx-bus-width = <2>; 542 spi-tx-bus-width = <2>; 543 }; 544}; 545 546&pcie1 { 547 status = "okay"; 548 549 pinctrl-names = "default"; 550 pinctrl-0 = <&pcie1_pins_default>; 551}; 552 553&pio { 554 mediatek,rsel-resistance-in-si-unit; 555 pinctrl-names = "default"; 556 pinctrl-0 = <&pio_default>; 557 558 /* 144 lines */ 559 gpio-line-names = 560 "I2S_SPKR_MCLK", 561 "I2S_SPKR_DATAIN", 562 "I2S_SPKR_LRCK", 563 "I2S_SPKR_BCLK", 564 "EC_AP_INT_ODL", 565 /* 566 * AP_FLASH_WP_L is crossystem ABI. Schematics 567 * call it AP_FLASH_WP_ODL. 568 */ 569 "AP_FLASH_WP_L", 570 "TCHPAD_INT_ODL", 571 "EDP_HPD_1V8", 572 "AP_I2C_CAM_SDA", 573 "AP_I2C_CAM_SCL", 574 "AP_I2C_TCHPAD_SDA_1V8", 575 "AP_I2C_TCHPAD_SCL_1V8", 576 "AP_I2C_AUD_SDA", 577 "AP_I2C_AUD_SCL", 578 "AP_I2C_TPM_SDA_1V8", 579 "AP_I2C_TPM_SCL_1V8", 580 "AP_I2C_TCHSCR_SDA_1V8", 581 "AP_I2C_TCHSCR_SCL_1V8", 582 "EC_AP_HPD_OD", 583 "", 584 "PCIE_NVME_RST_L", 585 "PCIE_NVME_CLKREQ_ODL", 586 "PCIE_RST_1V8_L", 587 "PCIE_CLKREQ_1V8_ODL", 588 "PCIE_WAKE_1V8_ODL", 589 "CLK_24M_CAM0", 590 "CAM1_SEN_EN", 591 "AP_I2C_PWR_SCL_1V8", 592 "AP_I2C_PWR_SDA_1V8", 593 "AP_I2C_MISC_SCL", 594 "AP_I2C_MISC_SDA", 595 "EN_PP5000_HDMI_X", 596 "AP_HDMITX_HTPLG", 597 "", 598 "AP_HDMITX_SCL_1V8", 599 "AP_HDMITX_SDA_1V8", 600 "AP_RTC_CLK32K", 601 "AP_EC_WATCHDOG_L", 602 "SRCLKENA0", 603 "SRCLKENA1", 604 "PWRAP_SPI0_CS_L", 605 "PWRAP_SPI0_CK", 606 "PWRAP_SPI0_MOSI", 607 "PWRAP_SPI0_MISO", 608 "SPMI_SCL", 609 "SPMI_SDA", 610 "", 611 "", 612 "", 613 "I2S_HP_DATAIN", 614 "I2S_HP_MCLK", 615 "I2S_HP_BCK", 616 "I2S_HP_LRCK", 617 "I2S_HP_DATAOUT", 618 "SD_CD_ODL", 619 "EN_PP3300_DISP_X", 620 "TCHSCR_RST_1V8_L", 621 "TCHSCR_REPORT_DISABLE", 622 "EN_PP3300_WLAN_X", 623 "BT_KILL_1V8_L", 624 "I2S_SPKR_DATAOUT", 625 "WIFI_KILL_1V8_L", 626 "BEEP_ON", 627 "SCP_I2C_SENSOR_SCL_1V8", 628 "SCP_I2C_SENSOR_SDA_1V8", 629 "", 630 "", 631 "", 632 "", 633 "AUD_CLK_MOSI", 634 "AUD_SYNC_MOSI", 635 "AUD_DAT_MOSI0", 636 "AUD_DAT_MOSI1", 637 "AUD_DAT_MISO0", 638 "AUD_DAT_MISO1", 639 "AUD_DAT_MISO2", 640 "SCP_VREQ_VAO", 641 "AP_SPI_GSC_TPM_CLK", 642 "AP_SPI_GSC_TPM_MOSI", 643 "AP_SPI_GSC_TPM_CS_L", 644 "AP_SPI_GSC_TPM_MISO", 645 "EN_PP1000_CAM_X", 646 "AP_EDP_BKLTEN", 647 "", 648 "USB3_HUB_RST_L", 649 "", 650 "WLAN_ALERT_ODL", 651 "EC_IN_RW_ODL", 652 "GSC_AP_INT_ODL", 653 "HP_INT_ODL", 654 "CAM0_RST_L", 655 "CAM1_RST_L", 656 "TCHSCR_INT_1V8_L", 657 "CAM1_DET_L", 658 "RST_ALC1011_L", 659 "", 660 "", 661 "BL_PWM_1V8", 662 "UART_AP_TX_DBG_RX", 663 "UART_DBG_TX_AP_RX", 664 "EN_SPKR", 665 "AP_EC_WARM_RST_REQ", 666 "UART_SCP_TX_DBGCON_RX", 667 "UART_DBGCON_TX_SCP_RX", 668 "", 669 "", 670 "KPCOL0", 671 "", 672 "MT6315_GPU_INT", 673 "MT6315_PROC_BC_INT", 674 "SD_CMD", 675 "SD_CLK", 676 "SD_DAT0", 677 "SD_DAT1", 678 "SD_DAT2", 679 "SD_DAT3", 680 "EMMC_DAT7", 681 "EMMC_DAT6", 682 "EMMC_DAT5", 683 "EMMC_DAT4", 684 "EMMC_RSTB", 685 "EMMC_CMD", 686 "EMMC_CLK", 687 "EMMC_DAT3", 688 "EMMC_DAT2", 689 "EMMC_DAT1", 690 "EMMC_DAT0", 691 "EMMC_DSL", 692 "", 693 "", 694 "MT6360_INT_ODL", 695 "SCP_JTAG0_TRSTN", 696 "AP_SPI_EC_CS_L", 697 "AP_SPI_EC_CLK", 698 "AP_SPI_EC_MOSI", 699 "AP_SPI_EC_MISO", 700 "SCP_JTAG0_TMS", 701 "SCP_JTAG0_TCK", 702 "SCP_JTAG0_TDO", 703 "SCP_JTAG0_TDI", 704 "AP_SPI_FLASH_CS_L", 705 "AP_SPI_FLASH_CLK", 706 "AP_SPI_FLASH_MOSI", 707 "AP_SPI_FLASH_MISO"; 708 709 aud_pins_default: audio-default-pins { 710 pins-cmd-dat { 711 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>, 712 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>, 713 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>, 714 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>, 715 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>, 716 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>, 717 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>, 718 <PINMUX_GPIO0__FUNC_TDMIN_MCK>, 719 <PINMUX_GPIO1__FUNC_TDMIN_DI>, 720 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>, 721 <PINMUX_GPIO3__FUNC_TDMIN_BCK>, 722 <PINMUX_GPIO60__FUNC_I2SO2_D0>, 723 <PINMUX_GPIO49__FUNC_I2SIN_D0>, 724 <PINMUX_GPIO50__FUNC_I2SO1_MCK>, 725 <PINMUX_GPIO51__FUNC_I2SO1_BCK>, 726 <PINMUX_GPIO52__FUNC_I2SO1_WS>, 727 <PINMUX_GPIO53__FUNC_I2SO1_D0>; 728 }; 729 730 pins-hp-jack-int-odl { 731 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>; 732 input-enable; 733 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 734 }; 735 }; 736 737 cr50_int: cr50-irq-default-pins { 738 pins-gsc-ap-int-odl { 739 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>; 740 input-enable; 741 }; 742 }; 743 744 cros_ec_int: cros-ec-irq-default-pins { 745 pins-ec-ap-int-odl { 746 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>; 747 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 748 input-enable; 749 }; 750 }; 751 752 edptx_pins_default: edptx-default-pins { 753 pins-cmd-dat { 754 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>; 755 bias-pull-up; 756 }; 757 }; 758 759 disp_pwm0_pin_default: disp-pwm0-default-pins { 760 pins-disp-pwm { 761 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>, 762 <PINMUX_GPIO97__FUNC_DISP_PWM0>; 763 }; 764 }; 765 766 dptx_pin: dptx-default-pins { 767 pins-cmd-dat { 768 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>; 769 bias-pull-up; 770 }; 771 }; 772 773 i2c0_pins: i2c0-default-pins { 774 pins-bus { 775 pinmux = <PINMUX_GPIO8__FUNC_SDA0>, 776 <PINMUX_GPIO9__FUNC_SCL0>; 777 bias-disable; 778 drive-strength-microamp = <1000>; 779 }; 780 }; 781 782 i2c1_pins: i2c1-default-pins { 783 pins-bus { 784 pinmux = <PINMUX_GPIO10__FUNC_SDA1>, 785 <PINMUX_GPIO11__FUNC_SCL1>; 786 bias-pull-up = <1000>; 787 drive-strength-microamp = <1000>; 788 }; 789 }; 790 791 i2c2_pins: i2c2-default-pins { 792 pins-bus { 793 pinmux = <PINMUX_GPIO12__FUNC_SDA2>, 794 <PINMUX_GPIO13__FUNC_SCL2>; 795 bias-disable; 796 drive-strength-microamp = <1000>; 797 }; 798 }; 799 800 i2c3_pins: i2c3-default-pins { 801 pins-bus { 802 pinmux = <PINMUX_GPIO14__FUNC_SDA3>, 803 <PINMUX_GPIO15__FUNC_SCL3>; 804 bias-pull-up = <1000>; 805 drive-strength-microamp = <1000>; 806 }; 807 }; 808 809 i2c4_pins: i2c4-default-pins { 810 pins-bus { 811 pinmux = <PINMUX_GPIO16__FUNC_SDA4>, 812 <PINMUX_GPIO17__FUNC_SCL4>; 813 bias-pull-up = <1000>; 814 drive-strength = <4>; 815 }; 816 }; 817 818 i2c5_pins: i2c5-default-pins { 819 pins-bus { 820 pinmux = <PINMUX_GPIO29__FUNC_SCL5>, 821 <PINMUX_GPIO30__FUNC_SDA5>; 822 bias-disable; 823 drive-strength-microamp = <1000>; 824 }; 825 }; 826 827 i2c7_pins: i2c7-default-pins { 828 pins-bus { 829 pinmux = <PINMUX_GPIO27__FUNC_SCL7>, 830 <PINMUX_GPIO28__FUNC_SDA7>; 831 bias-disable; 832 }; 833 }; 834 835 mmc0_pins_default: mmc0-default-pins { 836 pins-cmd-dat { 837 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 838 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 839 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 840 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 841 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 842 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 843 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 844 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 845 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 846 input-enable; 847 drive-strength = <6>; 848 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 849 }; 850 851 pins-clk { 852 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 853 drive-strength = <6>; 854 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 855 }; 856 857 pins-rst { 858 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 859 drive-strength = <6>; 860 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 861 }; 862 }; 863 864 mmc0_pins_uhs: mmc0-uhs-pins { 865 pins-cmd-dat { 866 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 867 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 868 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 869 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 870 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 871 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 872 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 873 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 874 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 875 input-enable; 876 drive-strength = <8>; 877 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 878 }; 879 880 pins-clk { 881 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 882 drive-strength = <8>; 883 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 884 }; 885 886 pins-ds { 887 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>; 888 drive-strength = <8>; 889 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 890 }; 891 892 pins-rst { 893 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 894 drive-strength = <8>; 895 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 896 }; 897 }; 898 899 mmc1_pins_detect: mmc1-detect-pins { 900 pins-insert { 901 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>; 902 bias-pull-up; 903 }; 904 }; 905 906 mmc1_pins_default: mmc1-default-pins { 907 pins-cmd-dat { 908 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>, 909 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>, 910 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>, 911 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>, 912 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>; 913 input-enable; 914 drive-strength = <8>; 915 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 916 }; 917 918 pins-clk { 919 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>; 920 drive-strength = <8>; 921 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 922 }; 923 }; 924 925 nor_pins_default: nor-default-pins { 926 pins-ck-io { 927 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>, 928 <PINMUX_GPIO141__FUNC_SPINOR_CK>, 929 <PINMUX_GPIO143__FUNC_SPINOR_IO1>; 930 drive-strength = <6>; 931 bias-pull-down; 932 }; 933 934 pins-cs { 935 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>; 936 drive-strength = <6>; 937 bias-pull-up; 938 }; 939 }; 940 941 pcie0_pins_default: pcie0-default-pins { 942 pins-bus { 943 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>, 944 <PINMUX_GPIO20__FUNC_PERSTN>, 945 <PINMUX_GPIO21__FUNC_CLKREQN>; 946 bias-pull-up; 947 }; 948 }; 949 950 pcie1_pins_default: pcie1-default-pins { 951 pins-bus { 952 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>, 953 <PINMUX_GPIO23__FUNC_CLKREQN_1>, 954 <PINMUX_GPIO24__FUNC_WAKEN_1>; 955 bias-pull-up; 956 }; 957 }; 958 959 pio_default: pio-default-pins { 960 pins-wifi-enable { 961 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>; 962 output-high; 963 drive-strength = <14>; 964 }; 965 966 pins-low-power-pd { 967 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>, 968 <PINMUX_GPIO26__FUNC_GPIO26>, 969 <PINMUX_GPIO46__FUNC_GPIO46>, 970 <PINMUX_GPIO47__FUNC_GPIO47>, 971 <PINMUX_GPIO48__FUNC_GPIO48>, 972 <PINMUX_GPIO65__FUNC_GPIO65>, 973 <PINMUX_GPIO66__FUNC_GPIO66>, 974 <PINMUX_GPIO67__FUNC_GPIO67>, 975 <PINMUX_GPIO68__FUNC_GPIO68>, 976 <PINMUX_GPIO128__FUNC_GPIO128>, 977 <PINMUX_GPIO129__FUNC_GPIO129>; 978 input-enable; 979 bias-pull-down; 980 }; 981 982 pins-low-power-pupd { 983 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, 984 <PINMUX_GPIO78__FUNC_GPIO78>, 985 <PINMUX_GPIO79__FUNC_GPIO79>, 986 <PINMUX_GPIO80__FUNC_GPIO80>, 987 <PINMUX_GPIO83__FUNC_GPIO83>, 988 <PINMUX_GPIO85__FUNC_GPIO85>, 989 <PINMUX_GPIO90__FUNC_GPIO90>, 990 <PINMUX_GPIO91__FUNC_GPIO91>, 991 <PINMUX_GPIO93__FUNC_GPIO93>, 992 <PINMUX_GPIO94__FUNC_GPIO94>, 993 <PINMUX_GPIO95__FUNC_GPIO95>, 994 <PINMUX_GPIO96__FUNC_GPIO96>, 995 <PINMUX_GPIO104__FUNC_GPIO104>, 996 <PINMUX_GPIO105__FUNC_GPIO105>, 997 <PINMUX_GPIO107__FUNC_GPIO107>; 998 input-enable; 999 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 1000 }; 1001 }; 1002 1003 rt1019p_pins_default: rt1019p-default-pins { 1004 pins-amp-sdb { 1005 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>; 1006 output-low; 1007 }; 1008 }; 1009 1010 scp_pins: scp-default-pins { 1011 pins-vreq { 1012 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>; 1013 bias-disable; 1014 input-enable; 1015 }; 1016 }; 1017 1018 spi0_pins: spi0-default-pins { 1019 pins-cs-mosi-clk { 1020 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>, 1021 <PINMUX_GPIO134__FUNC_SPIM0_MO>, 1022 <PINMUX_GPIO133__FUNC_SPIM0_CLK>; 1023 bias-disable; 1024 }; 1025 1026 pins-miso { 1027 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>; 1028 bias-pull-down; 1029 }; 1030 }; 1031 1032 subpmic_default: subpmic-default-pins { 1033 subpmic_pin_irq: pins-subpmic-int-n { 1034 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>; 1035 input-enable; 1036 bias-pull-up; 1037 }; 1038 }; 1039 1040 trackpad_pins: trackpad-default-pins { 1041 pins-int-n { 1042 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>; 1043 input-enable; 1044 bias-pull-up; 1045 }; 1046 }; 1047 1048 touchscreen_pins: touchscreen-default-pins { 1049 pins-int-n { 1050 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>; 1051 input-enable; 1052 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1053 }; 1054 pins-rst { 1055 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>; 1056 output-high; 1057 }; 1058 pins-report-sw { 1059 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>; 1060 output-low; 1061 }; 1062 }; 1063}; 1064 1065&pmic { 1066 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 1067}; 1068 1069&scp { 1070 status = "okay"; 1071 1072 firmware-name = "mediatek/mt8195/scp.img"; 1073 memory-region = <&scp_mem>; 1074 pinctrl-names = "default"; 1075 pinctrl-0 = <&scp_pins>; 1076 1077 cros-ec-rpmsg { 1078 compatible = "google,cros-ec-rpmsg"; 1079 mediatek,rpmsg-name = "cros-ec-rpmsg"; 1080 }; 1081}; 1082 1083&sound { 1084 status = "okay"; 1085 1086 mediatek,adsp = <&adsp>; 1087 mediatek,dai-link = 1088 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE", 1089 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE", 1090 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5"; 1091 pinctrl-names = "default"; 1092 pinctrl-0 = <&aud_pins_default>; 1093}; 1094 1095&spi0 { 1096 status = "okay"; 1097 1098 pinctrl-names = "default"; 1099 pinctrl-0 = <&spi0_pins>; 1100 mediatek,pad-select = <0>; 1101 1102 cros_ec: ec@0 { 1103 #address-cells = <1>; 1104 #size-cells = <0>; 1105 1106 compatible = "google,cros-ec-spi"; 1107 reg = <0>; 1108 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>; 1109 pinctrl-names = "default"; 1110 pinctrl-0 = <&cros_ec_int>; 1111 spi-max-frequency = <3000000>; 1112 1113 keyboard-backlight { 1114 compatible = "google,cros-kbd-led-backlight"; 1115 }; 1116 1117 i2c_tunnel: i2c-tunnel { 1118 compatible = "google,cros-ec-i2c-tunnel"; 1119 google,remote-bus = <0>; 1120 #address-cells = <1>; 1121 #size-cells = <0>; 1122 }; 1123 1124 mt_pmic_vmc_ldo_reg: regulator@0 { 1125 compatible = "google,cros-ec-regulator"; 1126 reg = <0>; 1127 regulator-name = "mt_pmic_vmc_ldo"; 1128 regulator-min-microvolt = <1200000>; 1129 regulator-max-microvolt = <3600000>; 1130 }; 1131 1132 mt_pmic_vmch_ldo_reg: regulator@1 { 1133 compatible = "google,cros-ec-regulator"; 1134 reg = <1>; 1135 regulator-name = "mt_pmic_vmch_ldo"; 1136 regulator-min-microvolt = <2700000>; 1137 regulator-max-microvolt = <3600000>; 1138 }; 1139 1140 typec { 1141 compatible = "google,cros-ec-typec"; 1142 #address-cells = <1>; 1143 #size-cells = <0>; 1144 1145 usb_c0: connector@0 { 1146 compatible = "usb-c-connector"; 1147 reg = <0>; 1148 power-role = "dual"; 1149 data-role = "host"; 1150 try-power-role = "source"; 1151 }; 1152 1153 usb_c1: connector@1 { 1154 compatible = "usb-c-connector"; 1155 reg = <1>; 1156 power-role = "dual"; 1157 data-role = "host"; 1158 try-power-role = "source"; 1159 }; 1160 }; 1161 }; 1162}; 1163 1164&spmi { 1165 #address-cells = <2>; 1166 #size-cells = <0>; 1167 1168 mt6315@6 { 1169 compatible = "mediatek,mt6315-regulator"; 1170 reg = <0x6 SPMI_USID>; 1171 1172 regulators { 1173 mt6315_6_vbuck1: vbuck1 { 1174 regulator-compatible = "vbuck1"; 1175 regulator-name = "Vbcpu"; 1176 regulator-min-microvolt = <300000>; 1177 regulator-max-microvolt = <1193750>; 1178 regulator-enable-ramp-delay = <256>; 1179 regulator-ramp-delay = <6250>; 1180 regulator-allowed-modes = <0 1 2>; 1181 regulator-always-on; 1182 }; 1183 }; 1184 }; 1185 1186 mt6315@7 { 1187 compatible = "mediatek,mt6315-regulator"; 1188 reg = <0x7 SPMI_USID>; 1189 1190 regulators { 1191 mt6315_7_vbuck1: vbuck1 { 1192 regulator-compatible = "vbuck1"; 1193 regulator-name = "Vgpu"; 1194 regulator-min-microvolt = <625000>; 1195 regulator-max-microvolt = <1193750>; 1196 regulator-enable-ramp-delay = <256>; 1197 regulator-ramp-delay = <6250>; 1198 regulator-allowed-modes = <0 1 2>; 1199 regulator-always-on; 1200 }; 1201 }; 1202 }; 1203}; 1204 1205&thermal_zones { 1206 soc-area-thermal { 1207 polling-delay = <1000>; 1208 polling-delay-passive = <250>; 1209 thermal-sensors = <&tboard_thermistor1>; 1210 1211 trips { 1212 trip-crit { 1213 temperature = <84000>; 1214 hysteresis = <1000>; 1215 type = "critical"; 1216 }; 1217 }; 1218 }; 1219 1220 pmic-area-thermal { 1221 polling-delay = <1000>; 1222 polling-delay-passive = <0>; 1223 thermal-sensors = <&tboard_thermistor2>; 1224 1225 trips { 1226 trip-crit { 1227 temperature = <84000>; 1228 hysteresis = <1000>; 1229 type = "critical"; 1230 }; 1231 }; 1232 }; 1233}; 1234 1235&u3phy0 { 1236 status = "okay"; 1237}; 1238 1239&u3phy1 { 1240 status = "okay"; 1241}; 1242 1243&u3phy2 { 1244 status = "okay"; 1245}; 1246 1247&u3phy3 { 1248 status = "okay"; 1249}; 1250 1251&uart0 { 1252 status = "okay"; 1253}; 1254 1255&xhci0 { 1256 status = "okay"; 1257 1258 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1259 vbus-supply = <&usb_vbus>; 1260}; 1261 1262&xhci1 { 1263 status = "okay"; 1264 1265 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1266 vbus-supply = <&usb_vbus>; 1267}; 1268 1269&xhci2 { 1270 status = "okay"; 1271 1272 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1273 vbus-supply = <&usb_vbus>; 1274}; 1275 1276&xhci3 { 1277 status = "okay"; 1278 1279 /* MT7921's USB Bluetooth has issues with USB2 LPM */ 1280 usb2-lpm-disable; 1281 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1282 vbus-supply = <&usb_vbus>; 1283}; 1284 1285#include <arm/cros-ec-keyboard.dtsi> 1286#include <arm/cros-ec-sbs.dtsi> 1287 1288&keyboard_controller { 1289 function-row-physmap = < 1290 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 1291 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 1292 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 1293 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 1294 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 1295 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 1296 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 1297 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 1298 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 1299 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 1300 >; 1301 1302 linux,keymap = < 1303 MATRIX_KEY(0x00, 0x02, KEY_BACK) 1304 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 1305 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 1306 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 1307 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 1308 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 1309 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 1310 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 1311 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 1312 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 1313 1314 CROS_STD_MAIN_KEYMAP 1315 >; 1316}; 1317